electronic-devices-9th-edition-by-floyd floyd ed9 part2-app activity results-final

163

Application Activity Results

Chapter 2 1. A comparison of Equations 2-7 and 2-9 shows that the output voltage of a bridge rectifier is

nearly twice that of a center-tapped rectifier. Also, two diode drops contribute to the bridge output voltage, but only one diode drop contributes to the center-tapped output voltage.

2. A comparison of Equations 2-8 and 2-10 shows that the PIV of a bridge rectifier is nearly half

that of a center-tapped rectifier. 3. ( ) ( )p out p secV V 1.4 V

( ) ( )p sec p outV V + 1.4 V = 16 V + 1.4 V = 17.4 V peak = 12.3 V rms

4. Minimum VA = (12.3 V)(250 mA) = 3.075 VA Use the 12 V CT rated at 6 VA. The 12 V rms secondary voltage is within 10% of the specified 12.3 V determined in 3. 5. The primary current is determined as follows:

( )

( )

p pri sec

p sec pri

I V

I V

( ) ( )

12 V354 mA

120 Vsec

p pri p secpri

VI I

V

= 35.4 mA

The fuse rating should be at least 20% greater than ( )p priI .

6. r = ( )

DC

r ppV

V

( ) DCr ppV rV = 0.03(16 V) = 480 mV

7. ( )r ppV = ( )

1p rectified

L

Vf R C

C = ( )( )

1 117 V

(120 Hz)(64 )(480 mV)p rectified

L r pp

Vf R V

= 0.004612 F

Use 4700 F. 8. PL = VLIL = (16 V)(258 mA) = 4.13 W The rating should be at least 5 W.


164

Troubleshooting (a) Open capacitor. Circuit is operating as full-wave rectifier with no filter. (b) No fault (c) Rectifier diode open. Circuit is operating as a half-wave rectifier. (d) Diode and filter capacitor open. Circuit is operating as a half-wave rectifier with no filter.

Chapter 3 1. OUT(max)V = 12 V + 120 mV = 12.12 V (typical)

2. OUTV = 5 mV 3. VF = 1.9 V

Rlimit = 12 V 1.9 V

20 mA

= 505 W

P = (10.1 V)20 mA = 202 mW. Use 0.25 W rating.

4. Ipri = 12.6 V

250 mA120 V

secsec

pri

VI

V

= 26.3 mA

Use the next highest standard fuse rating.

5. PL = 2(12 V)

47 = 3.06 W

6. The printed circuit board and the schematic agree. 7. Ireg = ILED + IL = 20 mA + 250 mA = 270 mA Preg = (16 V 12 V)270 mA = 1.08 W

Chapter 4 1. From the datasheet, VCE(sat) = 0.3 V.

R3 = CC CE(sat)

1

12 V 0.3 V

10 mAC

V V

I

= 1170 (use std. 1.2 k)

2. From the datasheet, DC(min) = hFE(min) = 75.

IB1 = C1

DC(min)

10 mA

75

I

= 133 A

3. R1 = sensor BE

B1

12 V 0.7 V

133 A

V V

I = 85 (use std. 75 )


165

4. IC2 = CC CE(sat) 12 V 0.3 V

620 L

V V

R

= 18.9 mA

IB2 = C2

DC(min)

18.9 mA

75

I

= 252 A

IB2 = CC BE

3 4

V V

R R

R3 + R4 = CC BE

B2

12 V 0.7 V

252 A

V V

I = 44.8 k

R4 = 44.8 k 1.2 k = 43.6 k (use lower std. value 39 k or even 36 k to ensure saturation)

5. The value of VCE(sat) in the simulation is 0.126 V. The datasheet shows a value of 0.3 V at 150 mA. The simulated value is less because the collector current is much less than the

current at which the datasheet value of 0.3 V is specified. 6. Each circuit on the printed circuit board is in agreement with the schematic. See Figure AA-1

for the component identification.

Figure AA-1 Each of the four circuits is identical. 7. The resistor values are in close agreement. 8. See Figure AA-1 for pin labels.


166

9. Connect VCC and ground. Apply +12V to input 1. Check output 1 for +12 V. Apply 0 V to input 1. Check output 1 for approximately 0 V (VCE(sat0). Repeat for each of the four circuits using the inputs 2-4 and outputs 2-4.

10. Add a second circuit board with only two circuits installed for zones 5 and 6. The outputs are

externally connected to the circuit outputs of the other board to form a single output to the alarm.

Chapter 5 1. See Figure AA-2.

Figure AA-2 2. Use the max hfe (DC) from the data sheet and assume it is constant over the temperature

range, for simplicity.

At 60C: ThermTH

1 Therm

1.256 k9 V 1.9 V

( ) (5.965 k )CC

RV V

R R

1 ThermTH

1 Therm

(4.7 k )(1.256 k )990

( ) 5.965 k

R RR

R R

TH BE

TH

DC

( ) (1.9 V 0.7 V)

470 990

300

EE

V VI

R R

= 2.54 mA

IC IE = 2.54 mA

At 65C: ThermTH

1 Therm

1.481 k9 V 2.16 V

( ) (6.181 k )CC

RV V

R R

1 ThermTH

1 Therm

(4.7 k )(1.481 k )1.13 k

( ) 6.181 k

R RR

R R

TH BE

TH

DC

( ) (2.16 V 0.7 V)

470 1.13 k

300

EE

V VI

R R

= 3.08 mA

IC IE = 3.08 mA


167

At 70C: ThermTH

1 Therm

1.753 k9 V 2.44 V

( ) (6.453 k )CC

RV V

R R

1 ThermTH

1 Therm

(4.7 k )(1.753 k )1.28 k

( ) 6.453 k

R RR

R R

` TH BE

TH

DC

( ) (2.44 V 0.7 V)

470 1.28 k

300

EE

V VI

R R

= 3.70 mA

IC IE = 3.70 mA

At 75C: ThermTH

1 Therm

2.084 k9 V 2.76 V

( ) (6.784 k )CC

RV V

R R

1 ThermTH

1 Therm

(4.7 k )(2.084 k )1.44 k

( ) 6.784 k

R RR

R R

` TH BE

TH

DC

( ) (2.76 V 0.7 V)

470 1.44 k

300

EE

V VI

R R

= 4.34 mA

IC IE = 4.34 mA

At 80C: ThermTH

1 Therm

2.490 k9 V 3.12 V

( ) (7.190 k )CC

RV V

R R

1 ThermTH

1 Therm

(4.7 k )(2.490 k )1.63 k

( ) 7.190 k

R RR

R R

` TH BE

TH

DC

( ) (3.12 V 0.7 V)

470 1.63 k

300

EE

V VI

R R

= 5.09 mA

IC IE = 5.09 mA 3. At 60C: VOUT = VCC ICR2 = 9 V (2.54 mA)(1.0 k) = 6.46 V At 65C: VOUT = VCC ICR2 = 9 V (3.08 mA)(1.0 k) = 5.92 V At 70C: VOUT = VCC ICR2 = 9 V (3.70 mA)(1.0 k) = 5.30 V At 75C: VOUT = VCC ICR2 = 9 V (4.34 mA)(1.0 k) = 4.66 V At 80C: VOUT = VCC ICR2 = 9 V (5.09 mA)(1.0 k) = 3.91 V 4. The calculated values agree reasonably well with the values measured in the simulation.


168

Chapter 6 1. Second stage is set for maximum gain when R10 is completely bypassed and equal to 0 . 1 5 6 7 DC 9 22 k 47 k 22 k 200(130 )cR R R R R = 6.6 k

Av1 = 1

4

6.6 k

1.0 kcR

R

= 6.6

2. Av2 = 8

9

6.8 k

130

R

R

= 52.3

3. Av(tot) = Av1Av2 = (6.6)(52.3) = 345 (This exceeds the specified maximum gain)

4. I1 = I2 = 30 V

660 k = 45.5 A

IE1 = IC1 = 14.3 V

34 k = 421 A

I6 = I7 = 30 V

69 k = 435 A

VB2 = VCC I6R6 = 15 V 20.4 V = 5.4 V

IE2 = IC2 = 15 V ( 5.4V 0.7 V)

130 5 k

= 1.7 mA

ITOT = 45.5 A + 421 A + 435 A + 1.7 mA = 2.6 mA PD = 30 V (2.6 mA) = 78 mW 5. Vin(p) = 45 mV From the scope display, Vout(p) = 5.5 V.

Av = 5.5 V

45 mV = 122

6. The calculated maximum voltage gain is 345. The amplifier is not adjusted for maximum

gain, but the value of 122 is within the specified range (90 to 170). 7. The pc board agrees with the schematic.


169

8. See Figure AA-3.

Figure AA-3 9. There is a 400 mV peak signal at the collector of Q1 and the same signal appears at the base

of Q2. There is no output signal. Either Q2 is faulty or C5 (the output coupling capacitor) is open.

10. There is a 50 mV peak signal at the base of Q1 and a 300 mV peak signal at the collector of

Q1. There is no signal at the base of Q2. The coupling capacitor C3 is open.

Chapter 7 1. Since VB and IE are not known and cannot be calculated from the given information, the input

resistance cannot be accurately determined. However, a very rough approximation can be found using the formula RIN(BASE) = DCR3. Assuming DC for Q5 is 200,

RIN(BASE) = DCR3 = 200(220 ) = 44 k RIN = RIN(BASE) = 44 k

2. Av = 2

3

1.0 k

220

R

R

= 4.5

3. The output waveform has a peak of approximately 10 V. Vout(rms) = 0.707(10 V) = 7.07 V

Pout = 2 2

( ) (7.07 V)

8.2 out rms

L

V

R

= 6.1 W


170

4. Av = 10.5 V

2.5 = 4.2

5. The calculated gain is 4.5 and the measured gain is 4.2. They are close within less than 10%. 6. The scope display shows the peak output of the power amplifier is approximately 9.8 V.

Pout = 2 2

( ) (6.93 V)

8.2 out rms

L

V

R

= 5.86 W

7. From the scope display, Vin(peak) = 2 V and Vout(peak) = 9.8 V.

Av = 9.8 V

2 V = 4.9

8. Av = 9.8 V

40 mV = 245

9. The pc board agrees with the schematic. 10. See Figure AA-4.

Figure AA-4 11. An output transistor is faulty. 12. The interconnections are correct.

Chapter 8 1. From the graph, Vsensor = 100 mV for a pH of 8.


171

2. From the graph, Vsensor = 400 mV for a pH of 3. 3. From the datasheet y21s = gfs = 24 mS 4. The maximum drain current is specified to be 30 mA regardless of VDS. 5. From the datasheet graph, with VG2S = 1 V and VG1S = 0 V, ID is approximately 4.5 mA. 6. For VOUT = 7 V, Vsensor is between 200 mV and 300 mV so the pH is between 4 and 5,

making the solution acidic. 7. See Figure AA-5.

Figure AA-5 8. The pc board agrees with the schematic.


172

9. See Figure AA-6.

Figure AA-6 10. See Figure AA-6.

Chapter 9 1. Channel 7: 174-180 MHz Channel 8: 180-186 MHz Channel 9: 186-192 MHz Channel 10: 192-198 MHz Channel 11: 198-204 MHz Channel 12: 204-210 MHz Channel 13: 210-216 MHz 2. 824-896 MHz and 1850-1990 MHz 3. C2 provides an ac ground for the gate of Q1 (common gate).

4. RIN(gate) = GS

GSS

20 V

1 nA

V

I = 20 109

5. Rin = 9

3 IN(gate) 10 M 20 10 R R = 10 M

6. From the datasheet, gfs = 3000 mhos = 3000 S 7. 88 MHz is the lower end of the FM band.


173

8. (b) Vout(rms) = 0.707Vout(p) = 0.707(21 mV) = 14.8 mV

Av = 21 mV

10 V = 2100

(c) Vout(rms) = 0.707Vout(p) = 0.707(100 mV) = 70.7 mV

Av = 70.7 mV

10 V = 7070

9. The pc board agrees with the schematic. 10. It is a decoupling capacitor connected to the dc supply line for noise elimination. 11. See Figure AA-7.

Figure AA-7

Chapter 10 1. For stage 1 input circuit:

fcl(input) = 1 2 4 1

1

2 ( )acR R R C

C1 = 1 2 4

1 1

2 (330 k 330 k 100(1.0 k )193 Hz2 ( )ac cl inputR R R f

= 13.2 nF

2. For stage 2 input circuit:

fcl(input) = 5 6 7 9 10 3

1

2 ( )acR R R R R C

C3 = 5 6 7 9 10

1 1

2 (35.2 k )193 Hz2 ( )ac cl inputR R R R R f

= 23.4 nF


174

3. Midrange gain is 33.4 dB. Gain at 60 Hz is 9.7 dB. 33.4 dB 9.7 dB = 23.7 dB 4. At 5 kHz from scope display: Vout = 0.707(2.6 V) = 1.84 V 5. At 60 Hz from scope display: Vout = 0.707(240 mV) = 170 mV 6. At 300 Hz: Vout = 0.707(1.84 V) = 1.30 V

7. Av = 2.6 V

45 mV = 57.8

Av (dB) = 20 log Av = 20 log(57.8) = 35.2 dB

8. Av = 170 mV

45 mV = 3.78

Av (dB) = 20 log Av = 20 log(3.78) = 11.6 dB

Chapter 11 1. From the datasheet, VPRM = 400 V for the 2N6397. 2. From the datasheet, the maximum on-state rms current is 12 A. 3. Von(max) = 1.5 V IF = 50 mA Pmax = Von(max)IF = (1.5 V)(50 mA) = 750 mW 4. The SCR conducts during the flat portion of the waveform. 5. The SCR will conduct more it the control voltage is reduced. 6. The motor speed will increase when the SCR conducts more as a result of a reduced control

voltage. 7. The pc board agrees with the schematic.


175

8. See Figure AA-8.

Figure AA-8 9. (a) Test of board 1: Working properly (b) Test of board 2: SCR is not triggering on. (c) Test of board 3: SCR continuously on 10. (a) No problem (b) PUT faulty or SCR gate open (c) SCR shorted

Chapter 12 1. The op-amp configuration is a noninverting amplifier. 2. The maximum and minimum gains of the op-amp stage are

(max)

(min)

1

150 k1 151

1 k150 k

1 752 k

fv

i

v

v

RA

R

A

A

3. Maximum output voltage of the op-amp stage is

Vout(max) = Av(max)Vin = (150)(50 mV) = 7.5 V


176

4. The ideal maximum power to the speaker is

( )

2 2( )

max

7.5 V

(7.5 V)7.03 W

8

out rms

out rms

speaker

V

VP

R

5. Noninverting input: pin 3; inverting input: pin 2; output: pin 6; 15 V: pin 7; 15 V pin 4. 6. From the datasheet: Maximum power consumption @ +15 V is 85 mW. 7. From the datasheet, the typical output voltage swing is +14 V. 8. V1(rms) = 50 mV input voltage V2(rms) = 0.707(10 V) = 7.07 V output of op-amp V3(rms) = 0.707(9 V) = 6.36 V voltage across the load 9. Voltage gain of op-amp stage:

2

1

7.07 V

50 mVout

vin

V VA

V V = 141.4

10. Overall voltage gain:

3

1

6.36 V

50 mVout

vin

V VA

V V = 127.2


Figure AA-9


177

13. (a) Working properly (b) No signal at C1. (c) Top half of output clipped. (d) Bottom half of output clipped. 14. (a) No problem (b) Op-amp or C1 faulty. (c) Q3 or Q4 faulty. (d) Q1 or Q2 faulty.

Chapter 13 1. R1, R2, and R3 determine the reference voltage.

2. IR1 = IR2 = IR3 = 1 2 3

24 V 24 V

612 kR R R

= 39 A

VR3 = IR3R3 = 39 A(56 k) = 2.18 V VREF(min) = 12 V + VR3 = 12 V + 2.18 V = 9.82 V 3. VR2/R3 = IR3(R2 + R3) = 39 A(556 k) = 21.7 V VREF(max) = 12 V + 21.7 V = +9.7 V 4. The output pulse amplitude is limited to +5 V and 0 V by the +5 V supply voltage. 5. As R2 is adjusted, the reference voltage at which the comparator is triggered is varied from a

maximum of +9.82 V to a minimum of 9.7 V. This changes the point on the input sine wave where the comparator changes state. The higher up on the sine wave that the trigger point occurs, the smaller the duty cycle.

6. Noninverting input: pin 2; inverting input: pin 3; output: pin 7; +12 V: pin 8; 12 V: pin 4. 7. Vp = 10 V Vrms = 0.707(10 V) = 7.07 V 8. Vpulse = 5 V 9. T = (2 div)(50 s/div) = 100 s

f = 1 1

100 sT = 10 kHz

10. (a) Each small division = 40 s Pulse width = 1.5(40 s) = 60 s Period = 5 div(200 s/div) = 1000 s

% Duty cycle = 60 s

1001000 s

= 6% (exceeds specs)


178

(b) Pulse width = 4.6 div(200 s) = 920 s Period = 5 div(200 s/div) = 1000 s

% Duty cycle = 920 s

1001000 s

= 92% (exceeds spec)

(c) Each small division = 4 s Pulse width = 2(4 s) = 8 s Period = 5 div(20 s/div) = 100 s

% Duty cycle = 8 s

100100 s

= 8% (exceeds spec)

(d) Pulse width = 4.6(20 s) = 92 s Period = 5 div(20 s/div) = 100 s

% Duty cycle 92 s

100100 s

= 92% (exceeds spec)


Figure AA-10 13. The connections are correct.

Chapter 14 1. Pin 3 is connected to pin 11. From Table 1 on the on-line datasheet, the gain is 500.


179

2. Table 1 in the on-line datasheet shows pin connections for various fixed gains. Also, the formula can be applied for pins 3 and 16, as shown in Figure AA-11.

Figure AA-11 Operating connections for G = 20. 3. From the scope, Vout(pp) = (2.9 div)(50 mV/div) = 145 mV

Vout(rms) = 145 mV

0.7072

= 52.1 mV

Av = ( )

( )

out rms

in rms

V

V =

51.2 mV

100 V = 512

The gain indicated by the pin connections is 500. 4. The hysteresis is approximately 50 mV. 5. The shield-guard driver output on the scope display is approximately 100 mV rms. This is the

same as the common-mode signal. 6. The pc board agrees with the schematic.


180

7. See Figure AA-12.

Figure AA-12

Chapter 15 1. RFID systems are used for tracking and identification of objects. 2. The basic RFID system components are tag, reader, and processor. 3. The tag stores an identification code and other information which it transmits to a reader in

the form of a modulated signal. 4. The reader receives the transmitted information from the tag and converts it to digital form. 5. The band-pass filter eliminates frequencies other than the frequency transmitted by the tag. 6. The low-pass filter eliminates the carrier frequency and passes only the modulating signal

frequency. 7. Gain of amplifier U2 and U3:

Av = 1 + 5 7

6 8

1R R

R R = 1 +

100 k

2.2 k

= 46.5

8. fo = 1 3

1 2 3

1 1 15 k 1 k

2 2 (200 pF) (15 k )(39 k )(1 k )

R R

C R R R

= 132 kHz

This is within 6% of the measured center frequency.


181

9. The low-pass filter is set for an approximate Butterworth response since the damping factor is

DF = 2 12

11

R

R

= 2 560

1000

= 1.44

10. 1 1

2 2 (1 k )(10 nF)cf RC

= 15.9 kHz

11. VREF = 15

14 15

15 k15 V

115 kCC

RV

R R

= 1.96 V

A positive reference is required because the output of the LP filter is a positive signal. 12. The pc board agrees with the schematic. 13. See Figure AA-13.

Figure AA-13


182

Chapter 16

1. Av = 1 4

2 5

100 nF

10 nF

C C

C C = 10

2. CT = 4 5

4 5

(100 nF)(10 nF)

110 nF

C C

C C

= 9.1 nF

fr = 1

1 1

2 2 (150 H)(9.1nF)TL C = 136 kHz

This calculated frequency is within 10% of the 125 kHz measured frequency.

3. fr = 7 8 3

1.44 1.44

( ) (6.2 k 6.2 k )10nFR R C

= 11.6 kHz

The measured frequency is 10 kHz. The calculated value differs by 16%. 4. The forward resistance of the diode is a possible factor in the difference between the

calculated and measured values in 2 and 3. 5. Q2 operates as an analog switch that turns the carrier signal (125 kHz) on and off. 6. First waveform: Output of ASK generator containing bursts of the 125 kHz carrier signal at

10 kHz. Second waveform: output of the RFID rectifier. Third waveform: The rectified signal after filtering out the 125 kHz carrier. Fourth waveform: Pulse output of the RFID reader. 7. The pc board agrees with the schematic of the ASK test generator.


183

8. See Figure AA-14.

Figure AA-14 Chapter 17 1. From the datasheet, VO(min) = 8.65 V and VO(max) = 9.35 V. 2. From the datasheet, the output voltage can change a maximum of 180 mV.

3. IL(max) = O(max)

1

9.4 V

330

V

R

= 28.3 mA

PD(max) = (28.3 mA)2330 = 265 mW

4. R2(max)

1 k9.4 V

1330 V

= 7.07 V

PD(max) = 2(7.07 V)

1 k = 50 mW

5. pri sec

sec pri

I V

I V

(0.707)(34 V)

100 mA120 VpriI

= 20 mA

Fuse rating should exceed 20 mA.


184

6. The pc board agrees with the schematic. 7. PD = (32.6 V 9 V)100 mA = 2.36 W 8. PD = (32.6 V 30 V)100 mA = 236 mW

electronic-devices-9th-edition-by-floyd floyd ed9 part2-app activity results-final

Education