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    EMI/EMC Engineering Tips

    RADIOING.com - eEngineer

    Tips for Electronic Printed Circuit Board Design

    Introduction

    This information is presented as guidelines to the preliminary design anddevelopment stages of electronic circuits for the purpose of preventing

    potential electromagnetic interference (EMI) and electromagneticcompatibility (EMC) problems. The tips are representative of good printedcircuit board (PCB) design practices and are recommended as a checklistfor evaluating and selecting EMI/EMC software modeling tools. The EMIsimulation of circuit boards requires the evaluation of many details such asclock frequencies, switching rates, rise/fall times, signal harmonics, data

    transfer rates, impedances, trace loading and consideration of the types andvalues of the various circuit components. The physical layout of the PCboard and its associated metallic components are important considerations.Special attention should be given to the placement and characteristics ofsignal source components, vias, traces, pads, board stack-up, shieldedenclosures, connectors and cables. For example, as signal frequencies and

    clock/switching rates increase, PC board trace characteristics can becomesimilar to those of transmission lines and radiators. A PC board trace orcomponent can become an efficient antenna at a length as small as onetwentieth of a wavelength.

    EMI/EMC problems may be approached at the component, PC board orenclosure levels. However, it is much more efficient to deal with theseproblems as close to the source or susceptible victim as possible.Therefore, it is important to consider these tips as guidelines for PCB designand layout so that problems may be identified and prevented prior to actual

    fabrication of the equipment.

    General

    (1) EMI controls should be applied at the circuit and box levels prior toaddressing EMI at the interconnected and system levels.

    (2) Digital circuits are more likely to be the source of emissions due to thehandling of periodic waveforms and the fast clock/switching rates. Analogcircuits are more likely to be the susceptible victims due to higher gainfunctions.

    (3) The source or susceptible victim of most EMI problems is typically anelectronic component. Although active components are usually the sources

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    of EMI, passive components often contribute to it, depending on the signalfrequencies and component's characteristics. For example, an inductor canbecome predominantly capacitive due to the high frequency parasiticcoupling between windings. A capacitor can develop parasitic seriesinductance due to its internal inductance and external lead inductance athigh fundamental and harmonic frequencies.

    (4) EMI problems involving an active component can be the result of thedevice's output transferring the emissions or its input providing the path forsusceptibility. However, at high frequencies the active component may

    become a direct radiator or receptor of EMI. Also, the components powerand ground connections can provide paths for both emissions andsusceptibility.

    (5) Although common mode currents are usually small compared to

    differential mode currents, they can be the main cause of radiatedemissions.

    (6) Emissions and susceptibility that are typical in single layer, free wired

    (using power and ground traces instead of planes) PC Board design, can begreatly improved by using multi-layer PC boards with power planes. Highcapacitance between a forward signal and its return path (ground plane)provides containment of the electric field. Low inductance of the pathsprovides for magnetic flux cancellation. Although not always realistic in aPCB stack-up design, a trace should be spaced one dielectric layer away

    from its associated return path and the voltage and ground planes should beas closely spaced as possible.

    (7) PCB stack-up design is important in containing the electromagnetic

    fields, while providing for additional bypassing and decoupling of the powerbus and minimizing bus voltage transients. Some of the benefits ofmulti-layer PC board design with power planes are:

    a. The power planes, if properly designed, will provide an image planeeffect. Since the return currents in the power planes are equal andopposite polarity to the associated signal currents, theirelectromagnetic fields will tend to cancel. Power planes can alsoreduce the loop areas of signal and power traces, resulting in adecrease of EMI emissions and susceptibility.

    b. A ground plane can lower the overall ground impedance, thusreducing high frequency ground bounce. Also, the impedance

    between the ground and voltage planes is lowered at the highfrequencies and this reduces power bus ringing.

    (8) Clocked ICs with rapid output transitions can be very demanding on

    voltage and current distribution components such as the power supply,

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    power bus, and power planes. The inductance of the power bus can preventthe rapid energy transfer needed to meet the quick output transitions andfast rise times. This can be improved with the placement of decouplingcapacitors at the ICs power pins. The capacitors must be properly selectedin their frequency response to deliver the energy needed at the ICs outputfrequency spectrum. However, as the number of decoupling paths increase,

    so do the number of voltage drops across them and this can result in powerbus transients along with the associated common mode emissions. Thisproblem can be minimized with proper power plane design in the area of theICs. The power plane acts as an effective high frequency capacitor, andconsequently, as an additional energy source needed for cleaner ICoutputs.

    PCB Layout

    (1) Use multi-layer PC boards rather than single-layer boards wheneverpossible.

    (2) If a single layer board must be used, a ground plane should be utilized to

    help reduce radiation.

    (3) Top and bottom ground planes can help reduce radiation from multi-layerboards by at least 10 dB.

    (4) Segmented PC board ground planes are useful for reducing cableradiation due to common mode currents.

    (5) Power and return planes should be located on opposite sides of amulti-layer PCB. Effective power planes are low in inductance. Therefore,

    any transients that may develop on the power planes will be at lower levels,resulting in lower common mode EMI.

    (6) Connection of the power planes to high frequency IC power pins shouldbe as close to the IC pins as possible. Faster rise times may requireconnections directly to the pads of the IC power pins.

    (7) Analog and digital circuits are susceptible to interaction when located inclose proximity to each other. These should be located on different layers ofthe PC board whenever possible. If the circuits must be located on thesame layer, they should be separated into analog and digital areas with

    proper isolation layout.

    (8) High frequency traces, such as those used for clock and oscillatorcircuits, should be contained by two ground planes. This provides formaximum isolation. The reactance of a trace or conductor can easily

    exceed its dc resistance as frequency increases. If this trace is run close toits ground plane, the inductance can be reduced by about one third.

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    (9) Additional EMI preventive measures for clock/oscillator traces include theutilization of guard traces grounded to the ground plane at several locations.The shielding of clock and oscillator components with foil or small metallicenclosures may also be needed.

    (10) Overall circuit cross-talk increases by a factor of two whenever the clock

    rate is doubled. EMI radiation and cross-talk may be reduced by minimizingthe PC board trace height above the ground plane.

    (11) PC board edge radiation may be the result of traces being located tooclose to the board edge. This can be minimized by keeping traces at adistance of at least 3 times the board thickness away from the board edge.

    (12) PC board trace stacking should be avoided if possible. Otherwise, itshould be limited to one trace height in order to reduce radiation, cross-talkand impedance mismatches.

    (13) Parallel traces are often susceptible to cross-talk. These should be

    separated by at least 2 trace widths for cross-talk reduction.

    Decoupling, Bypassing and Filtering

    (1) EMI filters can be used as a shunt element to divert electrical currentsfrom a trace or conductor; as a series element to block a trace or conductorcurrent; or they may be used as a combination of these functions. Selectionof the filter elements should always be based on the desired frequency

    range and component characteristics. A low pass filter can be useful forreducing most high frequency EMI problems. It incorporates a capacitiveshunt and series resistance or inductance. However, at frequency extremes,

    the capacitor can become inductive and the inductor can become capacitivecausing the filter to act more like a band-stop filter. The filter design typeshould be based on the overall impedance at the circuits point of application

    for proper match. A T-filter design is effective for most EMI applications andis ideal for analog and digital I/O ports.

    (2) Capacitors may be used for signal filtering and power source decoupling

    within their high frequency performance characteristics. However, theirinternal and external inductance can limit performance at high frequencies.Ceramic capacitors are recommended for the high frequencies, particularlythose in the GHz range. A capacitor providing a reactance of less than 1

    Ohm at the frequency of concern should suffice. Capacitor lead and tracelengths must be short at the high frequencies in order to prevent the addition

    of inductive reactance.

    (3) PC board bypass capacitors used at high frequencies (greater than 100MHz) should utilize surface mount technology (SMT) with vias close enoughto the mounting pad to minimize or eliminate the traces. The via holes

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    should be large (greater than .035 inch in diameter) and the PC boardshould be thin enough to bring power and ground planes near the body ofthe capacitor (less than .030 inch thick). Proper design layout of the bypasscapacitors can greatly reduce the power and ground circuit noise by loweringthe overall effective inductance of the capacitors.

    (4) Wire wound ferrite inductors may be used for EMI emissions andimmunity filtering at lower RF frequencies. These can supply from about 1microhenry to 1 millihenry of inductance. However, they can become acapacitor above their resonant frequency and are useless in the most

    common EMI frequency range of 50 MHz to 500 MHz. Ferrites and ferritebeads are recommended for higher frequency applications where theybecome lossy and act more like a resistor. Select a ferrite impedance ofabout 100 to 600 Ohms at the frequencies of concern.

    (5) Shielded I/O cable connectors equipped with bypass capacitors or filterpins should be used whenever possible.

    (6) I/O filters should be inside of the I/O connector (as with filter pins) instead

    of on the PC board.

    (7) I/O bypass capacitors should be mounted at the I/O connector instead ofon the PC board.

    (8) I/O ferrites should be mounted inside of the I/O connector instead of onthe PC board.

    (9) A snap-on ferrite bead at the I/O cable connector can provide 3 to 5 dB ofcommon mode absorption.

    (10) Multiple ferrites may be used to reduce radiation by up to 10 dBdepending on their characteristics at the frequency of interest.

    (11) Ferrite beads are available in high-Q resonant and low-Q non-resonant(absorptive) types. The low-Q beads are recommended for digital circuits

    and filtering applications.

    (12) External cable or I/O connector filters can provide for a common moderejection of greater than 10 dB.

    Cables and Connectors

    (1) Cables should be grouped according to their function such as power,analog, digital, and RF.

    (2) Separate connector assemblies should be used for analog and digital

    signals.

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    (3) Analog and digital connectors should be located as far apart as possible.

    (4) Analog and digital signal pins should be separated by unused groundedpins when sharing the same I/O connector.

    (5) Individual pins should be used inside the I/O connector for each signalreturn so that all return circuits remain separated.

    (6) Connector crosstalk may be reduced by using separate power andground pins for each signal and by reducing the circuits loading and currentflow.

    (7) Cable shields should be grounded to equipment housing at the I/Opoints.

    (8) Shielded I/O cables are most effective if grounded at both ends.

    (9) Cable common mode currents should be removed at the equipments

    metal housing prior to internal connections.

    (10) Cables should be routed close to ground planes, shielded structures,and cable trays.

    Grounding

    (1) Use ground planes instead of vectorial traces.

    (2) Ground traces should be as short and thick as possible.

    (3) Decouple signal and RF circuit grounds.

    BACK

    Copyright 1997-2005 RADIOING.com, eEngineer. All Rights Reserved.

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