emi driven by pi

7/27/2019 EMI Driven by PI

1/72

2008 Ansoft, LLC All rights reserved. Ansoft, LLC Proprietary

EMI Driven by PI


2/72


Outline

SI + PI = EMI These disciplines are no longer independent of each other

Fundamentals of EMI

Where does it come from and how is it minimized Five Step EMC Design Flow

Power Integrity design methodology to reduce EMI

Fundamentals of Power Integrity Design Process to meet design specs in the Time and Frequency

domain

2nd Presentation on EMI Driven by SI

Fundamentals of Signal Integrity

Crosstalk is the main contributor to EMI

Case studies that show perils of crosstalk in real world designs


3/72


SI/PI/EMI Design Overview

Driver IC

Control IC Memory

Power Supplies

Display Panel

Signal Integrity- Impedance

- Crosstalk

- Reflection

- Termination

- Dielectric Losses

Power Integrity- Switching Noise

- Impedance Profile

- Power/Gnd Plane Resonance- Decoupling Capacitors

EMI/EMC- Common mode radiation

- Differentialmoderadiation

PCB

Pwr Noise

Signal

Signal Integrity

Time DomainFrequency Domain

Power IntegrityElectromagnetic

Interference


4/72


Three Basic Elements of EMC

EMI source

EMI source

Capacitive Inductive RadiativeConductive

Space & FieldConduction

EMS

EMS

Low & Middle Frequency

LC Resonance

High FrequencyLow, Middle & High

Frequency

Coupling process

Immunity

Emission

Shields

ShieldsEMI Filters

EMI Filters

Shields

Shields Shields

Shields Shields

ShieldsEMI Filters

EMI Filters


5/72


Loop Mode & Common Mode Noise

A PC Board & Cables

A Driver & Receiver

A victim device

Loop mode

current

Common modecurrent

by AC Analysis ofQ3D Extractor

Differential mode current flows --- Loop

Common mode current flows --- Open

We can see Common mode current is

more serious than Normal mode.


6/72 2008 Ansoft, LLC All rights reserved. Ansoft, LLC Proprietary

Antenna theory

r

AI)(f.E

-

sin106131

216

=r

lIfE

sin)(1047

=

-A Differential mode current flow Loop antenna theory

-A Common mode current flow Dipole antenna theory

Illustration of a loop antenna Illustration of a dipole antenna

r : distance r

Length :l

A : area of the loop

FCC B level Mag. E limit :40dBuV/m @ 3m

Mag. E( Loop antenna) : 20mA

Mag. E( Dipole antenna) : 8uA

II



EMC Design Flow

Planes deliver power to ICs and return

path for signal

Ensure that Plane impedance is smooth

and low over broad frequency range

Resonance Analysis

Emissions Analysis

Impedance Analysis

Signal Extraction

Enclosure Simulation



EMC Design Flow

Resonance Analysis

Emissions Analysis

Impedance Analysis

Signal Extraction


Resonances indicate areas of high

impedance and EMI potential

Ensure power planes do not resonant incritical locations



EMC Design Flow

If signal is not at the receiver, it went

somewhere else

Ensure clean signal transmission andgood return path for critical nets

Resonance Analysis

Emissions Analysis

Impedance Analysis

Signal Extraction




EMC Design Flow

Non-ideal planes and tight routing can

lead to unintentional signals

Ensure there are no unintentional

radiators

Resonance Analysis

Emissions Analysis

Impedance Analysis

Signal Extraction




EMC Design Flow

Real enclosures are non-ideal andcan pass radiation

Ensure minimal radiation from PCB

escapes the chassis holes

Resonance Analysis

Emissions Analysis

Impedance Analysis

Signal Extraction




Electromagnetic

InterferencePower Integrity

PI Methodology

Signal Integrity



Power Integrity A Case Study

Active devices require clean power to operatecorrectly

Power distribution system (PDS) design engineers

must ensure that all parts receive voltage betweencertain limits and that noise is kept sufficiently low

Todays designs with many separate power domainsof high current and low voltage devices complicate

power integrity analysis



Board Imported from Layout

Measuring

impedance at

the six VCCpins on U41

VRM



PDS Design Flow

EM extractionof impedance

for criticaldevices

Determinefrequencies ofspecification

violations

Simulate intime domain to

check forcompliance

Choose capacitoror geometric

change to addressviolations

Alter design

according tofindings

Start Finish

No

Yes



1MHz1KHz

Switching

Power

Supply

Electrolytic

Bulk

Capacitors

High

Frequency

CeramicCapacitors

Power/Ground

Planes

BuriedCapacitance

1 GHz

100MHz

f

|Z|

targetZ

Mag. of Z

( ) ( )Current

RippleAllowedVoltageSupplyPowerZ

___ =Target

Frequency Domain PDS Targets



Defining the Target Impedance

0

0

0

VRM

VRM

VRM

50

R5

V33

DC=VCC

V35

io

pullup

pulldown

logic_in

enableout_of_in

Cpkg

C58

Lpkg

L59

Rpkg

R60

AName=vrm

To define the targetimpedance we need to

consider two factors:

Peak current Determines maximum

impedance

Spectral power Determines cutoff

frequency

Package Model

Driver

VRM



Peak driver current37.87 mA

Example:

Six drivers and 0.18 V

maximum voltage swing:

Peak Current

0.00 5.00 10.00 15.00 20.00 25.00 30.00 35.00 40.00 45.00 50.00Time [ns]

0.00

5.00

10.00

15.00

20.00

25.00

30.00

35.00

40.00

mag(Ipositive(vrm))[mA]

Ansoft Corporation DriverDriver Current

Curv e Inf o max

mag(Ipositive(vrm))

Transient37.8706

( )= m800

mA87.376

V18.0



0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20.4

0.5

0.6

0.7

0.8

0.9

1

Frequency [GHz]

CDF

0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00Spectrum [GHz]

1.00E-012

1.00E-011

1.00E-010

1.00E-009

1.00E-008

1.00E-007

1.00E-006

1.00E-005

1.00E-004

1.00E-003

mag(vrm_

power)

Ansoft Corporation DriverXY Plot 4Curve Info

mag(vrm_pow er)

Transient

Driver Spectrum

Choose a frequency below

which most of the signal

energy lies

667 MHz = 97% of Spectrum

667 MHz

CDF



Power Integrity Investigation

Added two bulk

47 uF capacitors

as specified by

VRMmanufacturer



Bare Board vs. Bulk Capacitors

Resonance @ 50 MHz Bare BoardBoard w/

Bulk Caps

Target

impedance 800

mOhm to 667

MHz



V33

DC=VCC0

J5_VCC

Time Domain Schematic

VCC_U41-21

VCC_U41-42

VCC_U41-44

VCC_U41-63

VCC_U41-84

J5_VCC

VCC_U41-2

J5_VCC

VCC_U41-2

VCC_U41-21

VCC_U41-42

VCC_U41-44

VCC_U41-63

VCC_U41-840

50

R5

VCC_U41-2

V35

io

pullup

pulldown

logic_in

enableout_of_in

VCC_U41-2

0

Cpkg

C58

Lpkg

L59

Rpkg

R60

x6

800 Mbps data rate

DDR2 IBIS driver into idealtermination used as load for PDS

Package decoupling modeled

using a capacitor w/ ESR, ESL

Driver

VRM

Board


23/72


Switching Power Noise

0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 100.00

Time [ns]

1.20

1.40

1.60

1.80

2.00

2.20

2.40

Y

1

[V]

Ansoft Corporation BulkU41 Power

Cur ve Inf o pk2pk

V(VCC_U41-2)

Transient0.6787

V(VCC_U41-21)

Transient0.6995

V(VCC_U41-42)

Transient0.8191

V(VCC_U41-44)

Transient0.7597

V(VCC_U41-63)

Transient0.7882

V(VCC_U41-84)Transient

0.6858

Shaded area represents time

domain violation of 1.8 V 10%

~11-12 ns

period

Bulk Only

3Meter FF


24/72


Choosing a Decoupling Capacitor

To reduce the effect of aresonance, choose a

capacitor with a low

impedance at theresonant frequency

Board w/

Bulk Caps

22 nF

Capacitor


25/72


Bulk vs. HF Capacitors 1

No Resonance @ 50 MHz

Board w/Bulk Caps

Board w/

HF Caps 1

Target

impedance 800

mOhm to 667

MHz


26/72


0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 100.00

Time [ns]

1.20

1.40

1.60

1.80

2.00

2.20

2.40

Y1[V]

Ansoft Corporation HF1U41 Power

Curve Info pk2pk

V(VCC_U41-2)

Transient0.6481

V(VCC_U41-21)

Transient0.6979

V(VCC_U41-42)

Transient0.8802

V(VCC_U41-44)

Transient0.9182

V(VCC_U41-63)

Transient0.6925

V(VCC_U41-84)

Transient 0.7319


Shaded area represents time

domain violation of 1.8 V 10%

Bulk Only

3Meter FF


27/72


Extending Low Impedance

10 1.2 nF capacitorswere added across the

board to extend

minimum high-frequencyimpedance

1.2 nF capacitor was

chosen due to low

impedance at 200 MHz

4 of these were locatednear U41


28/72


HF 1 vs. HF 2

New resonance @ 80 MHz

Impedance exceeds

800 mOhm @ 350 MHz

Board w/HF Caps 1

Board w/

HF Caps 2

Target

impedance 800

mOhm to 667

MHz


29/72



0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 100.00

Time [ns]

1.20

1.40

1.60

1.80

2.00

2.20

2.40

Y1[V]

Ansoft Corporation HF2U41 Power

Curve Inf o pk2pk

V(VCC_U41-2)

Transient0.2552


0.2857

V(VCC_U41-42)

Transient0.2930

V(VCC_U41-44)

Transient0.4047

V(VCC_U41-63)

Transient0.3083

V(VCC_U41-84)

Transient0.3359

Shaded area represents time domain specification 1.8 V 10%


30/72


Removing a Resonance

Six 8 nF capacitors wereadded near U41 to

cancel resonance at 80

MHz

Added capacitors

U41


31/72


HF 2 vs. HF 3

No resonance @ 80 MHz

Impedance crosses

800 mOhm @ 500

MHz

Board w/HF Caps 2

Board w/

HF Caps 3

Target

impedance 800

mOhm to 667

MHz


32/72


0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 100.00

Time [ns]

1.20

1.40

1.60

1.80

2.00

2.20

2.40

Y1[V]

Ansoft Corporation FinalU41 Power

Curve Inf o pk2pk

V(VCC_U41-2)

Transient0.2416


0.2685

V(VCC_U41-42)

Transient0.2660

V(VCC_U41-44)

Transient0.3264

V(VCC_U41-63)

Transient0.3709

V(VCC_U41-84)

Transient0.3142


Shaded area represents time domain specification 1.8 V 10%

Maximum peak to peak noise of 371 mV


33/72


Buried Capacitance

Due to parasitic inductanceit is impossible to decouple

the board with capacitors atfrequencies greater than afew hundred MHz

Using a thinner dielectriclayer between power andground planes introducesadditional capacitance andreduces high frequencyimpedance

d

AC =

Capacitance of

parallel plates:


34/72


HF 3 vs. Buried Capacitance

Impedance crosses

800 mOhm @ >667

MHz

Board w/HF Caps 3Board w/

Buried

Capacitance

Target

impedance 800

mOhm to 667

MHz

Target impedance specification met


35/72


0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 90.00 100.00

Time [ns]

1.20

1.40

1.60

1.80

2.00

2.20

2.40

Y

1

[V

]

Ansoft Corporation BuriedU41 Power

Cur ve Inf o pk2pk

V(VCC_U41-2)

Transient0.2177


0.2295

V(VCC_U41-42)

Transient0.2418

V(VCC_U41-44)

Transient0.2549

V(VCC_U41-63)

Transient0.2729

V(VCC_U41-84)

Transient0.2169


Maximum peak to peak noise 273 mV

24% smaller than limit

Shaded area represents time domain

specification 1.8 V 10%

Time-domain noise specification met3Meter FF

SpecificationSpecification

Met!Met!


36/72


Conclusions

SI / PI / EMI are all based on the sameelectromagnetic fundamentals and cannot be

separated

Impedance and resonant mode simulations connectthe frequency domain to the spatial domain and allow

selection of capacitor value and placement

Frequency domain extractions are useful for quickly

optimizing PDS designs, but time domain simulations

are necessary to ensure compliance with device specs Using a single design environment can help reuse the

same models for SI/PI/EMI simulations


37/72


Questions

Any Questions?Any Questions?


38/72


EMI Driven by Signal Integrity

Fundamentals of Coupled SI/PI/EMI

Part 2

Aaron Edwards


39/72


SI + PI = EMI

Trend: Cost / Performance targets drive theintegration of ICs, SoCs, and SiPs onto low cost

printed circuit boards.

Chip/Package/Board Co-design is required

POWER INTEGRITY

SIGNAL INTEGRITY

EMC/EMI

Far Field - CPM2 - 1.27v Baseline

-20.00

-10.00

0.00

10.00

20.00

30.00

40.00

50.00

60.00

0.00 0.50 1.00 1.50 2.00

GHz

dBuV/m_

Where is the problem?


40/72



Intentional Signals

Focus on Clock and High Speed Signals

Stripline not necessarily better than Microstrip

Examine Clock Harmonics filter if necessary

Differential signaling is a standard to improve signal-to-

noise ratios, however, its use always leads to Common

mode noise Common Mode Conversion

SCD11=0.5*(S(1,1)-S(1,3)+S(3,1)-S(3,3))

SCD21=0.5*(S(2,1)-S(2,3)+S(4,1)-S(4,3))



41/72



Unintentional Signaling

Common mode will always existCommon Mode noise is the main contributor to EMI

How? Through Crosstalk

Beware the low speed nets; use post-layout analysis to scan

for unintended coupling

Coupling may be direct, through intermediate metal or even

from plane cavities

This presentation focuses on crosstalk, the primary SI

contributor to EMI radiation

Crosstalk


42/72


Crosstalk

Definition and Sources

Signal integrity examines the quality of transmittedwaveforms through a physical interconnect; Traces,

connectors, vias, etc

Crosstalk is the coupling of energy from one currentcarrying conductor to another. It occurs when the

electromagnetic fields from one conductor interferes

with another conductor, thus changing its desired

characteristics

There are 2 main components to Crosstalk:Mutual Inductance and Mutual Capacitance

How to calculate crosstalk


43/72



Mutual Inductance

Mutual Inductance induces current from an aggressor line

onto a victim line by the magnetic field.

The noise voltage that is injected onto the victim line can becalculated by 2 methods

Method #1 Method #2

Analytical Calculation Field Solution

Vnoise,Lm = Lm di/dt



44/72



Mutual Capacitance

Mutual Capacitance is the coupling between 2 conductors

via the electric field.

The induced noise that shows up on the victim net can becalculated by 2 methods

Method #1 Method #2

Analytical Calculation Field Solution

Inoise,Cm = Cm dv/dt

C li Di t t C t lk St th


45/72


Coupling Dictates Crosstalk Strength

Near and Far End Crosstalk The magnitude of the Mutual Capacitive and Inductive Coupling will determine the amountof current induced on the victim net. The summation of these currents determine near and

far end crosstalk

ICM

ICM

ILM

Inear= ICM + ILM

Ifar= ICM - ILM

A l ti l C t lk C l l ti


46/72


Analytical Crosstalk Calculations

Driven Line

Un-driven Linevictim

Driver

Zs

Zo

Zo

Zo

Near End

Far End LCXTD =

+=

C

C

L

LVA MM

input

4

=

C

C

L

L

T

LCXVB MM

r

input

2

Terminated Victim

C

LZO =

TD

Tr ~Tr Tr

AB

VaVb=[NEXT]CrosstalkEnd-Near

Va

Vb=[kb]tCoefficienCrosstalk

Back of the envelope calculations can beused as a quick check:

Source signal

Far End of Source SignalNear-end X-talk

Far-end X-talk

A l ti l C t lk C l l ti E l


47/72


Analytical Crosstalk Calculation Example

nspFnHinLCXTD 139.026.2*55.81 ===

mVpF

pF

nH

nHmv

C

C

L

LV

AMMinput

5626.2

389.0

55.8

39.2

4

500

4 =

+=

+=

mVpF

pF

nH

nH

ps

pFnHinmV

C

C

L

L

T

LCXV

BMM

r

input

3726.2

389.0

55.8

39.2

100*2

26.2*55.81*500

2 =

=

=

TD

Tr ~Tr Tr

A

B

Trace Width 13mil

Height 10mil

Trace

Separation

7mil

Thickness 2mil

Dk 3.55

Vsource 1V

Vinput 500mV

Trace Length 1in

Source Impedance 50ohms

Termination

Impedance

61.5ohm

s

Risetime 100ps

Delay Time 200ps

8.55nH 2.39nH

2.39nH 8.55nHL /inch=

2.26pF 0.389pF0.389pF 2.26pF

C/inch=

ohmpF

nH

C

LZO 5.61

26.2

55.8===

Field Sol tion Crosstalk E ample


48/72


Field Solution Crosstalk Example

m2(A) = 57.4mVm1 (B) = -37.2mV

m4-m3 (TD) = 0.1359ns

HFSS

2D ExtractorSIwave

Same example using Method #2 Field solutions

Parameterization Captures Trends


49/72


p

Impact of Length and Spacing

Trace Length

= 1,2,3,10in

As Length

increases, Ifaraccumulates

As Trace

Spacing

increases,

Ifardecreases

As Trace

Spacing

increases,

Inear

decreases

Trace Spacing=

7, 12, 17, 22, 27mil



50/72



Crosstalk Increase DecreaseCm

Lm

Trace

Spacing

GND Plane

Distance

Dk

Trace Width

Under-etching

NE FE NE FE

Good Coupling, when Xtalk is desired


51/72


p g,

Differential Signaling

Why Differential Signaling?

When lines are tightly coupled, noise affects bothlines. Thus at the receiver, the difference between the

two lines remains constant

Stray transient noise on the two conductors will self-

cancel, which leads to a reduction of noise from the

power supply

Because differential signaling creates a known return

path, signal quality will significantly improve in the

presence of non-ideal ground return paths, or other

discontinuities such as connectors, wirebonds, vias,

etc..

Good Coupling


52/72


p g

Differential Signaling

Back of the envelope calculations of Differential and Common Mode Impedancecan be used as a quick check

Lodd = L11 L12 Leven = L11 + L12Codd = C11 + C12 Ceven = C11 - C12

Zdifferential = 2*Zodd Zcommon = ()*Zeven

1211

1211

CCLL

CLZ

even

eveneven

+==

1211

1211

CCLL

CLZ

odd

oddodd

+==

Electric Field

Magnetic Field

Electric Field

Magnetic Field

3D Crosstalk Needs Field Solution


53/72


3D Crosstalk Needs Field Solution

2.2 inch total length

of trace.

88 mil via transition

Near-End

Probe

Far-End Probe

Peak Near-End Crosstalk: 25mV

Peak Far-End Crosstalk: -21.8mV

Bad Coupling


54/72


Via Transition

Peak Near-End Crosstalk: 13.1mV

Peak Far-End Crosstalk: -14mV

Total length of parallel viarouting is 4% of the total length.

Yet the Near-End Crosstalk only

reduces by 48%.

The Far-End Crosstalk only

reduces by 36%Near-End

Probe

Far-End Probe

2.2 inch total length of trace

88 mil via transition

Bad Coupling


55/72


Via Transition

Peak Near-End Crosstalk: 19mV

Peak Far-End Crosstalk: -20mV

Near-End ProbeFar-End Probe

Added Ground Vias

Peak Near-End Crosstalk: 10.3mV

Peak Far-End Crosstalk: -10.9mV

Total length of parallel viarouting is 4% of the total

length.

Yet the Near-End Crosstalk

only reduces by 24%.

The Far-End Crosstalk only

reduces by 8%

Chip/Package/Board Co-Design


56/72


Electromagnetic


Case #1

Signal Integrity

Capturing the Complete System


57/72


Designer

Nexxim

Ansoft EMI Design Flow

Resonance Analysis

Impedance Analysis

Near field plots

Far field plots

S.O.C.

DatabaseCPM Package

Database

PCB

Database

SIwave

S-Parameters

Frequency-

Domain

Voltages

Package and Board Models


58/72


Case #1

Package has beenmerged onto board

Coupling between the

bondwires, leadframe,and board are

simulated

Apaches Chip Power Model


59/72


Apache s Chip Power Model

VDDVDD

VDDQVDDQ

CPM I/O Interface

Chip Power Model

VSSVSS

SIGSIG

SIwave Full-Wave

Package/PCB Model

Input

Buffer

Level

ShifterBuffer

PCBPackage

Designer & Nexxim


60/72


Designer & Nexxim

Drive VDDs with CPM

Capture coupled high-

frequency noise

Run Near/Far-Field

Simulations using

transient results

SIwave

Model

CPM

Model

Terminations

Time and Frequency Domain Results


61/72


Time and Frequency Domain Results

Far Field - 1.27V - No Decaps - Baseline

-20.00

-10.00

0.00

10.00

20.00

30.00

40.00

50.00

60.00

0 0.5 1 1.5 2

GHz

dBuV/

m__

Transient Power Noise 3m Far Fields

Near Fields at 1GHz


63/72


Electromagnetic


Case #2

Signal Integrity

Ansoft Virtual Chamber


64/72


Ansoft Virtual Chamber

27

Driver settings

Solving the Field Solution

U i Ti D i I f ti


65/72


Using Time Domain Information

28

FFT of Transient Data Near/Far Fields

Computed in

SIwave and HFSS

Time Frequency Radiation

Agreement captured in simulation


66/72


g p

ONLY PCB Spectrum

10 M Measurement

SIwave

Excessive Common Mode coming from

D i


67/72


Glitch seen in

falling

waveform;

this will

create

Common

Mode Noise

Driver

Ideal DriverOriginal Driver

Transient Waveform

Common Mode Spectrum

Intentional Signaling contributing to EMI


68/72


Intentional Signaling contributing to EMI

Ideal DriverOriginal Driver

Even

Harmonics are

now absentbut EMI is still

high

Problemis not just

common

mode

Adding a filter to reduce problematic

hi h h i


69/72


higher harmonics

Pi Filter added to driver

output to squelch higher

harmonics of 13.56 MHz

clock

Component values

optimized in

Designer

Reduced Common Mode after filtering


70/72


educed Co o ode a te te g

Ideal Driver

Transient Waveform

Common Mode Spectrum

Filtered Driver

Signal integrity still OK but

high frequency spectrum is

reduced

EMI from Intentional and Unintentional

Si li d


71/72


Signaling suppressed

Filtered DriverOriginal Driver

EMI is now

sufficientlysuppressed

Conclusions


72/72

Crosstalk is major concern for SI Need to examine all relevant coupling: vias, traces, etc.

Simulation can help determine acceptable levels of coupling

Target impedance helps ensure good PI

Target impedance is defined in Frequency domain

Need to verify ripple in time domain

EMC is comprised of good PI and SI Poor plane design can spread common mode noise

Unintentional coupling is a big source of radiated emissions

emi driven by pi

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