eng241 digital design week #5 arithmetic circuits

ENG241 ENG241 Digital DesignDigital Design

Week #5 Arithmetic Circuits

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TopicsTopics

Binary Adders Binary Ripple Carry Adder 1’s and 2’s Complement Binary Subtraction Binary Adder-Subtractors Binary Multipliers BCD Arithmetic

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ResourcesResources

Chapter #5, Mano Sections 5.2 Binary Adders 5.3 Binary Subtraction 5.4 Binary Adders-Subtractors 5.5 Binary Multiplications 5.7 HDL Representations -- VHDL

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Half AdderHalf Adder

S = XY’ + X’Y = X Y C = X.Y

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Recall: Arithmetic -- additionRecall: Arithmetic -- addition

Binary similar to decimal arithmetic

+ 10001

00110

1 1 1 0 1

No carries 1 0 1 1 0 0

1 0 1 1 0

+ 1 0 1 1 1

1 0 1 1 0 1

Carries

Remember: 1+1 is 2 (or (10)2), which results in a carry1+1+1 is 3 (or (11)2) which also results in a carry

6

Full AdderFull Adder

Three inputs: X Y Third is Cin Z

Two outputs: Sum Cout

S

Full Adder

x y

ZCout

Implementation?

7

Straight Forward Implementation:

What is this?

Z

S

K Map for S

8

YZXZXYC

Y

X

Z

Y

Z

X

C

Straight Forward Implementation:

K Map for C

9

Implementation IssuesImplementation Issues

If we try to implement the Optimized Boolean functions directly we will need how many gateshow many gates? Seven AND gates and two OR Gates!!

Can we do better? Share Logic Hierarchical Design.

YZXZXYC

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Any Alternatives?Any Alternatives?

Try to make use of hierarchy to design a 1-bit full adder from two half adders.

Also, try to share logic between the Sum output and Carry output.

Half Adder S = X Y C = XY

Full Adder S = X Y Z C = XY + XZ + YZ

11

A Different Way to Represent CA Different Way to Represent C

1

1 1 1

X

YZ

0

1

00 01 11 10

XY

XYZ

XYZ

C = XY + XYZ + XYZ

C = XY + Z (XY + XY)

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Two Half Adders (and an OR)Two Half Adders (and an OR)

How many Gates do we need?

Full Adder

x y

ZC

S

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Binary Ripple-Carry AdderBinary Ripple-Carry Adder

A Parallel binary adder is a digital circuit that produces the arithmetic sum of two binary numbers using only combinational logic.

The parallel adder uses “n” full adders in parallel, with all input bits applied simultaneously to produce the sum.

The full adders are connected in cascade, with the carry output from one full adder connected to the carry input of the next full adder.

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Binary Ripple-Carry AdderBinary Ripple-Carry Adder

Straightforward – connect full adders Carry-out to carry-in chain

C0 in case this is part of larger chain, maybe just set to zero

15

Hierarchical 4-Bit AdderHierarchical 4-Bit Adder

We can easily use hierarchy here1. Design half adder

2. Use TWO half adders to create full adder

3. Use FOUR full adders to create 4-bit adder

VHDL CODE?

16

VHDL Half Adder (DATA FLOW)VHDL Half Adder (DATA FLOW)

entity half_adder is

port (x,y: in std_logic;

s,c: out std_logic);

end half_adder;

architecture dataflow of half_adder is

begin

s <= x xor y;

c <= x and y;

end dataflow

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VHDL Full Adder (Structural)VHDL Full Adder (Structural)

entity full_adder is

port (x, y, z: in std_logic;

s, c: out std_logic);

end full_adder;

architecture struc_dataflow of full_adder is

hs

hc

tc

component half_adder

port (x, y : in std_logic;

s, c : out std_logic);

end component;

signal hs, hc, tc: std_logic;begin

HA1: half_adder

port map (x, y, hs, hc);

HA2: half_adder

port map (hs, z, s, tc);

c <= tc or hc;

end struc_dataflow

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Any Problems with this Design?Any Problems with this Design?

Delay Approx how much?

Imagine a 64-bit adder Look at carry chain

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Carry Propagation & DelayCarry Propagation & Delay

One problem with the addition of binary numbers is the length of time to propagate the ripple carry from the least significant bit to the most significant bit.

The gate-level propagation path for a 4-bit ripple carry adder of the last example:

Note: The "long path" is from A0 or B0 through the circuit to S3.

A3B3

S3

B2

S2

B1

S1 S0

B0

A2 A1 A0

C4

C3 C2 C1 C0

SubtractionSubtraction

We managed to design an Adder easily. For subtraction, we will also need to design a

Subtractor!! Can we perform subtraction using the Adder

Circuit we designed earlier? YES, we can use the concept of Complements.

X = Y – Z X = Y + complement(Z)

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Complements?Complements?

There are two types of complements two types of complements for each base-r system The radix complement, the (r’s) complement. The diminished radix complement, (r-1)’s comp.

For Decimal System 10’s complement 9’s complement

For Binary Systems 2’s complement 1’s complement

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Complements of Decimal SystemComplements of Decimal System

The 9’s complement of a decimal number is obtained by subtracting each digit from 9. Example: The 9’s complement of 546700 is 999999 – 546700 = 453299

The 10’s complement is obtained by adding 1 to the 9’s complement: Example: The 10’s complement of 546700 is 999999 – 546700 = 453299 + 1 = 453300 Or, 1000000 – 546700 = 453300 Or, leave all least significant 0’s unchanged, subtract

the first nonzero LSD from 10, and subtract all higher significant digits from 9.

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UnsignedUnsigned Decimal Subtraction Decimal Subtraction

Using 10’s complement, perform the subtraction 72532 – 3250. No complements: 72532 – 3250 = 69282

M = 72532 (5-digits), N = 3250 (4-digits) Since N has only 4 digits append a zero N=03250 10’s complement of N (03250)

99999 – 03250 = 96749 + 1 = 96750 Now add Now add M to the 10’s comp of N

72532 + 96750 = 169282 (carry occurred) The occurrence of the end carry indicates that M > N Discard end carry (169282 – 100000 = 69282)

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Example #1

Using 10’s complement, perform the subtraction 3250 - 72532. No complements: 3250 - 72532 = - 69282

M = 3250 (4-digits), N = 72532 (5-digits) Since M has only 4 digits append a zero M=03250 10’s complement of N (72532)

99999 – 72532 = 27467 + 1 = 27468 Now add Now add M to the 10’s comp of N

03250 + 27468 = 30718 (There is no end carry!) No end carry indicates that M < N (make correction) Answer: -(10’s complement of 30718) = -69282

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UnsignedUnsigned Decimal Subtraction Decimal Subtraction

Example #2

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Binary SubtractionBinary Subtraction

We’ll use unsigned subtraction to motivate use of complemented representation

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1’s Complement1’s Complement

1’s Complement (Diminished Radix Complement)

● All ‘0’s become ‘1’s

● All ‘1’s become ‘0’s

Example (10110000)2

(01001111)2

If you add a number and its 1’s complement …

1 0 1 1 0 0 0 0

+ 0 1 0 0 1 1 1 1

1 1 1 1 1 1 1 1

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1’s Complement: Example1’s Complement: Example

Notice that the 1’s complement of the number 1011001 can be obtained by complementing each bit

2n - 1 1 1 1 1 1 1 1

- N 1 0 1 1 0 0 1

1’s Compl. 0 1 0 0 1 1 0

2828

2’s Complement2’s Complement

2’s Complement (Radix Complement)

● Take 1’s complement then add 1

● Toggle all bits to the left of the first ‘1’ from the right

Example:

Number:

1’s Comp.:

0 1 0 1 0 0 0 0

1 0 1 1 0 0 0 0

0 1 0 0 1 1 1 1

+ 1

OR

1 0 1 1 0 0 0 0

00001010

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2’s Complement: Example2’s Complement: Example

Notice that the 2’s complement of the number 011001 can be obtained by complementing each bit and adding 1.

2n 1 0 0 0 0 0 0

- N 0 1 1 0 0 1

1’s Comp 1 0 0 1 1 0

2’s Compl. 1 0 0 1 1 1

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ExampleExample

Borrow 1 1 1 0 0

(M) Minuend 1 0 0 1 1

(N) Subtrahend - 1 1 1 1 0

Difference 1 0 1 0 1

19 – 30 = 21 !!!!!

Incorrect Result!!

Minuend is smaller than Subtrahend

How can we know if the result is incorrect? How to fix the problem?

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ExampleExample

Borrow 1 1 1 0 0

(M) Minuend 1 0 0 1 1

(N) Subtrahend - 1 1 1 1 0


Correct Diff - 0 1 0 1 1

If no borrow, then result is non-negative (minuend >= subtrahend).

Since there is borrow, result must be negative.

The result must be corrected to a negative number.

19 – 30 = -11

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Algorithm: Subtraction of two n-digit Numbers M-N can be done as follows

1. Subtract N from M If no borrow, then M N and result is OK! Otherwise, N > M so result must be

subtracted from 2n and a minus sign should be appended

2. NOTE: Subtraction of a binary number from 2n to obtain an n-digit result is called 2’s complement

3. Circuit?

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Adder/Subtractor Circuit!!Adder/Subtractor Circuit!!

Binary Adder Binary Subtractor

EXPENSIVE!!

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How to get rid of Subtraction Operation?How to get rid of Subtraction Operation?

Use complements of numbers to replace the subtraction operation with addition only.

Any Idea?

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Subtraction of Subtraction of Unsigned NumbersUnsigned Numbers Using ComplementsUsing Complements

1. M – N Equivalent to M + (2’s complement of N)

2. Add (2’s complement of N) to M This is M + (2n – N) = M – N + 2n

Notice we are using addition to achieve subtraction.

3. If M N, will generate will generate carry! • Discard carry• Result is positive M - N

4. If M < N, no end carry no end carry will be generated! • Take 2’s complement of result• Place minus sign in front

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ExampleExample

X = 1010100 minus Y = 1000011 Notice that X > Y The 2’s complement of Y=1000011

is obtained first by getting the 1’s complement 0111100 and then adding 1 (0111101)

X 1 0 1 0 1 0 0

+ 2’s comp Y 0 1 1 1 1 0 1

Sum 1 0 0 1 0 0 0 1

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Example 2Example 2

Y = 1000011 minus X = 1010100 Notice Y < X

No end carry Answer: - (2’s complement of Sum) - 0010001

Y 1 0 0 0 0 1 1

+ 2’s comp X 0 1 0 1 1 0 0

Sum 1 1 0 1 1 1 1

We said numbers are unsigned. What does this mean?

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Adder-SubtractorAdder-Subtractor

I. By using 2’s complement approach we were able to get rid of the design of a subtractor.

II. Need only adder and complementer for input to subtract

III. Need selective complementer to make negative output back from 2’s complement

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Selective 1’s Complementer?Selective 1’s Complementer?

ControlWhen X = 0 we transfer Y to output

When X = 1 we complement Y

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DesignDesign

Inverts each bit of B if S is 1

Adds 1 to make 2’s complement

S low for add,high for subtract

4141

Negative NumbersNegative Numbers

Computers Represent Information in ‘0’s and ‘1’s

● ‘+’ and ‘−’ signs have to be represented in ‘0’s and ‘1’s

3 Systems

● Signed Magnitude

● 1’s Complement

● 2’s Complement

All three use the left-most bit to represent the sign:

♦ ‘0’ positive

♦ ‘1’ negative

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Signed Binary NumbersSigned Binary Numbers

First review signed representations Signed magnitude

Left bit is sign, 0 positive, 1 negative Other bits are number 0 0001001 +9 1 0001001 -9

2’s complement 1’s complement

4343

Signed Magnitude RepresentationSigned Magnitude Representation

Magnitude is magnitude, does not change with sign

(+3)10 ( 0 0 1 1 )2

(−3)10 ( 1 0 1 1 )2

Sign Magnitude

S Magnitude (Binary)

4444

1’s Complement Representation1’s Complement Representation

Positive numbers are represented in “Binary”

Negative numbers are represented in “1’s Comp.”

(+3)10 (0 011)2

(−3)10 (1 100)2

There are 2 representations for ‘0’!!!!!!

(+0)10 (0 000)2

(−0)10 (1 111)2

0 Magnitude (Binary)

1 Code (1’s Comp.)

4545

1’s Complement Range1’s Complement Range

4-Bit Representation

24 = 16 Combinations

− 7 ≤ Number ≤ + 7

−23+1 ≤ Number ≤ +23 − 1

n-Bit Representation

−2n−1+1 ≤ Number ≤ +2n−1 − 1

Decimal 1’s Comp.+ 7 0 1 1 1+ 6 0 1 1 0+ 5 0 1 0 1+ 4 0 1 0 0+ 3 0 0 1 1+ 2 0 0 1 0+ 1 0 0 0 1+ 0 0 0 0 0− 0 1 1 1 1− 1 1 1 1 0− 2 1 1 0 1− 3 1 1 0 0− 4 1 0 1 1− 5 1 0 1 0− 6 1 0 0 1− 7 1 0 0 0

4646

2’s Complement Representation2’s Complement Representation

Positive numbers are represented in “Binary”

Negative numbers are represented in “2’s Comp.”

(+3)10 (0 011)2

(−3)10 (1 101)2

There is 1 representation for ‘0’

(+0)10 (0 000)2

(−0)10 (0 000)2

0 Magnitude (Binary)

1 Code (2’s Comp.)

1’s Comp. 1 1 1 1

+ 1

1 0 0 0 0

4747

2’s Complement Range2’s Complement Range

4-Bit Representation

24 = 16 Combinations

− 8 ≤ Number ≤ + 7

−23 ≤ Number ≤ + 23 − 1

n-Bit Representation

−2n−1 ≤ Number ≤ + 2n−1 − 1

Decimal 2’s Comp.+ 7 0 1 1 1+ 6 0 1 1 0+ 5 0 1 0 1+ 4 0 1 0 0+ 3 0 0 1 1+ 2 0 0 1 0+ 1 0 0 0 1+ 0 0 0 0 0− 1 1 1 1 1− 2 1 1 1 0− 3 1 1 0 1− 4 1 1 0 0− 5 1 0 1 1− 6 1 0 1 0− 7 1 0 0 1− 8 1 0 0 0

4848

Convert 2’s Complement to DecimalConvert 2’s Complement to Decimal

bit index 7 6 5 4 3 2 1 0

bit weighting -27 26 25 24 23 22 21 20

Example 0 1 0 1 0 0 1 0

Decimal 0x-27 1x26 0x25 1x24 0x23 0x22 1x21 0x20

64 + 16 + 2 = 82

bit index 7 6 5 4 3 2 1 0

bit weighting -27 26 25 24 23 22 21 20

Example 1 0 1 0 1 1 1 0

Decimal 1x-27 0x26 1x25 0x24 1x23 1x22 1x21 0x20

-128 + 32 + 8 + 4 + 2 = -82

4949

Number RepresentationsNumber Representations

4-Bit Example

Unsigned Binary

Signed Magnitude

1’s Comp. 2’s Comp.

Range 0 ≤ N ≤ 15 -7 ≤ N ≤ +7 -7 ≤ N ≤ +7 -8 ≤ N ≤ +7

PositiveBinary Binary Binary Binary

Negative XBinary 1’s Comp. 2’s Comp.

0 0 0

1 1 1

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Example in Example in 8-bit8-bit byte byte

Represent +9 in different ways Signed magnitude 00001001

1’s Complement 000010012’s Complement 00001001

Represent -9 in different waysSigned magnitude 100010011’s Complement 111101102’s Complement 11110111

The

Same!

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ObservationsObservations

All positive numbers are the same

1’s Comp and Signed Mag have two zeros

2’s Comp has more negative than positive

All negative numbers have 1 in high-order bit

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Advantages/DisadvantagesAdvantages/Disadvantages

Signed magnitude has problem that we need to correct after subtraction

One’s complement has a positive and negative zero

Two’s complement is most popular i.e arithmetic operations are easy

5353


Magnitude is magnitude, does not change with sign

(+3)10 ( 0 0 1 1 )2

(−3)10 ( 1 0 1 1 )2

Can’t include the sign bit in ‘Addition’0 0 1 1 (+3)10

+ 1 0 1 1 (−3)10

1 1 1 0 (−6)10

Sign Magnitude

S Magnitude (Binary)

54


The signed-magnitude system is used in ordinary arithmetic, but is awkward when employed in computer arithmetic (Why?)

1. We have to separately handle the sign 2. Perform the correction.

Therefore the signed complement is normally used.

5555

Binary Subtraction Using 1’s Comp. AdditionBinary Subtraction Using 1’s Comp. Addition

Change “Subtraction” to “Addition”

If “Carry” = 1then add it to theLSB, and the resultis positive(in Binary)

If “Carry” = 0then the resultis negative(in 1’s Comp.)

0 1 0 1

+ 1 1 1 0

(5)10 – (1)10

(+5)10 + (-1)10

0 0 1 1+

0 1 0 0

0 1 0 1

+ 1 0 0 1

(5)10 – (6)10

(+5)10 + (-6)10

0 1 1 1 0

1 1 1 0

+ 4 − 1

1

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Two’s ComplementTwo’s Complement

To Add: easy on any combination of positive

and negative numbers To subtract

Take 2’s complement of subtrahend Add This performs A + ( -B), same as A – B

5757

Binary Subtraction Using 2’s Comp. AdditionBinary Subtraction Using 2’s Comp. Addition

Change “Subtraction” to “Addition”

If “Carry” = 1ignore it, and the result is positive(in Binary)

If “Carry” = 0then the resultis negative(in 2’s Comp.)

0 1 0 1

+ 1 1 1 1

(5)10 – (1)10

(+5)10 + (-1)10

1 0 1 0 0

0 1 0 1

+ 1 0 1 0

(5)10 – (6)10

(+5)10 + (-6)10

0 1 1 1 1

+ 4 − 1

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Examples from BookExamples from Book

Addition (+6) + 13 (-6) + 13 (+6) + (- 13) (-6) + (-13)

Subtraction (-6) - (-13) (+6) - (-13)

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Addition of Two Positive NumbersAddition of Two Positive Numbers

Addition (+6) + 13 = +19 00000110 +6+00001101 +13-------------- 00010011 +19

If a carry out appears it should be discarded.

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Addition of :Addition of : a Positive and Negative Numbers a Positive and Negative Numbers

Addition (-6) + 13 = +7 11111010 (this is 2’s comp of +6)+00001101--------------1 00000111

The carry out was discarded

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Subtraction of Two NumbersSubtraction of Two Numbers

The subtraction of two signed binary numbers (when negative numbers are in 2’s complement form) can be accomplished as follows:1. Take the 2’s complement of the

subtrahend (including the sign bit)2. Add it to the minuend.3. A Carry out of the sign bit position is

discarded.

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Subtraction of Two NumbersSubtraction of Two Numbers

Subtraction (+6) – (+13) = -7 00000110 00000110- 00001101 + 11110011 (2’s comp)-------------- ----------- 11111001

What is 11111001? Take its 2’s complement=> 00000111 The magnitude is 7 So it must be -7

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Circuit for 2’s complement NumbersCircuit for 2’s complement Numbers

No Correction is needed if the signed numbers are in 2’s complement representation

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Sign ExtensionSign Extension

Sign extension is the operation, in computer arithmetic, of increasing the number of bits of a binary number while preserving the number’s sign (positive/negative) and value.

This is done by appending digits to the most significant side of the number

Examples: 2’s complement (6-bits 8-bits)

00 1010 0000 1010 2’s complement (5-bits 8-bits):

10001 1111 0001

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OverflowOverflow

In order to obtain a correct answer when adding and subtracting, we must ensure that the result has a sufficient number of bits to accommodate the sum.

If we start with two n-bit numbers and we end up with a number that is n+1 bits, we say an overflow has occurred.

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OverflowOverflow

Two cases of overflow for addition of signed numbers Two large positive numbers overflow

into sign bit Not enough room for result

Two large negative numbers added Same – not enough bits

Carry out can be OK

67

ExamplesExamples

Two signed numbers +70 and +80 are stored in 8-bit registers8-bit registers.

The range The range of binary numbers, expressed in decimal, that each register can accommodate is from +127 to -128.

Since the sum of the two stored numbers is 150, it exceeds the capacity of an 8-bit register.

The same applies for -70 and -80.

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Overflow DetectionOverflow Detection

Carries: 0 1 Carries: 1 0 +70 0 1000110 -70 1 0111010 +80 0 1010000 -80 1 0110000------ ------------- ---- ------------- +150 1 0010110 -150 0 11010101. The addition of +70 and +80 resulted in a negative

number!2. The addition of -70 and -80 also resulted in an

incorrect value which is positive number!3. An overflow condition can be detected by

observing the carry into the sign bit position and the carry out of the sign bit position.

4. If the the carry in and carry out of the sign bit are not equal an overflow has occurred.

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Circuit for Overflow DetectionCircuit for Overflow Detection

Condition is that either Cn-1 or Cn is high, but not both

7070

BCD AdditionBCD Addition

One decimal digit + one decimal digit

● If the result is 1 decimal digit ( ≤ 9 ), then it is a simple binary addition

Example:

● If the result is two decimal digits ( ≥ 10 ), then binary addition gives invalid combinations

Example:

5

+ 3

8

0 1 0 1

+ 0 0 1 1

1 0 0 0

5

+ 5

1 0

0 1 0 1

+ 0 1 0 1

1 0 1 00 0 0 1 0 0 0 0

7171

BCD AdditionBCD AdditionIf the binary result

is greater than 9,correct the result byadding 6

5

+ 5

1 0

0 1 0 1

+ 0 1 0 1

1 0 1 0

+ 0 1 1 0

0 0 0 1 0 0 0 0

Two Decimal Digits

Multiple Decimal Digits

3 5 1

0 0 1 1 0 1 0 1 0 0 0 1

ENG241/Digital Design 72

BCD ArithmeticBCD Arithmetic

8 1000 Eight+5 +0101 Plus Five 13 1101 is 13 (> 9)

Note that the result is MORE THAN 9, so must be represented by two digits!

To correct the digit, add 6 1000 Eight 8

+5 +0101 Plus 5 13 1101 is 13 (> 9)

+0110 so add 6 carry = 1 0011 leaving 3 + cy

0001 | 0011 Final answer (two digits)

72



4-bit binary adder

Addend Augend

Input

Carry

4-bit binary adder

BCD Sum

0 or 6

DetectionCircuit for

Invalid BCDOutput

Carry

73

74


75

Recall: Arithmetic -- multiplicationRecall: Arithmetic -- multiplication

1 0 1 1

0 0 0 0

1 0 1 1

1 1 0 1 1 1

1 0 1 1

X 1 0 1

76

MultiplierMultiplier

Multiply by doing single-bit multiplies and shifts Combinational circuit to accomplish this?

77

Combinational MultiplierCombinational Multiplier

AND computes A0 B0

Half adder computes sum. Will need FA for larger multiplier.

78

Larger Multiplier: ResourcesLarger Multiplier: Resources

For J multiplier bits and K multiplicand bits we need J x K AND gates (J-1) K-bit adders to produce a

product of J+K bits.

79

Larger MultiplierLarger Multiplier

A k=4-bit by j=3-bit Binary Multiplier.

J = 3

K = 4

Jxk = 12 AND Gates

(J-1) Adders

Of k bits each

81

Carry Look ahead Adder

Note that add itself just 2 level

Idea is to separate carry from adder function Then make carry approx 2-level all way

across larger adder

82

One-bit Subtractor

Inputs: Borrow in, minuend subtrahend

Outputs: Difference, borrow out Truth Table?

1-bit subM S

Bout

D

Bin

83

Correcting Result

Borrow 1 1 1 0 0

Minuend 1 0 0 1 1

Subtrahend - 1 1 1 1 0

Difference 1 0 1 0 1 0 1 0 1 1

1 0 0 0 0 0

- 1 0 1 0 1

84

Correcting Result

If M is minuend and N subtrahend of numbers length n, difference was (2n + M) – N

What we want is magnitude of N-M with minus sign in front

We can get the correct result by subtracting previous result from 2n

N - M = 2n – (M – N + 2n)

85

Interpretation of the incorrect result

Borrow 1 1 1 0 0

Minuend 1 0 0 1 1

Subtrahend - 1 1 1 1 0


1 0 0 0 0 0

+ 1 0 0 1 1

- 1 1 1 1 0

1 0 1 0 1

M

N

25

(2n + M) – N

86

Correcting Result

What, mathematically, does it mean to borrow?

It means that M < N If borrowing at digit i-1 you are

adding 2i

87

Designs Aren’t Like This

That’s why people use complemented interpretation for signed numbers2’s complement1’s complement

88

2’s Complement

The 2’s complement of 10101 is 01011

1 0 0 0 0 0

- 1 0 1 0 1

0 1 0 1 1

The circuit that performs this is a complementer

89

1’s Complement

Given: binary number N with n digits 1’s complement defined as

(2n – 1) - N Note that (2n – 1) is number with n

digits, all of them 1For n = 4, (2n – 1) = 1111

90

2’s Complement

Given: binary number N with n digits 2’s complement defined as

2n – N for N 00 for N = 0

Exception is so that the result will always have n bits

2’s complement is just a 1 added to 1’s complement

91

Still Remember? Unsigned Arithmetic Subtraction

1 0 1 1 0

- 1 0 0 1 0

0 0 1 0 0

No borrows

1 1 1 1 0

- 1 0 0 1 1

Borrows

0 - 1 results in a borrow

11

11

0 0

0

1

0

Subtrahend

Minuend

92

Four-bit Carry Look Ahead

Adder functionseparated fromcarry

Notice adder has A, B, C inand S out, as well as G,P out.

Reference


BCD Addition

F A F A F A F A

F A F A

Cin

A 3 A 2 A 1 A 0 B 3 B 2 B 1 B 0

Cout S 3 S 2 S 1 S 0

0

CO CI

S

CO CI

S

CO CI

S

CO CI

S

CO CI

S

CO CI

S

1 1XX A1

A2 1X1X

93

eng241 digital design week #5 arithmetic circuits

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