error detection/correction
DESCRIPTION
Error Detection/Correction. Section 1.7 Section 3.9 Bonus Material: Hamming Code. ASCII Code. Communication Control Characters: frame a text message. Format effector: c ontrol layout. ASCII Examples. ASCII A=1000001 ASCII T=1010100. ASCII Code. 10 1 1 001 (Y) 10 0 1 110 (N). - PowerPoint PPT PresentationTRANSCRIPT
Error Detection/Correction
Section 1.7Section 3.9
Bonus Material: Hamming Code
ASCII Code
Format effector:control layout
CommunicationControlCharacters: frame a text message.
ASCII Examples
• ASCII A=1000001• ASCII T=1010100
ASCII Code
1011001 (Y)1001110 (N)
If the probability of a bit flipping event is 1%, what is the likely hood that 4 bits are flipped simultaneously?
Parity Bit
• ASCII characters are stored one per byte (8 bits)
• The leftmost bit is called the parity bit
• A parity bit is an extra bit included with a message to make the total number of 1’s either even or odd.
Examples of Parity Bit
• Even Parity– ASCII A=01000001– ASCII T=11010100
• Odd Parity– ASCII A=11000001– ASCII T=01010100
Signal Transmission Algorithm
• (Even Parity System)• A parity bit is generated and attached
to the raw data• An eight-bit sequence including the
parity bit are sent.• The parity of each character is
checked at the receiving end. • If the parity of the received character
is not even, then at least one bit has changed value during transmission. The sender must retransmit the signal.
Parity Generator
• The circuit that generates the parity bit in the transmitter is called a parity generator.
(Truth Table)
Parity Checker
• The Circuit that checks the parity in the receiver is called a parity checker.
Limitation of Parity Checking
(1) (1)
Hardware implementation
• Review of two-terminal XOR/XNOR• Three terminal XOR/XNOR• Hardware Implementation
Two-terminal XOR
– Equal to 1 if x and y differ in value– Alternative description: equal to 1 if an
odd number of variables equal to 1– Characteristics:
Gate Level Implementation of XOR
x⊕𝑦=𝑥 𝑦 ′+𝑥 ′ 𝑦
Alternative Implementation of XOR
• (A’B’)’=A+B
Parity Generator
• The circuit that generates the parity bit in the transmitter is called a parity generator.
(Truth Table)
Three-Terminal XOR
• equal to 1 if there is an odd number of variables equal to 1
Four-Input Odd Function
Parity Error Check
z P
Since , if P=0, the same circuit can be usedas a 3-bit even parity generator.
Error Correction
• Hamming Code• Use check bits to correct error
Raw Data
Notation: (bit 1, bit 2, bit 3)000001010011100101110111
Add Check Bits
Notation: (bit 1, bit 2, bit 3, bit 4, bit 5, bit 6)CC0C00CC0C01CC0C10CC0C11CC1C00CC1C01CC1C10CC1C11
Generate the First Check Bit
0C0C000C0C011C0C101C0C111C1C001C1C010C1C100C1C11
Check bit 1 looks at bit 3 and bit 5.Check bit 1=
Generate the Second Check Bit
000C00010C01100C10110C11111C00101C01011C10001C11
Check bit 2 looks at bit 3 and bit 6.Check bit 2=
Generate the third Check Bit
000000010101100110110011111000101101011110001011
Check bit 4 looks at bit 6 and bit 5.Check bit 4=
Hamming Code
000000010101100110110011111000101101011110001011
Blue: Check bitsBlack: Data bits
Error in a Data Bit
• Data Bit: 100• 111000• Error occurs in the 6th bit, we get
111001 instead.• Expected check bit 1:. OK• Expected check bit 2:. Problem!• Expected check bit 4:. Problem!• The bad bit is 2+4=6!
Error in the Check Bit
• Data Bit: 100, Check Bit: 110• 111000 (No error)• Error occurs in the 1th bit, we get
011000 instead.• Expected check bit 1:. Problem!• Expected check bit 2:. OK• Expected check bit 4:. OK• The bad bit is bit number 1.