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PRACTICAL EXAMINATION::AUG 2013

College Code & Name : 2111: Madha Engineering CollegeLab Code & Lab Name : EC2404/ ELECTRONICS SYSTEM DESIGN LABDate : 28-08-2013Year/Semester : IV/VIIBatch : 2010-2014

QUESTION PAPER

1. Design the Instrumentation amplifier with the bridge type transducer (Thermistor or any resistance variation transducers) and convert the amplified voltage from the instrumentation amplifier to 4 – 20 mA current using op-amp. Plot the variation of the temperature Vs output current.

2. Design a phase controlled voltage regulator using full wave rectifier and SCR, vary the conduction angle and plot the output voltage.

3. Design FM signal using VCO IC NE566 for the given carrier frequency and demodulate the same using PLL NE 565.

4. Design the Psuedo-random Sequence Generator and generate the corresponding sequence.

5. Design and verify the Arithmetic Logic Unit circuit.

INTERNAL EXAMINER EXTERNAL EXAMINER

PRACTICAL EXAMINATION:: AUG 2013

College Code & Name : 2111: Madha Engineering CollegeLab Code & Lab Name : EC 2404/ ELECTRONICS SYSTEM DESIGN LAB Year/Semester : IV/VIIBatch : 2010-2014 Date /Session : 28.08.’13 / AN

ATTENDANCE

Sl. No. Register No. Name of the Student Signature of the Student1.

2.

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ATTENDANCE

Sl. No. Register No. Name of the Student Signature of the Student24.

25.

26.

27.

28.

29.

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MARKS SPLIT UP

Sl. No. Particulars Marks Allotted

1. Aim / Objective 5

2. Circuit diagram / Procedure &Design

20

3. Output & Execution 10

4. Result 5

5. Viva 10

Total 50

1. Design the Instrumentation amplifier with the bridge type transducer (Thermistor or any resistance variation transducers) and convert the amplified voltage from the instrumentation amplifier to 4 – 20 mA current using op-amp. Plot the variation of the temperature Vs output current.

Aim / Objective

(5)

Circuit diagram&

Design / procedure (20)

Output & Execution

(10)

Result(5)

Viva(10)

Total(50)

INTERNAL EXAMINER EXTERNAL EXAMINER2..Design a phase controlled voltage regulator using full wave rectifier and SCR, vary the conduction angle and plot the output voltage.

Aim / Objective

(5)

Circuit diagram&


Output & Execution

(10)

Result(5)

Viva(10)

Total(50)

INTERNAL EXAMINER EXTERNAL EXAMINER 3.Design FM signal using VCO IC NE566 for the given carrier frequency and demodulate the same using PLL NE 565

Aim / Objective

(5)

Circuit diagram&


Output & Execution

(10)

Result(5)

Viva(10)

Total(50)

INTERNAL EXAMINER EXTERNAL EXAMINER4. Design and verify the Arithmetic Logic Unit circuit.

Aim / Objective

(5)

Circuit diagram&


Output & Execution

(10)

Result(5)

Viva(10)

Total(50)

INTERNAL EXAMINER EXTERNAL EXAMINER 5.. Design the Psuedo-random Sequence Generator and generate the corresponding sequence.

Aim / Objective

(5)

Circuit diagram&


Output & Execution

(10)

Result(5)

Viva(10)

Total(50)

INTERNAL EXAMINER EXTERNAL EXAMINER

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