EUV Lithography as key scaling enabler for logic and memory

Geert VandenbergheEmily Gallagher, Danilo De Simone, Eric Hendrickx, Ryoung han Kim,

Philippe Leray, Vicky Philipsen, Kurt Ronse.

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More consumer products with EUV chips on the market

Source: Average customer input and ASML speculation, May 2020

Year start high-volume production

2011 2013 2015 2017 2019 2021 2023 2025 2027 2029

20

40

DRAM immersion

double patterning limit

2016 20182017 2020 2022 2024 2026 2028

10

20

Eff

ective n

ode [n

m]

2019

DR

AM

Bit lin

e h

alf p

itch [nm

]

LOGIC Immersion single patterning

limit to trigger 0.33 NA insertion

LOGIC DRAMEUVL Sep 2020

Slide 2

LOGIC 0.33NA EUV

DRAM 0.33NA EUV

Introduction, Aug 2019Introduction, Sep 2019

Year start high-volume production

DRAM high NA opportunity

10

12 nm DRAM 0.33NA

EUV single patterning limit

Samsung Announces Industry’s First EUV DRAM

with Shipment of First Million Modules

Korea on March 25, 2020

1

LOGIC 0.33NA

EUV single patterning limit

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Focus Area: EUVL extension including High NA

Q4-2020 update

2016 2017 2018 2019 2020

1. Reliable source with

> 85% availability

1. Resist resolution,

sensitivity & LER met

simultaneously

1. Resist resolution,

sensitivity & LER met

simultaneously

1. Resist resolution,

sensitivity & LER met

simultaneously

1. Resist resolution,

sensitivity & stochastics

met simultaneously

2. Resist resolution,

sensitivity & LER met

simultaneously

2. Reliable source2. Keeping mask

defect free

2. Keeping mask

defect free

2. Keeping mask

defect free>250W operation with

>90% availability

3. Keeping mask

defect free

3. Keeping mask

defect free

3. Reliable source 3. Extension of EUV mask

infrastructure for high-NA

requirements

3. Extension of EUV mask

infrastructure for high-NA

requirements

>250W operation with

>90% availability

4. Mask yield & defect

inspection/review

infrastructure

4. Mask yield & defect

inspection/review

infrastructure

4. Continue actinic PMI

and new mask material

development

4. System and power

efficiency improvements

for next generation tooling

4. System and power

efficiency improvements

for next generation tooling

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EUV photons at imec15 years of full-field EUV scanners

60nm pitch60nm pitch 48nm pitch 52nm pitch 36nm pitch32nm pitch

2006 - 2011 2011 - 2015 2014 - 2020 2019 - present

ASML alpha-demo tool

40nm → 27nm LS

0.25 NA

ASML NXE:3100

27nm → 18nm LS

0.25 NA

ASML NXE:3300

22 → 14nm LS

0.33 NA

ASML NXE:3400

→ 12nm LS

0.33 NA

24nm pitch

MOR CAR

24nm pitch

4

EUV materials

Stochastic failures as the new challenge

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Litho Patterning MATERIALS

6

From 2019 - 2025

Organic resist Inorganic resist

Underlayers

spin on and deposited

EUV 0.33NA and 0.55NA

Complexity of photoresist and stack development has increased over time

Until 2018

DUV

Organic resist

BARC

SensitivityResolution

Roughness

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Stochastic failures

7

P. De Bisschop, SPIE AL 2019

Imaging alone is not enough – must also maximize failure-free window

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30 40 50 60 70 80

1E-7

1E-6

1E-5

1E-4

1E-3

J3030 family

SpaceCD = 16 nm

Mask: P36V16

pix

NO

K

Dose [mJ/cm2]

Measured dependenciesWhich knobs to we have to improve ?

Conditions:• Pitch 36 nm• FT = 30 nm• Post litho measurement• Mask dimension = 18 nm

30 nm resist

10 nm SOG

65 nm SOC

pixNOK(Dose)

COLLABORATION WITH JSR

30 40 50 60 701E-7

1E-6

1E-5

1E-4

1E-3

J4267 family

J3030 family

SpaceCD = 16 nm

Mask: P36V16

pix

NO

K_S

pace

Dose [mJ/cm2]

pixNOK(Resist chemistry)

8

STRONGEST DEPENDENCIES ARE DOSE AND CD (exponential)

Followed by a few weaker dependencies like resist chemistry, mask cd and meef,...

Resist AResist family A

Resist

family B

G. Vandenberghe, SPIE AL 2018

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Biased(RAW) vs unbiased PSD resultsimpact after lithography

0

0.5

1

1.5

2

2.5

3

3.5

4

LER

LER, 3.75

LER, 2.43

Biased Unbiased

*Standard error of 1%

SEM Noise

EUV Lines CD 16 nm Pitch 32nm

Removing CD-SEM noise results in 35% reduction in the estimated roughness after litho

What matters is after pattern transfer (AEI) - After litho (ADI) is important for understanding

Vito Rutigliani, SPIE AL2018

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Impact of thinner film thickness

10

Patterning Performance

and metrology challenges

with thin resist films

15 nm25 nm

CAR

MOR

Film thickness

8.3 nm13.7 nm29.5 nm Film thickness

CDSEM: BKM ADI setting

delivers higher LER and poor SEM image contrast

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UNDERLAYERS

▪ EUVL uses thin photoresist layers → less

bulk and more surface

▪ Increasing influence of interfaces on:

▪ Dose to size

▪ Resist profile

▪ Nano-failures

▪ Etch transfer of defects in resist

▪ Compatibility of underlayers with resist

must be optimized

11

Absorption of photon is limited and resist film is thin

Photoresist

Under layer

Silicon Wafer

(or other substrate)

25 ~ 50 nm

5 ~ 20 nm

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Underlayers

The perfect Resist-UL match (best RLSF) depends on their chemical-physical properties

Surface energy map of EUV materials: most of the UL plotted do not match the resist properties.

a-silicon

no HMDS

a-silicon

w/ HMDS

as example

P. Vanelderen, SPIE AL2019

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SOC UL effect on metal oxide resist32nm pitch LS – after litho

SOC polymer A

SOC polymer B

SOC polymer C

SOC polymer D

SOC polymer E

Ref SOC

pixNOK

Substrate has large impact

on nano-failures, due to

resist-substrate interaction.

Pieter Vanelderen, Photopolymer 2018.

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24nm pitch printing using 0.33NA

Enables resist screening and etch development towards 0.55 NA

NXE3400B at imec:

24nm pitch, single exposure

Pupil optimized as described in

J.-H. Franke et al, EUVL Symposium, 2020

MOR 34mJ/cm2CAR 55.7mJ/cm2

P24 LS printability demonstrated for both MOR and CAR at 0.33NA with optimized source

Challenge is to reduce dose and increase failure-free process window.

14

EUV masks

Material as the challenge and the opportunity

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Material space vs. reference TaBN

16

EUV interaction

Increase phase shifting

Incr

ease

EU

V a

bso

rption

high k absorption

Phase shifting

potential

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M3D lithographic metrics

▪ Absorber choice depends on

which litho metrics are

prioritized

▪ Attenuated PSM tends to

generate superior NILS solutions

for single pitches at the expense

of other 3D effects

17

Improvement vs. TaBN reference

Higher NILS

Lower best focus variation

through pitch

Lower telecentricity

error

Lower 2bar CD

asymmetry

through focus

Regions for imaging improvement compared to reference TaBN identified

Philipsen et al, SPIE Advanced Lithography 2019

Erdmann et al, SPIE Advanced Lithography 2020

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Engineering novel EUV mask absorbers

▪ Relative to TaBN standard

▪ Large green circle

indicates more benefits

▪ High EUV absorption

▪ Ni, PtTe, Ag-based

▪ Phase-match-to vacuum

▪ TaTe, Ni3Al

▪ Att PSM

▪ Ru-based

18

Material identification and characterization

Requirements

Film morphology

Film durability

EUV optical properties

Patterning / processing

Inspection

Repair

Material study on

wafer coupons

Imec is developing materials experimentally and evaluating them relative to mask requirements

Performance vs. TaBN

improved

reduced

Philipsen et al., SPIE10810-11 2018

Luong et al., Appl. Sci. 8, 521 2018

Philipsen at al., SPIE11178-0F 2019

Luong et al., JVSTB 37, 061607 2019

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Mask absorber summary

▪ Benefits of alternative absorber have been

demonstrated by many

▪ Imaging gain for high-k seems to be less

case-dependent than attenuated PSM

▪ Challenges

▪ Convergence to one absorber is difficult

▪ No industry consensus

▪ Many lithographically interesting materials

demand process development (i.e. etch)

19

Imec and partners working towards mask demonstration informed by screening efforts

Jan Van Schoot et al., SPIE Advanced Lithography, 2020

ASML timeline for insertion

See Keynote address Vicky Philipsen, SPIE2021

EUV pellicle

Keeping the mask defect free

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Approach to pellicle membranes

To reduce absorption (increase transmission)

1. Choose appropriate materials: low k

2. Reduce number of atoms

21

Film

ASML(1)

polysilicon

metal ceramic

graphene

FST (2) silicon carbide

IBM (3) silicon nitride

(1) P. Van Zwol, ASML SPIE Photomask, 2017

(2) D. Park, FST, Pellicle TWG, 2017

(3) D. Goldfarb, IBM, Pellicle TWG, 2017

nm-scale film nm-scale grid

Gallagher, SPIE EUVL 2018

Gallagher, SPIE PM 2015Imec has focused on CNT-based membranes since 2016

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Why a membrane of CNTs?

▪ Intrinsic CNT properties attractive

▪ High EUV transmission

▪ Greater than 95%

▪ Carbon has n~1 and low k

▪ Relatively few atoms required for free-

standing membrane

▪ Demonstrated ability to withstand very

high EUV powers – even when uncoated

Key motivators

Courtesy of Prof. Y. H. Lee, CNT Research Lab, Korea

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EUV CNT pellicle

▪ Key achievements▪ Durable, free-standing, CNT-based membrane

with >95% EUVT

▪ Enables through-pellicle inspection and high throughput

▪ Tunable CNT material under optimization with and without coating

▪ Towards high NA▪ High EUV transmission → minimal

interaction at large angle illumination

▪ Durability to high powers possible

▪ Development required▪ Improve lifetime in scanner environment

23

Guido Salmaso, SPIE

Photomask 2018

Full-size pellicle can be

compatible with ASML

frame or other designs

Ref. Joost Bekaert et al, SPIE2021

Summary and outlook to High NA EUV

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EUV LITHOGRAPHY ENABLED PITCH SCALING ROADMAP

25

Pitch (nm)

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

Ye

ar

2031

2029

2027

2025

2023

2021

0.33NA SE 0.55NA SE

SE: Single Exposure

DPT: Double (multiple) Patterning Technology

0.33NA DPT

0.55NA DPT

4Value of high NA introduction

• Introduce High NA at P32-P28 (0.33NA SE limit). • Higher image contrast enabling stochastic

defectivity mitigation, larger process margins

and higher productivity.

• Introduce High NA SE in DRAM P40-P27• Higher image contrast enabling stochastic

defectivity mitigation, larger process margins

and higher productivity for storage node (pad)

and active area cut and bit line contact layers

• Replace 0.33NA DPT (around P24-P20)• Enabling single exposure, for cost reduction

and design flexibility.

• Extend SE resolution to ≤18nm pitches

3

4

2

1

3

1

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TECHNOLOGY REQUIREMENTS FOR HIGH NA EUV INSERTION

0.55NA Scanner

See next talk

Jan van Schoot

High NA

EUV

LithographyMetrology / Inspection

Thin resist metrology

Defect inspection

Overlay & metrology

Precision

Enhanced Mask3D

Novel absorber

MRC/MPC

Pellicle (CNT)

Mask

Resists & UL

Resolution w. dose

Smoothing

Film scaling

Variability & defectivity

Etch & hard masks

Materials

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TECHNOLOGY REQUIREMENTS FOR HIGH NA EUV INSERTION

Mask

Enhanced Mask3D

Novel absorber

MRC/MPC

Pellicle (CNT)

High NA

EUV

LithographyMetrology / Inspection

Thin resist metrology

Defect inspection

Overlay & metrology

Precision

MaterialsResists & UL

Resolution w. dose

Smoothing

Film scaling

Variability & defectivity

Etch & hard masks

15 nm FT 25 nm FTCAR

CDSEM: BKM ADI setting

Thin film metrology

LER mitigation for

thinner films

Resist-UL match based on

chemical-physical properties

Yielding resolution

Alternative mask blanks enable mitigation of

M3D effects and boost contrast.

Novel absorber material needed

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HIGH NA EUV EXPLORATION AT IMEC

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Imec-ASML joint high NA lab

2023 - ...

High NA EUV ecosystem preparation

2020 - ...

Attolab – time resolved spectroscopy

Interference lithography

NXE3400 @ imec

Resist

Films

Etch

Mask

Pellicle

Metrology

ありがとうございます - Thank you!

*thanks to Kars Troost et al (ASML) for various contributions