eval 6474 evaluation module

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September 2012 Doc ID 023548 Rev 2 1/1111

EVAL6474PD

Stepper motor driver mounting the L6474 in a high power PowerSOpackage

Data brief

Features Voltage range from 8 V to 45 V Phase current up to 3 Ar.m.s. SPI with daisy chain feature Socket for external resonator or crystal FLAG LED indicator Suitable for use in combination with STEVAL-

PCC009V2

DescriptionThe EVAL6474PD demonstration board is a microstepping motor driver. In combination with the STEVAL-PCC009V2 communication board and easySPIN evaluation software, the board allows the user to investigate all the features of the L6474 device. The 4-layer layout and the PowerSO package allow the highest thermal performance to be obtained.The EVAL6474PD supports the daisy chain configuration making it suitable for the evaluation of the L6474 in multi-motor applications.

www.st.com

Board description EVAL6474PD

2/11 Doc ID 023548 Rev 2

1 Board description

Figure 1. Jumper and connector location

Table 1. EVAL6474PD specificationsParameter Value

Supply voltage (VS) 8 to 45 VMaximum output current (each phase) 3 Ar.m.s.

Logic supply voltage (VREG) Externally supplied: 3.3 V Internally supplied: 3 V typical

Logic interface voltage (VDD) Externally supplied: 3.3 V or 5 VInternally supplied: VREG

Low level logic input voltage 0 VHigh level logic input voltage VDD(1)

1. All logic inputs are 5 V tolerant.

Operating temperature -25 to +125 CL6474PD thermal resistance junction-to-ambient 12 C/W typical

Phase A connector

Power supply connector(8 V - 45 V)

Master SPIconnector

SYNCoutput

FLAG LED(Red)

JP1: VDD supply frommaster SPI connector

JP2: VDD to VREG connection

OSCIN/OSCOUT connector

JP3: Daisy chain

JP5: DIR to slave board

JP6: STCK to slave board

termination

Phase B connector

Slave SPIconnector

Application referenc earea

AM14866v1

EVAL6474PD Board description

Doc ID 023548 Rev 2 3/11

Table 2. Jumper and connector descriptionName Type Function

M1 Power supply Motor supply voltageM2 Power output Bridge A outputsM3 Power output Bridge B outputs

CN1 SPI connector Master SPI

CN2 SPI connector Slave SPI

CN3 NM connector OSCIN and OSCOUT pinsCN4 NM connector SYNC output

TP1 (VS) Test point Motor supply voltage test pointTP2 (VDD) Test point Logic interface supply voltage test point

TP6 (VREG) Test point Logic supply voltage/L6474 internal regulator test pointTP4 TP5 (GND) Test point Ground test point

TP8 (STCK) Test point Step-clock input test pointTP3 (DIR) Test point BUSY/SYNC output test point

TP9 (STBY/RES) Test point Standby/reset input test pointTP7(FLAG) Test point FLAG output test point

Table 3. Master SPI connector pinout (CN1)Pin

number Type Description

1 Open drain output L6474 direction input

2 Open drain output L6474 FLAG output3 Ground Ground

4 Supply EXT_VDD (can be used as external logic power supply)

5 Digital output SPI master IN slave OUT signal (connected to L6474 SDO output through daisy chain termination jumper JP2)

6 Digital input SPI serial clock signal (connected to L6474 CK input)

7 Digital input SPI master OUT slave IN signal (connected to L6474 SDI input)8 Digital input SPI slave select signal (connected to L6474 CS input)9 Digital input L6474 step-clock input

10 Digital input L6474 standby/reset input


4/11 Doc ID 023548 Rev 2

Table 4. Slave SPI connector pinout (CN2)Pin

number Type Description

1 Open drain output L6474 direction input

2 Open drain output L6474 FLAG output3 Ground Ground

4 Supply EXT_VDD (can be used as external logic power supply)5 Digital output SPI master IN slave OUT signal (connected to pin 5 of J10)6 Digital input SPI serial clock signal (connected to L6474 CK input)

7 Digital input SPI master OUT slave IN signal (connected to L6474 SDO output)

8 Digital input SPI slave select signal (connected to L6474 CS input)9 Digital input L6474 step-clock input

10 Digital input L6474 standby/reset input


Doc ID 023548 Rev 2 5/11

Figure 2. EVAL6474PD schematic

VDD

VREG

VS

SPI_

INSP

I_OU

T

GND

Appli

catio

n re

fere

nce

FLAG

DIR

STBY

/RES

STCK

1A 2A 1B 2B

VS GND

SYNC

OPTI

ON

GND

STCK

DIR

nCS

CK SDI

SDO

ADCI

N

DIR

FLAG

CK nCS

STBY

_R

ESET

STCK

MIS

OSD

I

STBY

_R

ESET

SDO

MIS

O

CKFLAG

STBY

_R

ESET

nCS

SDO

MIS

O

STCK

DIR

FLAG

VSVR

EGVD

D

VREG

VDD

VDD

VREG

EXT_

VDD

VSEX

T_VD

DVR

EGVD

DEX

T_VD

D

VDD

VDD

VS

TP3

1

M1

1 2

+C1 10

0uF/

63V

JP3

12

C710

uF/6

.3V

JP5

12

CN2

12

34

56

78

910

TP1

1

CN4

N.M

.1

M2

1 2

R5

39k

C3 10nF

/50V

C610

0nF/

50V

TP4

1

C547

uF/6

.3V

C11

1nF/

6.3V

C8 220n

F/16

V

M3

12

CN3

N.M

.

12

C12

3.3n

F/6.

3V

TP5

1

C15

100n

F/50

V

DL1

RED

21

JP4

12

TP8

1

R1 39k

C13

100n

F/50

V

TP2

1

TP7

1

C14

100n

F/50

V

R4 39k

TP6

1

TP9

1

JP1

12

+C1

A10

0uF/

63V

R2

470

D1

BAV9

91

2

3

C10

1nF/

6.3V

C210

0nF/

50V

R3 39k

U1

L647

4PD

VDD24

VREG9

OSC

IN10

OSC

OUT

11

CP13

VBOOT14

ADCI

N8

VSA

4

VSA5

VSB

15

VSB16 PGND

1

OUT

1A2

OUT

2A35

OUT

1B17

OUT

2B20

AGND12

DIR

7DGND

28SY

NC

29FL

AG31

SDO

25SD

I27

CK26

CS30

STBY

_R

ES6

STCK

32

OUT

1A3

OUT

1B18

OUT

2B21

OUT

2A36

VSB22VSB

23

VSA33VSA

34

PGND 19

E_PADEP

C410

0nF/

50V

JP2

12

TR1

50k

1 3

2

C91n

F/6.

3V

CN1

12

34

56

78

910

AM14867v1


6/11 Doc ID 023548 Rev 2

Table 5. Bill of materialIndex Quantity Reference Value Package

1 1 C1 220 nF/16 V CAPC-0603

2 1 C2 47 F/6.3 V CAPC-3216

3 1 C3 100 nF/6.3 V CAPC-06034 1 C4 10 F/4 V CAPC-3216

5 1 C5 100 nF/4 V CAPC-0603

6 4 C6, C7, C8, C10 100 nF/50 V CAPC-0603

7 1 CN110-pole Polarized IDCMale header 2.54 mm

vertical blackCON-FLAT-5X2-180M

8 1 CN210-pole Polarized IDCMale header 2.54 mm

vertical grayCON-FLAT-5X2-180M

9 1 CN3 N.M STRIP254P-M-210 1 CN4 N.M TPTH-RING-1MM

11 1 C1A 100 uF/63 V CAPE-R10HXX-P5

12 1 C1 100 uF/63 V CAPES-R10HXX

13 6 C2,C4,C6,C13,C14,C15 100 nF/50 V CAPC-0603

14 1 C3 10 nF/50 V CAPC-060315 1 C5 47 uF/6.3 V CAPC-1206

16 1 C7 10 uF/6.3 V CAPC-0805

17 1 C8 220 nF/16 V CAPC-060318 3 C9, C10, C11 1 nF/6.3 V CAPC-0603

19 1 C12 3.3 nF/6.3 V CAPC-0603

20 1 DL1 LED red LEDC-080521 1 D1 BAV99 SOT-23

22 1 JP1 Jumper open JP2SO

23 4 JP2, JP3, JP4, JP5 Jumper closed JP2SO24 3 M1, M2, M3 Screw connector 2 poles MORSV-508-2P


Doc ID 023548 Rev 2 7/11

Figure 3. EVAL6474PD - silkscreen

Figure 4. EVAL6474PD - layout (top layer)

AM14868v1

AM14869v1


8/11 Doc ID 023548 Rev 2

Figure 5. EVAL6474PD - layout (inner layer2)

Figure 6. EVAL6474PD - layout (inner layer3)

AM14870v1

AM14871v1


Doc ID 023548 Rev 2 9/11

1.1 Thermal data

Figure 7. EVAL6474PD - layout (bottom layer3)

AM14872v1

Figure 8. Thermal impedance graph

101 100 1000

Zth

time (seconds)

25

20

15

10

5

Zth

0

(C/W)

AM14873v1

Revision history EVAL6474PD

10/11 Doc ID 023548 Rev 2

2 Revision history

Table 6. Document revision historyDate Revision Changes

07-Aug-2012 1 Initial release.07-Sep-2012 2 In cover page, dSPIN has been changed into easySPIN.

EVAL6474PD

Doc ID 023548 Rev 2 11/11

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1 Board descriptionTable 1. EVAL6474PD specificationsFigure 1. Jumper and connector locationTable 2. Jumper and connector descriptionTable 3. Master SPI connector pinout (CN1)Table 4. Slave SPI connector pinout (CN2)Figure 2. EVAL6474PD schematicTable 5. Bill of materialFigure 3. EVAL6474PD - silkscreenFigure 4. EVAL6474PD - layout (top layer)Figure 5. EVAL6474PD - layout (inner layer2)Figure 6. EVAL6474PD - layout (inner layer3)Figure 7. EVAL6474PD - layout (bottom layer3)1.1 Thermal dataFigure 8. Thermal impedance graph

2 Revision historyTable 6. Document revision history

/ColorImageDict > /JPEG2000ColorACSImageDict > /JPEG2000ColorImageDict > /AntiAliasGrayImages false /DownsampleGrayImages true /GrayImageDownsampleType /Bicubic /GrayImageResolution 300 /GrayImageDepth -1 /GrayImageDownsampleThreshold 1.50000 /EncodeGrayImages true /GrayImageFilter /DCTEncode /AutoFilterGrayImages true /GrayImageAutoFilterStrategy /JPEG /GrayACSImageDict > /GrayImageDict > /JPEG2000GrayACSImageDict > /JPEG2000GrayImageDict > /AntiAliasMonoImages false /DownsampleMonoImages true /MonoImageDownsampleType /Bicubic /MonoImageResolution 1200 /MonoImageDepth -1 /MonoImageDownsampleThreshold 1.50000 /EncodeMonoImages true /MonoImageFilter /CCITTFaxEncode /MonoImageDict > /AllowPSXObjects false /PDFX1aCheck false /PDFX3Check false /PDFXCompliantPDFOnly false /PDFXNoTrimBoxError true /PDFXTrimBoxToMediaBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXSetBleedBoxToMediaBox true /PDFXBleedBoxToTrimBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXOutputIntentProfile () /PDFXOutputCondition () /PDFXRegistryName (http://www.color.org) /PDFXTrapped /Unknown

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eval 6474 evaluation module

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