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Case Studies
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Standardized Inverter Communications Interface
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Evaluation of Grid-Interactive Smart Inverter Controls using SIL and CHIL Comprehensive real-time simulations of a system-connected smart PV inverter during a Low Voltage Ride-through (LVRT) event • Power system model used to simulate LVRT event at
grid PCC with characteristics: U < 0.75Un; t > 1.4s; P = 0.25Pn
• Inverter provides constant reactive current throughout the event
• Event simulated using both SIL and CHIL. For CHIL, inverter controls are embedded on a Texas Instruments DSP
RMS value of positive sequence reactive current
Time series of line to earth voltage at the beginning of LVRT event
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Time series of line current at the beginning LVRT event
36 kVA Inverter 24 kW PV Array
Grid interconnection model with 0.8 km LV line, transformer, and 15 km MV line
Block diagram of LVRT controls verification using SIL and CHIL
The information contained in this poster is subject to a government license. IEEE PES Innovative Smart Grid Technologies Conference
Minneapolis, Minnesota, USA September 6-9, 2016
Evaluation of System-Integrated Smart Grid Devices using Software- and Hardware-in-the-Loop
Blake Lundstrom, Sudipta Chakraborty, NREL Georg Lauss, Roland Bründlinger, Austrian Institute of Technology
Russell Conklin, U.S. Department of Energy
Software- and Hardware-in-the-Loop Testing Methods Motivation
• A concise description of the state-of-the-art real-time simulation-based testing methods
• Three-part case study demonstration of how these methods can be used independently and/or in combination as an integrated development and validation approach for smart grid DERs and systems
Contribution
PhysicalPower Device
Under Test
Device Controller
Power Interface (PI)
D/AA/D
GS
PowerDevices
PowerSystem
PhysicalICT Devices
RTS #1
RTS #2
RTS #3
SimulatedDevice or System
PhysicalDevice
Co-simulationInterfacePhysical or SimulatedCommunicationsLink
Physical RTSI/O Interface
SimulatedPowerConnection
PH
ILC
HIL
SIL
KEY
Low Voltage Analog Signal
Power-levelSignal
SupportingPower
Device(s)
InterfaceAlgorithms
Device Controller
Device Controller
Analog-DigitalConversion D/AA/D
SensorAMP
PV Emulator
Physical AC RLC Load Bank – 1 MVA
3-phase, 500 kVAPV Inverter (HUT)
Local Grid PCC Emulation
1.08 MVABi-directional
Power AmplifierDevice Controller
Simulated Grid PCC
DC
Bus
M
AC
Bus
Vpcc
Iinv
StaticPV Array194 kW
Rea
l-tim
e S
imul
ator
(Opa
l-RT
eME
GA
Sim
)
SimulatedArea EPS
RLCLoad
ModeledHUT
MSensors
A/D
D/A
V*pcc
Interface Algorithms
I*inv
Phy
sica
l Har
dwar
e
A/DConver.
Interface Method: Ideal Transformer Model (ITM)33 us < Ts < 66 us
Microgrid Controller
PVEmulator
45 kVAPower
Amplifier
Real-time Simulator #1(Opal-RT eMEGASim)
A/D
D/A
A/DConver.
Battery
PV Inverter6 kVA
StorageInverter4 kVA
AC Load
CriticalAC Load
Meter 2Meter 1
Residential-scale Microgrid
Power Hardware
ControllerHardware
Grid Model
InterfaceAlgorithms
OMNET++Host
Comm.NetworkModel
Real-time Simulator
#2
NetworkInterfaces
Grid Interconnection Testing at Power using PHIL PHIL-based real-time simulation of a system-connected smart PV inverter during an unintentional islanding event • Power system model is of IEEE 1547.1 resonant
RLC tank circuit at quality factor of approx. 1 • Event simulated using both PHIL and hardware-only
configurations with very similar results
Cyber-physical System Testing using PHIL with Communication Network Simulation Real-time simulation of a residential-scale microgrid with integrated smart devices connected to both simulated power and communication networks • Comm. network models the internet in a mid-sized
town; 4 power devices connected at different nodes • Microgrid controller adjusts the PV inverter’s real
power output based on measured grid import power to maintain grid power within a desired range
• At a certain threshold, the controller’s capability to manage the grid import power degraded, highlighting the importance of system-integrated device testing
An integrated development and evaluation approach addressing:
• High-level control functions and management services
• Remote controllability • Standardized communication approaches,
interfaces, and protocols
together with the power electronic design and low-level control functions of a DER is necessary for the effective evaluation of such components in smart grid developments
Software-in-the-Loop (SIL)
Controller Hardware-in-the-Loop (CHIL)
Power Hardware-in-the-Loop (PHIL)
Co-Simulation
Description Closed-loop software-only real-time simulation of two or more modeled cyber-physical subsystems on the same real-time simulator (RTS)
Closed-loop, real-time simulation of two or more subsystems, at least one of which is a physical device on an RTS
Extension of CHIL, incorporating a physical device with input or output at higher voltages (power)
• Involves closed-loop simulation of two or more subsystems simulated on different RTS systems
• Can include both software and hardware subsystems
• Often employed for multi-domain simulations; where the use of multiple software packages and/or RTS hardware is most convenient; or where subsystems are geographically dispersed
Software Two or more subsystems
One or more subsystem, generally including a software model of the device being controlled
One or more subsystem, generally including a software model of the power network the HUT is connected to
Hardware under Test (HUT)
None Generally an embedded controller or other device interfaced using signal-level (i.e., <50 V) voltages
Power device, operating at its native voltage (generally > 120V). A power interface between HUT and RTS is required.
Strengths Can be implemented quickly as no hardware other than the RTS is required
Relatively fast speed of implementation; allows for inclusion of non-idealities introduced by embedding control logic on target platform; and use of actual comm. interfaces
Allows for closed-loop simulation that incorporates the non-idealities introduced by all power and controller devices in their physical form
Enables real-time simulation of integrated smart grid systems, including those with remote hardware or component models in other software packages
Limitations Does not capture the many non-idealities introduced by physical embedded controllers, power devices, and communication interfaces
Does not capture the many non-idealities introduced by physical power devices
Special care must be taken to ensure that additional power interfacing hardware does not negatively impact simulation accuracy or stability; additional interfacing algorithms are often required for this purpose
Subsystem interconnection latencies dictate the minimum real-time simulation time step that is achievable. For power networks, co-simulation is generally limited to dynamic or quasi-steady-state time scales.
Block diagram showing the use of SIL, CHIL, PHIL, and co-simulation techniques for integrated smart grid system testing
Inverter output voltage and current for hardware-only (top) and PHIL test runs. Grid breaker is opened at t = 0.05s in both cases. results match very closely in that i) run on time and ii) voltage and
current waveshapes during event are very similar
Summary of Software- and Hardware-in-the-Loop Testing Methods