ewarm appendix
TRANSCRIPT
-
www.iar.com
EWARM
IAR
20131224
-
www.iar.com 2
EWARM ARM EWARM CortexCoreSight SWV(SWO) ETM EWARM EWARM EWARM EWARMURL
New
Update
-
www.iar.com
EWARM
EWARM
-
www.iar.com 4
EWARM
M0 / M0+ M3 / M4
-
www.iar.com 5
EWARM
(1/3)
M0 / M0+ M3 / M4
EWARM
IDE
EWARM
/
MISRA-C1998
MISRA-C2004
-
www.iar.com 6
EWARM
(2/3)
M0 / M0+ M3 / M4
(ICE)
CMSISARM
-
www.iar.com 7
EWARM
M0 / M0+ M3 / M4
IAR Embedd Workbench IDE
IDE
IAR C/C++
IAR C-SPY
Power
RTOS
-
www.iar.com 8
EWARM
M0 / M0+ M3 / M4
IAR Embedded Workbench
IDE
C/C++
C-SPY
ICE
ILINK IAR http://www.iar.com/Global/KK_pages/
UserGuide/EW_IlinkGuide.JPN.pdf
EWARM
ICE
-
www.iar.com 9
EWARM
IAR Embedded Workbench
M0 / M0+ M3 / M4
Part.1
Part.2
-
www.iar.com 10
EWARM
Embedded Workbench IDE
M0 / M0+ M3 / M4
1.
2. IAR Embedded Workbench IDE
-
www.iar.com 11
EWARM
C/C++
M0 / M0+ M3 / M4
1. IAR ILINK DLIB C C++
2. IAR C C89
-
www.iar.com 12
EWARM
CSPY
M0 / M0+ M3 / M4
IAR C-SPY C-SPY JTAGjet Power C-SPY C-SPY cspybat C-SPY
-
www.iar.com 13
EWARM
1/2
M0 / M0+ M3 / M4
AVIXPluginIarEwarm_v0500.pdf
cmx_quickstart.pdf
embOS_IAR_Plugin.pdf
EW_MisraC1998Reference.ENU.pdf
EW_MisraC2004Reference.ENU.pdf
EWARM_ADSMigrationGuide.ENU.pdf
EWARM_AssemblerReference.ENU.pdf
EWARM_AssemblerReference.JPN.pdf
EWARM_DDFFormat.pdf
EWARM_DebuggingGuide.ENU.pdf
EWARM_DebuggingGuide.JPN.pdf
EWARM_DevelopmentGuide.ENU.pdf
EWARM_DevelopmentGuide.JPN.pdf
EWARM_HeaderFormat.pdf
EWARM_HeaderTemplate.pdf
EWARM_IDEGuide.ENU.pdf
EWARM_IDEGuide.JPN.pdf
[Program Files][IAR Systems][IAR Embedded Workbench for ARM ***][arm][doc]
DDF
ENU: JPN
-
www.iar.com 14
EWARM
2/2
M0 / M0+ M3 / M4 14
EWARM_MigrationGuide.ENU.pdf
EWARM_MigrationGuide.JPN.pdf
EWARM_RealViewMigrationGuide.ENU.pdf
FlashLoaderGuide.ENU.pdf
FlashLoaderGuide.JPN.pdf
IAR_KScard_QuickStart.pdf
IAR_KScard_ROM_monitor_settings.pdf
I-jet-ARM.ENU.pdf
I-jet-ARM.JPN.pdf
jet_usb_install.pdf
JLink_J-TraceARM.pdf
JLinkARM.pdf
PEMicroSettings.pdf
ThreadX_IAR_C-SPY_Plugin.pdf
uC-OS-II-KA-CSPY-UserGuide.pdf
[Program Files][IAR Systems][IAR Embedded Workbench for ARM ***][arm][doc]
ENU: JPN
-
www.iar.com
EWARM
ARM
-
www.iar.com 16
ARM
M0 / M0+ M3 / M4
ARM
ARM 32bit
Thumb 16bit ARM
Thumb2 16bit + 32bit Thumb
ARMv6-M Thumb
16bit + 32bit Thumb2
ARM6 ARM
ARM7 ARM9 ARM11
ARMThumb
CPU
Cortex-M3/M4 Thumb2 CPU32bit
Cortex-M0/M0+
ARMv6-M Thumb
16bitThumb632bit Thumb
ARM
-
www.iar.com
EWARM
-
www.iar.com 18
(1)
M0 / M0+ M3 / M4
EWARM
EW
CMSIS
C-SPY
RTOS
IDE
-
www.iar.com 19
oarmbin
oarmconfig
oarmdoc
oarmdrivers C-SPY
oarmexample
oarminc
oarmlib
oarmplugin
oarmsrc
oarmtutor
(2)
arm
M0 / M0+ M3 / M4
-
www.iar.com 20
ocommonbin
ocommonconfig IDE
ocommondoc
ocommonplugin
(3)
Common
M0 / M0+ M3 / M4
-
www.iar.com 21
M0 / M0+ M3 / M4
IAR Embedd Workbench IDE
IDE
IAR C/C++
IAR C-SPY
Power
RTOS
-
www.iar.com
EWARM
EWARM
-
www.iar.com 23
EWARM
M0 / M0+ M3 / M4
PC
-
www.iar.com 24
M0 / M0+ M3 / M4
-
www.iar.com 25
M0 / M0+ M3 / M4
ICE
ICE
-
www.iar.com
EWARM
-
www.iar.com 27
M0 / M0+ M3 / M4
project1 Debug Exe project1.out project1.srec List project1.map Tutor.lst Utilities.lst tutor_library Debug Exe tutor_library.a
.out (Elf/Dwarf)
.a
.srec (, .hex, .sim) Flash [][][] []
.map [][][][] []
.lst C [][][C/C++] [][]
-
www.iar.com 28
.out
M0 / M0+ M3 / M4
(Elf/Dwarf)
-
www.iar.com 29
.a
M0 / M0+ M3 / M4
-
www.iar.com 30
.srec(.hex, .sim)
M0 / M0+ M3 / M4
S010000070726F6A656374312E73726563EC
S11300003804002019030000B3020000B30200000A
S1130010B3020000B3020000B302000000000000BD
S1130020000000000000000000000000B302000017
S1130030B302000000000000B3020000B30200009D
S113004038B52D2401201349486012490860022064
S1130050040024B20A2C0FDA24B2200000F00DF8B8
S1130280A142F8D110BD00BF2C0000004C000000BA
S11302B07047FEE7DDFFFFFF2C0000000800002070
S11302C000000000BBFEFFFF080000005800000013
S11302D0000000200000000000F009F8002801D010
S11302E0FFF7C0FF0020FFF7ADFF00F002F8012088
S11302F0704700F001B800000746384600F002F8E5
S1130300FBE7000080B5FFF751FF024A11001820F7
S1130310ABBEFBE726000200C046C046C046C0464E
S10F0320FFF7DAFFFFFFFFFFFFFFFFFF06
S9030319E0
-
www.iar.com 31
.map
M0 / M0+ M3 / M4
*** PLACEMENT SUMMARY
***
"A1": place at 0x00000000 { ro section .intvec };
"P1": place in [from 0x00000000 to 0x0007ffff] { ro };
"P2": place in [from 0x20000000 to 0x2000ffff] { rw, block CSTACK,
block HEAP };
Section Kind Address Size Object
------- ---- ------- ---- ------
"A1": 0x40
.intvec ro code 0x00000000 0x40 vector_table_M.o [4]
- 0x00000040 0x40
"P2", part 3 of 3: 0x400
CSTACK 0x20000038 0x400
CSTACK uninit 0x20000038 0x400
- 0x20000438 0x400
************************************************************************
*******
*** STACK USAGE
***
Program entry
__iar_program_start: 0x00000319
Maximum call chain 112 bytes
************************************************************************
*******
*** MODULE SUMMARY
***
768 bytes of readonly code memory
44 bytes of readonly data memory
1 076 bytes of readwrite data memory
Errors: none
Warnings: none
-
www.iar.com 32
.lst
M0 / M0+ M3 / M4
In section .bss, align 4
29 int callCount;
callCount:
00000000 DS8 4
30
31 /* Increase the 'callCount' variable by one. */
In section .text, align 2, keep-with-next
32 void NextCounter(void)
33 {
34 callCount += 1;
NextCounter:
00000000 0x.... LDR.N R0,??DataTable2
00000002 0x6800 LDR R0,[R0, #+0]
00000004 0x1C40 ADDS R0,R0,#+1
00000006 0x.... LDR.N R1,??DataTable2
00000008 0x6008 STR R0,[R1, #+0]
35 }
0000000A 0x4770 BX LR ;; return
Maximum stack usage in bytes:
.cstack Function
------- --------
8 DoForegroundProcess
8 -> GetFib
8 -> NextCounter
8 -> PutFib
0 NextCounter
Section sizes:
Bytes Function/Label
----- --------------
4 ??DataTable2
24 DoForegroundProcess
12 NextCounter
4 callCount
28 main
4 bytes in section .bss
68 bytes in section .text
68 bytes of CODE memory
4 bytes of DATA memory
Errors: none
Warnings: none
-
www.iar.com
EWARM
-
www.iar.com 34
M0 / M0+ M3 / M4
Vector No. Vector Offset &
00 0x00 Stack Top sfe (CSTACK)
01 0x04 Reset __iar_program_start
02 0x08 NMI Default Handler
03 0x0C Hard Fault Default Handler
04 0x10 Memory Management Default Handler
05 0x14 Bus Fault Default Handler
06 0x18 Usage Fault Default Handler
07~10 0x1C~0x28 Reserved 0
11 0x2C SVCall Default Handler
12 0x30 Debug Monitor Default Handler
13 0x34 Reserved 0
14 0x38 PendSV Default Handler
15 0x3C SysTick Default Handler
16 ~ 255 0x40~0x3FC External Interrupts Interrupt Handlers
__iar_program_start:
bl __iar_init_core ; optional
bl __iar_init_vfp ; optional, enable VFP, thumbfpinit_M.s
bl __cmain
__cmain:
bl __low_level_init ; low_level_init.c
bl __iar_data_init3 ; initialize data sections, initdata_init3.c
bl main
int main (void) { }
void xxx_InterruptHandler (void) { }
Cortex-M0/M3/M4
Vector Table:
thumbvector_table_M.s
or thumbcstartup_M.c
:
thumbcstartup_M.s
or thumbcstartup_M.c
main():
thumbcmain.s
Users Application:
IAR DLIB
-
www.iar.com
EWARM
CortexCoreSight
-
www.iar.com 36
CoreSight
M0 / M0+ M3 / M4
ICE
JTAG
I-jet J-Link JTAGjet
printf
SWD
I-jet J-Link JTAGjet
2 SWV printf
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
ICE
SWV
I-jet J-Link JTAGjet
PC() ()prinf 1
ETM
JTAGjet -Trace J-Trace
ICE CPU
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
CLK D0 D1 D2 D3
*M3/M4
Serial Wire Debug
Serial Wire Viewer
Serial Wire Output
1,2,4 *JTAG-Trace4(4bit)
Embedded Trace Macrocell
-
www.iar.com 37
CoreSight
M3 / M4
JTAG SWD SWV ETM
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
TMS TCK TDO TDI
nRESET
SWDIO SWDCLK SWO - -
CLK D0 D1 D2 D3
CLK D0 D1 D2 D3
CLK D0 D1 D2 D3
ETMSWVSWV ETM
-
www.iar.com 38
CoreSight
M3 / M4
main()
sub_1()
sub_2()
main()
sub_1()
sub_2()
SWV
ETM
-
www.iar.com 39
CoreSight
M0 / M0+ M3 / M4
Q.
SWD34
SWD3I/O43
Jtag51ICE
SWDCortex A,R,MSWD
-
www.iar.com 40
CoreSight
M0 / M0+ M3 / M4
Q. SWD SWDJTAGCPU
Q. JTAGSWD
[JTAGSWD] JTAG [SWDJTAG] SWV [SWD] ( 5->2 )
-
www.iar.com 41
CoreSight URL
M0 / M0+ M3 / M4
ARMHP
SWD
http://www.arm.com/ja/products/system-ip/debug-trace/coresight-soc-
components/serial-wire-debug.php
ETM
http://www.arm.com/ja/products/system-ip/debug-trace/trace-
macrocells-etm/index.php
-
www.iar.com
EWARM
-
www.iar.com 43
:I-jet1
20:MIPI-20JTAG, SWD/SWV
M0 / M0+ M3 / M4
11pin, 13pin5V
-
www.iar.com 44
:I-jet2
10:MIPI-10JTAG, SWD/SWV
M0 / M0+ M3 / M4
19110
-
www.iar.com 45
:I-jet3
20:ARM-20JTAG,SWD/SWV
M0 / M0+ M3 / M4
19pin5V
-
www.iar.com 46
:J-Link1
20JTAGSWD/SWV
M0 / M0+ M3 / M4
JTAG SWD/SWV
J-LinkJ-Trace 19pin5V
-
www.iar.com 47
:J-Link2
19JTAGSWD/SWVETM
M0 / M0+ M3 / M4
J-Trace J-Link 11pin, 13pin
-
www.iar.com 48
:J-Link3
9JTAGSWD/SWV
M0 / M0+ M3 / M4
J-LinkJ-Trace 19110
-
www.iar.com 49
M0 / M0+ M3 / M4
20(19)pin
*MIPI-20
SAMTECFTSH-110-01-L-DV-K
10(9)pin
*MIPI-10
SAMTECFTSH-105-01-L-DV-K
20(19)pin *ARM-20
Harting09185206803 Molex90635-1202 Tyco Electronics2-215882-0
*J-Linkpin19pin/9pin
-
www.iar.com
EWARM
SWV(SWO)
-
www.iar.com 51
SWV(SWO)SWV
M3 / M4
* SWV
-
www.iar.com 52
SWV(SWO)
M3 / M4
*
-
www.iar.com 53
SWV(SWO)
M3 / M4
*
-
www.iar.com 54
SWV(SWO)
M3 / M4
*
-
www.iar.com 55
SWV(SWO)
M3 / M4
*
-
www.iar.com 56
SWV(SWO)
M3 / M4
-
www.iar.com 57
SWV(SWO)
M3 / M4
-
www.iar.com 58
SWV(SWO)
M3 / M4
-
www.iar.com 59
SWV(SWO)ITM:
M3 / M4
*
arm_itm.hinclude ITM_EVENT8_WITH_PC(1,1)
1-4
*URL http://supp.iar.com/Support/?note=26891 http://netstorage.iar.com/SuppDB/Public/SUPPORT/004765/Time%20measurement%20by%20SWO.pdf
-
www.iar.com 60
SWV(SWO)ITM:
M3 / M4
ITM
-
www.iar.com 61
SWV(SWO)ITM:
M3 / M4
ITM
ITM
-
www.iar.com
EWARM
ETM
-
www.iar.com 63
MCU ETMMCU Trace Data(1-4)MCU
(ICE) JTAGjet-Trace SEGGERJ-Trace
MCUFW
ETM
M3 / M4
-
www.iar.com 64
ETM
M3 / M4
ETM
ETM
-
www.iar.com 65
ETM: JTAGjet-trace
M3 / M4
[]
[I-jet / JTAGjet]
[][][I-jet/JTAGjet]
[I-jet/JTAGjet]
-
www.iar.com 66
[ETM]
M3 / M4
[][Embedded Workbench ]
-
www.iar.com 67
ETM
M3 / M4
[()]
[()] ICE
-
www.iar.com 68
ETM[ETM]
M3 / M4
[ETM]
-
www.iar.com 69
ETM[ETM]
M3 / M4
[ETM]
ETM
-
www.iar.com 70
ETM[]
M3 / M4
[][]
ETM
-
www.iar.com 71
ETM [][]
M3 / M4
[]
-
www.iar.com
EWARM
-
www.iar.com 73
M0 / M0+ M3 / M4
-
www.iar.com 74
M0 / M0+ M3 / M4
-
www.iar.com 75
M0 / M0+ M3 / M4
PC
-
www.iar.com 76
M0 / M0+ M3 / M4
-
www.iar.com 77
M0 / M0+ M3 / M4
-
www.iar.com 78
M0 / M0+ M3 / M4
-
www.iar.com 79
M0 / M0+ M3 / M4
-
www.iar.com 80
M0 / M0+ M3 / M4
-
www.iar.com 81
()
M0 / M0+ M3 / M4
-
www.iar.com 82
M0 / M0+ M3 / M4
-
www.iar.com 83
M0 / M0+ M3 / M4
* data > 200 1
C-Spy
* C-Spy
[][Embedded Workbench ][C-SPY ]
-
www.iar.com 84
M0 / M0+ M3 / M4
-
www.iar.com 85
M0 / M0+ M3 / M4
* OSOS
-
www.iar.com 86
M0 / M0+ M3 / M4
printf
scanfEWARM
* include
[][][][]
printfIOputcharUART
-
www.iar.com 87
M0 / M0+ M3 / M4
*
-
www.iar.com
EWARM
-
www.iar.com 89
M0 / M0+ M3 / M4
[][][]
-
www.iar.com 90
M0 / M0+ M3 / M4
C-SPY 1. 2. 3. 4. C-SPY
C-SPY
+ 34
-
www.iar.com 91
M0 / M0+ M3 / M4
3
-
www.iar.com 92
M0 / M0+ M3 / M4
EWARM_DebuggingGuide.JPN.pdfC-SPY
-
www.iar.com
EWARM
EWARM
-
www.iar.com 94
M0 / M0+ M3 / M4
-
www.iar.com 95
*1
*2
*1 Debug
*2 Release
M0 / M0+ M3 / M4
-
www.iar.com 96
/
M0 / M0+ M3 / M4
-
www.iar.com 97
M0 / M0+ M3 / M4
-
www.iar.com 98
M0 / M0+ M3 / M4
[]
-
www.iar.com 99
M0 / M0+ M3 / M4
#pragma optimize
[] #pragma optimize= high
-
www.iar.com 100
1
M0 / M0+ M3 / M4
if ( a - b * c / 150 % 12 == 5) do_something();
:
:
return(a - b * c / 150 + 5);
a - b * c / 150
-
www.iar.com 101
2
M0 / M0+ M3 / M4
for ( i = 0; i < 3; i++)
{
j[i] = i;
}
j[0] = 0;
j[0] = 1;
j[0] = 2;
-
www.iar.com 102
M0 / M0+ M3 / M4
/
-
www.iar.com
EWARM
EWARM
-
www.iar.com 104
RAM
__ramfunc
M0 / M0+ M3 / M4
__ramfunc void foo(void);
: main
-
www.iar.com 105
[][Run to]__exit
M0 / M0+ M3 / M4
-
www.iar.com
EWARM
EWARM
-
www.iar.com 107
M0 / M0+ M3 / M4
1. 1. CPU 2. 3. 4.
2. 1. CPU 2. ITM *M3/M4 3. RAM
3. 1. .map
4. *M3/M4 1. SWO(ITM)
-
www.iar.com 108
1.CPU
M0 / M0+ M3 / M4
-
www.iar.com 109
2.
M0 / M0+ M3 / M4
[] [][][]
[]
-
www.iar.com 110
2.
M0 / M0+ M3 / M4
[] C C C
C
-
www.iar.com 111
3.
M0 / M0+ M3 / M4
[]
-
www.iar.com 112
3.
M0 / M0+ M3 / M4
[RAM]
//initialize by copy { readwrite }; initialize by copy { readonly, readwrite };
[][Embedded Workbench C/C++] ROM RAM
-
www.iar.com 113
3.
M0 / M0+ M3 / M4
[]
map
-
www.iar.com 114
4.
M0 / M0+ M3 / M4
[J-Link/J-Trace][]
CPU
-
www.iar.com 115
4.
M0 / M0+ M3 / M4
[J-Link/J-Trace][SWD]
SWD(ITM)
-
www.iar.com 116
2
1.CPU
M0 / M0+ M3 / M4
PLL
-
www.iar.com 117
2
2.ITM
M3 / M4
#include arn_itm.h ITM_EVENT8_WITH_PC(1,0); ITM_EVENT8_WITH_PC(1,100); ITM_EVENTn_WITH_PC(Channel,value);
-
www.iar.com 118
2
3.RAM
M0 / M0+ M3 / M4
__ramfunc [RAM]
-
www.iar.com 119
3
1.map
M0 / M0+ M3 / M4
Outout.map
-
www.iar.com 120
3
1.map
M0 / M0+ M3 / M4
ROMRAM
ROM 896 + 5,124 = 6020
RAM 5,088 + 13,828 = 18,916
RAM
-
www.iar.com 121
3
1.map
M0 / M0+ M3 / M4
-
www.iar.com 122
4
1. SWO(ITM)
M3 / M4
-
www.iar.com 123
4
1. SWO(ITM)
M3 / M4
-
www.iar.com 124
4
1. SWO(ITM)
M3 / M4
ITM_EVENT8_WITH_PC
-
www.iar.com 125
Drhystone
M0 / M0+ M3 / M4
*1 *2 ROM
(CODE) ROMRAM
(CODE) ROM
(DATA) RAM
(DATA) Stack
()
6548 0 144 13830 240 128,500 1.0
6488 0 144 13830 232 122,500 1.1
6172 0 16 13832 248 97,375 1.3
6064 0 16 13828 248 65,000 2.0
5860 0 16 13828 240 32,000 4.0
5852 0 16 13828 248 65,000 2.0
RAM 850 5088 5126 13828 248 57,125 2.2
RAM 1556 4188 4224 13828 240 32,625 3.9
RAM 6104 0 16 13828 248 53,500 2.4
RAM 5860 0 16 13828 240 26,500 4.8
RAM
1
-
www.iar.com 126
Drhystone
M0 / M0+ M3 / M4
*1 *2 ROM
(CODE) ROMRAM
(CODE) ROM
(DATA) RAM
(DATA) Stack
()
6548 0 144 13830 240 128,500 1.0
6488 0 144 13830 232 122,500 1.1
6172 0 16 13832 248 97,375 1.3
6064 0 16 13828 248 65,000 2.0
5860 0 16 13828 240 32,000 4.0
5852 0 16 13828 248 65,000 2.0
RAM 850 5088 5126 13828 248 57,125 2.2
RAM 1556 4188 4224 13828 240 32,625 3.9
RAM 6104 0 16 13828 248 53,500 2.4
RAM 5860 0 16 13828 240 26,500 4.8
() ROM(Wait)RAM
-
www.iar.com
EWARM
EWARMURL
-
www.iar.com 128
EWARMURL
M0 / M0+ M3 / M4
IARHP http://www.iar.com/jp
http://www.iar.com/jp/Products/
http://www.iarsys.co.jp/customer/
http://www.iarsys.co.jp/customer/inquiries
http://www.iar.com/jp/Service-center/Downloads/
-
www.iar.com 129
EWARMURL
M0 / M0+ M3 / M4
FAQ
http://www.iarsys.co.jp/customer/faqs
http://www.iar.com/jp/Service-center/Resources/
CoresighttechniquedebugTrace
-
www.iar.com 130
EWARMURL
M0 / M0+ M3 / M4
ARMHP http://www.arm.com/ja/index.php
http://www.arm.com/ja/products/system-ip/debug-trace/coresight-soc-
components/serial-wire-debug.php
ETM http://www.arm.com/ja/products/system-ip/debug-trace/trace-macrocells-
etm/index.php
CMSIS http://www.arm.com/ja/products/processors/cortex-m/cortex-microcontroller-
software-interface-standard.php