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• EXP6: Analog Switch.

OBJECTIVES.

The purpose of this experiment is to demonstrate the operation, as an analog switch, of a JFET transistor. This experment will illustrate the use of the JFET over its resistive region.

INTRODUCTION AND TEST CIRCUITS.

Figure 6-1 shows the VI characteristic of a JFET, n channel on depletion mode. In that figure the resistive region have been circled. An amplification of that area can be seen in figure 6-2. Here we can see that the transistor could behave as a variable resistor. The resistive value is given by the inverse of the slope of the straight lines, and the selection of those lines is being made by the gate-source voltage.

Figure 6-1: VI characteristic showing the resistive region for a JFET.

Figure 6-3 shows the actual circuit and its equivalent when the transistor is seen as a variable resistor. We can see that the circuit can be easily analized since it becomes to be a voltage divider. The output voltage will be given by the following equation.

vout = vinR1

R1 + RJFET (6-1)

From eq.6-1 we can easily see the following cases:

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• R1 >> RJFET vout ≈ vin (6-2)

R1

• PREPARATION.

1. Using PSpice get the VI curves of the JFET focusing on the resistive region. To get this curves you will need to use the dcsweep but now you will need to sweep the drain-source voltage from a negative value to a positive value, while the gate-source voltage will have only negative values. Your goal is to find the range for VDS such that the lines you’ll see are straight lines.

2. Compute the resistance that the JFET will show for the different lines and label them with that value and with the gate-source value needed to select that line.

3. Select the more vertical line to be your RJFET for the on state, and the more horizontal line to be your RJFET for the off state. The VGS associated to those lines are to define the voltage limits for the control signal.

4. Now we are ready to start simulations. Use an R1 ten times the value of RJFET for the on state. And using PSpice do the schematic of figure 6-3.

5. Use a Vpulse as your control signal with the levels found in part 3.

6. Use a Vsine as your input with the amplitude given for the range for VDS found in part 1. Use a frequency of 10Khz.

7. Run a transient analysis using a control signal with a frequency of 1Khz and a duty cycle of 50%, plot the output for two complete periods of the control signal.

8. Run a transient analysis using a control signal with a frequency of 100Khz and a duty cycle of 10%, plot the output for two complete periods of the input signal.

PROCEDURE.

In this experiment we will be using the 2N5485, JFET n-channel depletion mode.

1. Get the VI characteristic for the resistive region using the program FET Resistive.vi. In this step you need to play with the value VDS so you will get straight lines. Record the VDS value, since that it is going to be your input range.

2. Select the more horizontal and the more vertical lines. Compute the resistance the transistor will have on those lines.

3. Find the resistor value you will be using on the switch by selecting its value ten times higher than the on-state JFET resistance.

4. Build the circuit. Use as input the function generator with a frequency of 10Khz, and the amplitude found in step 1.

5. Use a dc source to be your control signal and capture the output for the two control voltage levels, on and off.

6. Use the oscilloscope to see the input and output at the same time, capture the waveforms. Do this for the on and off levels of control.

7. Now use an extra function generator to generate a control signal with the on and off voltage levels, a duty cycle of 50% and a frequency of 1Khz. Capture the waveform using scopegrab.

8. Change the duty cycle to its minimum value and the frequency to 100Khz. Capture the waveform using scopegrab.

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• ANALYSIS.

How would you modify the circuit, you can add stuff, so it will work for inputs in the range ±5?.

Do the following with the data obtained in the laboratory:

Plot Vout vs. Vin for the on level. Explain what you are seeing.

Plot Vout vs. Vin for the off level. Explain the results.

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