fabrication of poly-si tft on flexible thin glass substrate yoochul jung, sunghwan won, d.g. ast...
DESCRIPTION
Motivation – Development of “Displays” CRT TFT (a-Si) -LCD TFT (poly-Si) -LCD Advantages of flexible display Less apt to break, Roll-up, Less weight and volume Flexible Displays are being developed as the next generation displays Taken from Philips Inc. Ast GroupTRANSCRIPT
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Fabrication of Poly-Si TFT on Flexible Thin Glass Substrate
Yoochul Jung, Sunghwan Won, D.G. Ast
(Cornell University, Dep. of Mat. Sci. Eng)
2006.06.28
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Outline
1. Motivation
2. Comparison of Polymer and Glass substrates.
3. Processing of Pocket Fabrication
4. Characteristics of poly-Si TFT on Flexible Glass Substrate
5. Summary and Discussion
Ast Group
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Motivation – Development of “Displays”
CRT TFT (a-Si) -LCD TFT (poly-Si) -LCD
Advantages of flexible displayLess apt to break, Roll-up, Less weight and volume
Flexible Displays are being developed as the next generation displays
Taken from Philips Inc.
Ast Group
![Page 4: Fabrication of Poly-Si TFT on Flexible Thin Glass Substrate Yoochul Jung, Sunghwan Won, D.G. Ast (Cornell…](https://reader036.vdocuments.net/reader036/viewer/2022081606/5a4d1bf97f8b9ab0599eafe5/html5/thumbnails/4.jpg)
Polymer Based Display Vs. Glass Based Display
Large CTE (PET, 65 x 10-6/°C) Low and adaptable CTE (Si, 2 x 10-6/°C)
xx surface finish to less compatible material
High surface finish
α-Si:H
Compatible material with
Low temperature oxide
α-Si:H
Max. processing temperature ~ 300 °C Max. processing temperature ~ 600 °C
Polymer substrates Glass substrates
Ast Group
Laser recrystallized Si with barrier layers CVD poly-Si
MILC silicon
Laser recrystallized Si (no thermal barrier)
Mismatched with Si, thermal stress
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LPCVD Poly-Si TFT on MS Glass
* Microsheet borosilicate glass contains boron* Boron acts as p-dopant in Si* Boron may migrate into Si-electronics during poly-deposition* Barrier layer is required1
* Mechanical support is required to handle Microsheet glass2
For 1, SiNX, LTO layer used for barrier layer For 2, Special support needs to be designed…
Ast Group
Microsheet™ Glass WaferBarrier layer (SiNx)
Poly Si
Gate
DrainSource
Barrier layer (SiNx)
Gate
SiO2
SiO2
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Si-Framed Pocket Fabrication
Ast Group
MS Glass substrate
Real photo will be added here…. 1. No bonding between glass and Si piece rails2. Free expansion and shrinkage3. Controlling capillary phenomena
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Fabrication Process of Si-Framed Pocket
Si
Pyrex Spacer (~ 500 m)
Bottom of EV 501 Bonder Chamber
Graphite chuck
120 N, 350 °C, 1000 V
Positive bias
Negative bias
Si pieces (~ 300 m)
Bottom of EV 501 Bonder Chamber
Positive bias
Si
Ast Group
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Drain Voltage (V)-10 0 10 20 30 40
I D C
urre
nt (A
)
0.0
2.0e-5
4.0e-5
6.0e-5
8.0e-5
1.0e-4
1.2e-4
Gate Voltage (V)-20 0 20 40 60 80
Log
I D C
urre
nt (A
)
1e-10
1e-9
1e-8
1e-7
1e-6
1e-5
1e-4
1e-3 Vg(V)40
302010
Vd(V)10 5
0.1
Base line Characteristics (TFT on Si Wafer, Thermal Anneal)
Ast Group
* W/L = 55um/8um* Channel Mobility 7 cm2/Vs
* Poly-Si active layer: 620°C, 100nm* Gate oxide (LTO): 400°C, 100nm
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LPCVD poly-Si TFT on the Glass
Ast Group
Gate Voltage (V)-20 -10 0 10 20 30 40 50
I D C
urre
nt (A
)
1e-9
1e-8
1e-7
1e-6
1e-5
1e-4
* Poly-Si active layer: 550°C, 100nm* Gate oxide (LTO): 400°C, 100nm
* TFT was short after thermal anneal* 580C poly-Si active layer* 620C, 24 hrs* SIMS data
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Ast Group
SIMS Analysis
1.E+16
1.E+17
1.E+18
1.E+19
1.E+20
1.E+21
1.E+22
0 50 100 150 200 250 300 350 400
Depth [nm]
B [a
t/cm
3]
1.E+04
1.E+05
1.E+06
1.E+07
Si [c
t/sec
]
p-Si SiO2 SiN Glass
Boron
Si
* After 620°C, 24 hrs anneal Boron diffused out from the glass !* CTE mismatch caused thermal stress* Laser anneal was done instead of the conventional thermal anneal
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XRD of Poly-Silicon (Thermal, Laser Anneal)
620C Poly-Si on oxide on Si
2 Theta
20 25 30 35 40 45 50
Inte
nsity
(A.U
.)
(111) (220)
580C Poly-Si on Oxide on Si
2 Theta
20 25 30 35 40 45
Inte
nsity
(A.U
)
(111)
20 25 30 35 40 45 50
Inte
nsity
(A.U
)
500C poly-Si on Glass 500C on Glass after Laser Anneal at 283 mJ
Ast Group
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Characteristics (TFT on MS Glass, Laser Anneal)
Ast Group
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Summary and Future Plan
1. Fixture developed to process 2. Base 3. CVD poly 4. Laser recrystallized 5. According to SIMS analysis, boron diffused into poly-Si layer after thermal annealing of 620C, 24 hrs
* Future Plan *1. Better effective Hydrogenation2. Improvement of characteristics by Recrystallization - Rapid Thermal Anneal (or standard anneal) - Ni catalyzed crystallization3. Stress and bending test 4. Bending
Ast Group
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Acknowledgement
CNF, a National Science Foundation supported National Nanofabrication Users Network (NNUN) Facility; Corning Inc.