FACTS Controllers and Applications

Mr. Suresh Kumar K.S & Dr. S. Ashok Department of Electrical Engineering, N.I.T Calicut

Original edition published by

NALANDA DIGITAL LIBRARY at NATIONAL INSTITUTE OF TECHNOLOGY CALICUT

© Copyright 2003 by Nalanda Digital Library

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Published, 2003

Published by Nalanda Digital Library

National Institute of Technology Calicut

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FACTS Controllers and Applications - Contents

1 FACTS Controllers - An Overview - Dr. T.L Jose

2 Introduction to Simulink - Dr. Abraham T Mathew

3 FACTS Simulation Using PSCAD EMTDC - Dr. R. Sreeram Kumar

4 Introduction to Microsim Design Lab 8.0 - Part I - Mr. Suresh Kumar K.S

5 Introduction to Microsim Design Lab 8.0 - Part II - Mr. Suresh Kumar K.S

6 Linear Transformations Presentation in PDF - Dr. S. Ashok

7 Pulse Width Modulation Techniques - Dr. Saly George

8 Augmentation of Transmission - A Review Presentation in PDF - Mr. S.G. Menon

9 HVDC and FACTS - Ms. Preetha P.

10 Single-Phase Shunt Active Power Filter - Mr. Suresh Kumar K.S

11 Harmonic Voltage Cancellation and Isolation by Series Active Power Filtering in Distribtion Systems Slides in PDF - Mr. Suresh Kumar K.S

12 Three Phase Shunt Active Power Filters - Part I – Introduction - Mr. Suresh Kumar K.S

13 Three Phase Shunt Active Power Filters - Part II - Control Strategies - Mr. Suresh Kumar K.S

14 Three Phase ShuntActive Power Filters - Part III - Simulation of Control Strategies - Mr. Suresh Kumar K.S

15 Dynamic Voltage Restorers and Their Control - Mr. Suresh Kumar K.S

16 Simulation of a Single-Phase Active Power Line Conditioner Using Microsim Design Lab 8.0 - Mr. Suresh Kumar K.S

17 Unified Power Quality Conditioner (UPQC - A Simulation Study) Slides in PDF - Mr. Suresh Kumar K.S

18 Variable Impedance Type Static Series Compensators Presentation in PDF - Ms. Subha D Puthankattil

19 Variable Impedance Type Static Shunt VAr Compensators Presentation in PDF - Ms. Elizabeth P Cherian

20 Static Synchronous Compensators (STATCOM) at Distribution and Transmission Levels - Mr. Suresh Kumar K.S

21 Static Synchronous Series Compensator (SSSC) and its Control - Mr. Suresh Kumar K.S

22 Improvement of Power System Stability Using Static Var Compensators - Dr. R. Sreeram Kumar

23 Optimal Allocation of Multifunctional FACTS Devices for Power Transit Control - Ms. Elizabeth P Cherian

24 Application of STATCOM and TCSC for improvement of System Dynamic Performance - Dr. R. Sreeram Kumar

25 Unified Power Flow Controller (UPFC) - An Introduction - Mr. Suresh Kumar K.S

26 Control of a Unified Power Flow Controller - Mr. Suresh Kumar K.S

27 Simulation of UPFC Using Matlab Simulink - Mr. Suresh Kumar K.S

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FACTS Controllers – An Over-view

Dr T.L. JoseProfessor, Electrical Engg.

N.I.T. Calicut

Most of the worlds electric power systems are widelyinterconnected to reduce cost of electricity and toimprove the reliability of power supply. It is ideal tolocate the generators at load centers. Because ofeconomical and environmental reasons, thegenerating stations are usually located at remotelocations. The interconnection of generating stationsand utilities improve the reliability with minimumgeneration resources. If the transmission capability isless, then more generation would be required to servethe same load with same reliability. Hence the costof electricity would be higher.

The power system is a complex network ofsynchronous generators, transmission lines, loads,etc. As the power system grows it becomes morecomplex to operate the system and can become lesssecure for riding through the major outages. Thepower that can be transmitted over a line depends onseries reactance of the line, bus voltages andtransmission angle δ. The voltage profile along theline can be controlled by reactive shuntcompensation. The series line inductive reactancecan be controlled by series capacitive compensation.The transmission angle can be varied by phaseshifting. Generally the reactive power compensationand phase angle control are applied by fixed ormechanically switched capacitors, reactors and tapchanging transformers to improve the powertransmission. The recovery from dynamicdisturbances was accomplished by generous stabilitymargins at the price of relatively poor systemcompensation. Speed of operation of mechanicallycontrolled systems are lower compared to systemsusing static devices. The mechanical devices wearout quickly hence cannot be operated frequently.

The important limitations on loading capability oftransmission lines are thermal, dielectic and stabilitylimits. There are several stability issues that limit thetransmission capability some of them are steady statestability, transient stability, dynamic stability,frequency collapse, voltage collapse andsubsynchronous resonance.Flexible AC Transmission Systems (FACTS) usingadvanced solid state controllers offer flexibility ofsystem operation through fast and reliable control. Ithelps to increase the usable transmission capacity of

lines and to control power flow over designatedtransmission lines.

FACTS CONTROLLERS

There are two different approaches to the realizationof power electronic based FACTS Controllers. Thefirst group employs reactive impedances or a tapchanging transformer with thyristor switches ascontrolled elements. The thyristor-controlled staticVAR compensator, thyristor-controlled seriescapacitor and thyristor-controlled phase shifter comesunder this group.

The second group use self commutated staticconverters as controlled voltage sources. TheFACTS Controllers in this group are staticsynchronous compensator, the series compensator,the unified power flow controller and the interlinepower flow controller. The converter based FACTScontrollers generally provide superior performancecharacteristics compared to thyristor controlledFACTS controllers.

Static VAR Compensator (SVC)

It is a shunt-connected static VAR generator orabsorbed whose output is adjusted to exchangecapacitive or inductive current so as to maintain orcontrol specific parameters of the electrical system(typically bus voltage). SVC is based on thyristorswithout gate turn off capability. It includes separateequipment for lagging and leading VARs; thyristorcontrolled or thyristor switched reactor for absorbingreactive power and thyristor switched capacitor forsupplying the reactive power. This compensator isnormally used to regulate the voltage of thetransmission system at a selected terminal. They arealso employed for transient and dynamic stabilityimprovement.

Thyristor Controlled Series Capacitor (TCSC)

It is a capacitive reactance compensator whichconsists of a series capacitor bank shunted by athyristor-controlled reactor in order to provide asmoothly variable capacitive reactance TCSC isbased on thyristors without gate turn off capability.The variable series capacitive compensation is useful

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in steady state control of power flow, transientstability improvement, power oscillations dampingand balancing power flow in parallel lines.

Thyristor-Controlled Phase Shifting Transformer(TCPST)

It is a phase-shifting transformer, adjusted bythyristor switches to provide a rapidly variable phaseangle. In general, the phase shifting is obtained byadding a perpendicular voltage vector in series with aphase. This vector is derived from other two phasesusing shunt connected transformers. Theperpendicular series voltage is made variable with avariety of power electronics topologies. The TCPSTcan be used to regulate the transmission angle tomaintain balanced power flow in multipletransmission paths or to control so as to increase thetransient and dynamic stability of the power system.

Static Synchronous Compensator (STATCOM)

Static synchronous generator is static selfcommutated switching power converter suppliedfrom an appropriate electric energy source andoperated to produce a set of adjustable multiphaseoutput. Voltages, which may be coupled to an ACpower system for the purpose of exchangingindependently controllable real and reactive power.A STATCOM is a static synchronous generatoroperated as a shunt-connected static VARcompensator whose capacitive or inductive outputcurrent can be controlled independent of systemvoltage. It can be a voltage sourced or currentsourced converter. From an overall cost point ofview, the voltage sourced converters are preferred.The STATCOM is able to control its output currentover the rated maximum capacitive or inductiverange independent of the system voltage. The abilityof the STATCOM to produce the current at lowsystem voltage make it more effective than SVC inimproving transient stability. The ability of theSTATCOM to generate and absorb reactive powermake it suitable for power oscillation damping.

Static Synchronous Series Compensator (SSSC)

It is a static synchronous generator operated withoutan external electric energy source as a seriescompensator whose output voltage is in quadraturewith, and controllable independently of, the linecurrent for the purpose of increasing or decreasingthe overall reactive voltage drop across the line andthereby controlling the transmitted electric power.The SSSC may include transiently rated energystorage or energy absorbing devices to enhance the

dynamic behaviour of the power system by additionaltemporary real power compensation, to increase ordecrease momentarily the overall real (resistive)voltage drop across the line. It is like STATCOMexcept that the output AC voltage is in series with theline. Usually the injected voltage in series in verysmall compared to the line voltage and the insulationto ground would be quite high.

Unified Power Flow Controller (UPFC)

Using a unified power flow controller all the threeline parameters, the voltage, impedance and phaseangle, can be controlled to influence the real andreactive power flow in AC line. The control ofvoltage, impedance and phase angle can be carriedout concurrently or selectively. It may also provideindependently controllable shunt reactivecompensation. It is a complete controller forcontrolling active and reactive power control throughthe line as well as line voltage control.

Interline Power Flow Controller (IPFC)

It is a recently introduced controller. IPFC is acombination of two or more static synchronous seriescompensators which are coupled via a common DClink to facilitate bi-directional flow of real powerbetween the AC terminals of the SSSCs and arecontrolled to provide independent reactivecompensation for the adjustment of real power flowin each line and maintain the desired distribution ofreactive flow among the line. The IPFC may includea STATCOM, coupled to the IPFCs common DClink, to provide shunt reactive compensation andsupply or absorb the overall real power deficit of thecombined SSSCS. It can be used to equivalize bothreal and reactive power flow between the lines, totransfer power demand from overloaded lines tounder loaded lines and to compensate line voltagedrops and the corresponding reactive line power andto increase the effectiveness of the compensatingsystem for dynamic disturbances. The IPFC providesa highly effective scheme for power transmissionmanagement at multilane substation.

Benefits of Using FACTS Controllers

Some of the benefits that can be achieved byimplementation of FACTS Controllers are

1) Control of power flow2) Increase in the loading capability of the lines

to their thermal limits.3) Increase in system security

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4) Provide secure tie line connections toneighbouring utilities thereby decreasing the overallgeneration reserve requirements on both sides.

5) Provide greater flexibility in siting newgeneration

6) Reduce reactive power flow and allow thelines to carry more active power.

7) Reduce loop flows8) Increase utilization of lowest cost generation.

Conclusion

Using the advanced solid state technology FACTSControllers offer flexibility of system operationthrough fast and reliable control. They enable betterutilization of existing power generation andtransmission facilities without compromising systemavailability and security. The system planner has toselect a controller out of the set if FACTSControllers, for improving the system operation,based on cost benefit analysis.

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Introduction to Simulink®

Dr Abraham T MathewDepartment of Electrical Engineering

National Institute of Technology CalicutKozhikode 673 610, KERALA

atm@nitc.ac.in

INTRODUCTION

Simulink is an interactive tool for modelling, simulating and prototyping discrete, analog, andmixed signal systems using the block sets rather than the line of code. It works as an integral part of theMATLAB® environment. MATLAB/Simulink platform is being extensively used in industries also tosimulate algorithms and evaluate alternatives early in the design process.

For example with the DSP Blockset, the Simulink helps to build block diagrams, simulate dynamicsystems, evaluate system performance, and iterate the designs for complex DSP algorithms.

Power System Blockset is an application based on Simulink for studies in Power Engineering.Simulink has a graphical interface for the user for constructing block diagram models using "drag-

and-drop" operations with the help of mouse and few keystrokes.It is found that in many engineering applications Simulink is used to create high fidelity plant

models of real world systems and to design algorithms to control these systems.

COMPUTATIONAL ASPECTS OF SimulinkThe Simulink simulation engine offers numerous computational features for simulating large,

challenging systems. Foremost among these is the set of integration algorithms, called solvers, which arebased on the MATLAB ordinary differential equation (ODE) suite. These solvers are well suited tocontinuous-time (analog), discrete-time, hybrid, and mixed-signal simulations of any size. They provide fast,reliable, and extremely accurate simulation results.

The solvers offer support for certain differential algebraic equations (DAEs) with multi-channelalgebraic loops. An algebraic constraint block facilitates the solution of a system in which an algebraicconstraint applies to the governing set of equations. The solvers also support stiff systems, and systems withstate events (such as discontinuities, including instantaneous changes in plant dynamics).

SIMULATION OF DYNAMIC SYSTEMS USING SimulinkSimulating a dynamic system is a two-step process with Simulink. First, we create a graphical

model of the system to be simulated, using the Simulink model editor. The model depicts the time-dependentmathematical relationships among the system's inputs, states, and outputs Then, we use Simulink to simulatethe behaviour of the system over a specified time span. Simulink uses information that we have entered intothe model to perform the simulation.

BLOCK DIAGRAMSThe Simulink block diagram or the so-called graphical model is a pictorial model of the dynamic

system. It consists of a set of symbols, called blocks, interconnected by lines. Each block represents anelementary dynamic system that produces an output either continuously (a continuous block) or at specificpoints in time (a discrete block). The lines represent connections to the blocks’ inputs mostly from the outputof another block/s.

Every block in a block diagram is an instance of a specific type of block. The type of the blockdetermines the relationship between a block's outputs and its inputs, states, and time. A block diagram cancontain any number of instances of any type of block needed to model a given system. Behind each blockthere is an underlying MATLAB-executable program, which is executed during the run of the simulation.

BLOCKSBlocks represent elementary dynamic systems that Simulink knows how to simulate. A block

comprises one or more of the following: a set of inputs, a set of states, a set of parameters and a set ofoutputs.

state(x)parameters(P)

Input()

Output( )

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A block's output is a function of time and the block's inputs and states (if any). The specific functionthat relates a block's output to its inputs, states, and time depends on the type of block of which the block isan instance.

TO START Simulink

To start Simulink, one has to start MATLAB. So, first start a MATLAB session by clicking on theMATLAB 5.3 shortcut icon on the desktop. We will get the MATLAB screen with a command prompt ».The Menu toolbar would also be visible.

Now to open the Simulink session, either use the mouse and click on the Simulink icon as inFig.1 or type Simulink at the MATLAB command prompt » and press the ENTER key(remember MATLABis case sensitive and hence use only lowercase letters). This will open a Simulink window as shown in Fig.2.Now we can start building the models using Simulink.

STEPS TO BUILD A SIMPLE MODEL USING SIMULINKWe may follow the steps given below, in order to build a simple transfer function model of a linear

continuous time system.

1. To begin withStart a Simulink session as given above.

2. Opening the Target windowOpen a new model-window by clicking New icon the File menu as given in Fig.3

CLICKHERE

Type simulink andpress ENTER key

Fig.1

Fig.2

One ofthis willstart aSimulinksession

CLICKHERE

Fig.3

You get thistarget model

window

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Fig.4

3. To construct the modelDrag the chosen block into the target model window using the mouse. For example, if we want to

simulate the Transfer function42

1)( 2 +++=ss

ssG , we may choose the block Transfer Fcn under

Continuous under Simulink. We may drag the mouse from Transfer Fcn to the target model window. Wewill get a simple transfer function block. We may double click this icon of the block to get a Dialog box inwhich we can the parameters as Numerator [1 1] and Denominator [1 2 4] and applying it by clicking onthe Apply button of the Dialog box. We will get a screen as shown in Fig. 4.

4. To add Source & SinkSource is the block corresponding to the source of signal. A number of blocks are available under

this category. We have to choose the appropriate block for the given simulation case. For example we maychoose Step under Sources under Simulink for the above case.

Similarly, sink is block pertaining to the destination to which the simulation results have to be sentduring the course of simulation. Scope is a block analogous to the CRO, using which we can view theprogress of the simulation. Output can be sent to file or MATLAB WORKSPACE also.

We may choose the Scope as the sink and Step as the source. We will get a Simulink model asshown in Fig.5. Blocks are interconnected using lines. The connecting line from an output poit to an inputpoint can be drawn by holding down the mouse button and dragging the mouse cursor from starting point oteh ending point. An arrow will appear to show the direction of the signal flow. Obviously, we have to dragthe mouse in the intended direction of signal flow.

In the example model being built, the output of the source is joined with the input of the TransferFcn block and then the output of the Transfer Fcn is connected to the scope as shown in Fig.5.

This completes the construction of the block diagram in Simulink. The analysis/simulation can bedone by running the simulation using the simulation option from the menu bar as given below.

Fig.5

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TO RUN A SIMULATION

For running the simulation of a model, we have to choose the Start option under the Simulationmenu from the Menu bar of the model window. Before we could run a trial simulation, we have to set theparameters of the various blocks. For the above case we may follow the steps as given below.

1. Double click on the Step block to get its Dialog box. Set the step time, Initial value, Final value andstep size as 0,0 10 and 0.1 respectively. Apply it by clicking on the Apply button of the Dialog box.Close the Dialog box.

2. Go to the Menu bar of the target window and pull down the Simulation menu.3. Click on the Start option using the mouse. This will cause the simulation to run once.4. Double click on the Scope block to view the output. We will get a display as shown in Fig.6.

CONSTRUCTING SOPHISTICATED & ADVANCED MODELSIn order to use Simulink for the analysis and simulation of sophisticated systems, it is advisable to

follow a bottom-up approach. We may segregate the complete system into subsystems and build themseparately, preferably on separate simulation target windows. There upon build the complete system on asingle window. We can exercise a control on the overall size of the model built on the window by using themask option. One has to be very thorough about the expected outcome of the simulation, so as to be able totroubleshoot the model if any error warnings pop up during the run of the simulation. Simulink facilitatesrepetition of the runs of the simulation any number of times.

TO IMPROVE SIMULATION PERFORMANCE AND ACCURACYSimulation performance and accuracy can be affected by many factors, including the model design

and choice of simulation parameters. The Solvers handle most model simulations accurately and efficientlywith their default parameter However, some models will yield better results if we adjust solver andsimulation parameters. I addition, if we have information on the expected behaviours of the given model thesimulation can be improved by providing this information through the solver.

Some tips are:i) Use the built-in Fcn block or Elementary Math block whenever possible.ii) Adjust the maximum step size or use the default value by choosing auto.iii) Reduce the time interval.iv) Adjust the relative tolerance limits wherever admissiblev) Configure the S functions properly either as a subsystem or as a C-MEX S Function.

FOR IMPROVING ACCURACYFor a model that has states whose values approach zero, and if the absolute tolerance parameter is

too large, the simulation will take too few steps around areas of non-zero state values. Reduce this parametervalue or adjust it for individual states in the Integrator dialog box.

Fig.6

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If reducing the absolute tolerances do not sufficiently improve the accuracy, reduce the size of therelative tolerance parameter to reduce the acceptable error and force smaller step sizes and more number ofsteps.

ANALYSING SIMULATION RESULTSOutput trajectories from Simulink can be plotted using one of the three methods

• Feeding a signal into either a Scope or an X-Y Graph block• Writing output to return values to MATLAB workspace memory using To Workspace blocks and

then plotting• Sending values to a file and then plotting later.

USE OF MASK TO BUILD COMPLEX MODELSAs mentioned earlier, when we have to simulate very complex systems, a straight forward

construction of model on the Simulink window may render a model which is too unwieldy and full view ofmodel will not be possible. We may have to often scroll up down left or right. There may also be situationswhere a particular type of subsystem be not available in the set of blocks.

When the model is not limited to the viewable area of the screen, we may use the masking options.When there is no suitable block User may create one using S-functions.

Masking is a powerful Simulink feature that enables us to customise the dialog box and icon for thesubsystems.

With masking we can:• Simplify the use of the models by replacing many dialog boxes in a subsystem with a single one.

Instead of requiring the user of the model to open each block and enter parameter values, thoseparameter values can be entered on the mask dialog box and get it passed to the underlying blocksin the masked subsystem.

• Provide a more descriptive and helpful user interface by defining a dialog box with user definedblock description, parameter field labels and help text.

• Define commands that compute variables whose values depend on block parameters.• Prevent unintended modifications of subsystems by hiding their contents behind a customised

interface.• Create a block icon that is relevant to the context of the subsystem.

To mask a block or set of interconnected blocks first select the subsystem using mouse, and choose CreateMask option from the Edit menu. A Mask Editor dialog box will appear. The Mask Editor has threepages, each handling a particular aspect of the mask. I.e.

• Initialisation-This page is to define and describe mask dialog box parameter prompts, name thevariables associated with the parameters, and specify initialisation commands.

• Icon- This can be used to define an icon for the masked subsystem• Documentation- This can be used to define the mask type, specify the block description and the

block help

CONDITIONALLY EXECUTED SUBSYSTEMSThere are a few options like Triggered Subsystems, Enabled subsystems, Trigger and Enable

subsystems which will help us to simulate systems which will need conditional execution.An enabled subsystem executes when the enable signal is positive. A Triggered subsystem

executes once each time a “Trigger Event ” occurs. A trigger event can occur on the rising or falling edge ofa trigger signal, which can be continuous or discrete.

A Triggered and Enabled Subsystem executes once on the time step when a trigger event occurs ifthe enable control signal has a positive value at that step. The behaviour of this tyoe subsystems is acompbination of the enabeled subsystem and the triggred subsystem as shown below.

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MUXAND

DEMUXThe Mux block combines several input lines into one vector line. Each input line can carry a scalar

or vector signal. The output of a Mux block is a vector.

The Demux block separates a vector input signal into output lines, each of which can carry a scalaror vector signal. Simulink determines the number and widths of the output signals by the Number ofoutputs parameter and that of input to Mux by Number of inputs

THE POWER SYSTEM BLOCKSETThe Power System Blockset allows scientists and engineers to build models that simulate power

systems. The blockset uses the Simulink environment, allowing a model to be built using click and dragprocedures. Not only can the circuit topology be drawn rapidly, but the analysis of the circuit can include itsinteractions with mechanical, thermal, control, and other disciplines. This is possible because all theelectrical parts of the simulation interact with Simulink's extensive modeling library. Because Simulink usesMATLAB as the computational engine, MATLAB's toolboxes can also be used by the designer.

THE NONLINEAR CONTROL DESIGN BLOCKSET

The Nonlinear Control Design (NCD) Blockset offers time domain-based, robust, nonlinear controldesign. Controller designs are developed as block diagrams in Simulink. You select a set of tunable modelparameters and graphically place time response constraints on selected output signals. Successive simulationand optimization methods are applied automatically, thereby tuning the selected model parameters.Simulink is required with the NCD Blockset

THE SIMULINK REAL-TIME WORKSHOPThe Simulink Real-Time Workshop® automatically generates C code directly from Simulink block

diagrams. This allows the execution of continuous, discrete-time, and hybrid system models on a wide rangeof computer platforms, including real-time hardware. Simulink is required.

The Real-Time Workshop can be used for:• Rapid Prototyping. As a rapid prototyping tool, the Real-Time Workshop enables you to implement

your designs quickly without lengthy hand coding and debugging. Control, signal processing, anddynamic system algorithms can be implemented by developing graphical Simulink block diagramsand automatically generating C code.

• Embedded Real-Time Control. Once a system has been designed with Simulink, code for real-timecontrollers or digital signal processors can be generated, cross-compiled, linked, and downloadedonto your selected target processor. The Real-Time Workshop supports DSP boards, embeddedcontrollers, and a wide variety of custom and commercially available hardware.

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• Real-Time Simulation. You can create and execute code for an entire system or specifiedsubsystems for hardware-in-the-loop simulations. Typical applications include training simulators(pilot-in-the-loop), real-time model validation, and testing.

• Stand-Alone Simulation. Stand-alone simulations can be run directly on your host machine ortransferred to other systems for remote execution. Because time histories are saved in MATLAB asbinary or ASCII files, they can be easily loaded into MATLAB for additional analysis or graphicdisplay.

CLOSURESimulink provides the right set of tools for fast, accurate modelling and simulation. Simulink

features an extensive block library for building complex models, convenient tools for monitoring simulationresults, and tight integration with MATLAB for access to the most comprehensive collection of design andanalysis tools.

It helps us in building block diagrams, simulating the system's behaviour for evaluating its performance, andto refine the design. Simulink integrates seamlessly with MATLAB,® providing you with immediate accessto an extensive range of analysis and design tools. These benefits make Simulink the tool of choice forcontrol system design, DSP design, communications system design, and other simulation applications.

Have a nice simulation with Simulink

FACTS SIMULATION USING PSCAD/EMTDC

Dr R. Sreeram KumarDepartment of Electrical Engineering

National Institute of Technology, Calicut

1. Introduction

PSCAD/EMTDC is the professional’ssimulation tool for analyzing power systems. PSCADis the graphical user interface and EMTDC is thesimulation engine. PSCAD/EMTDC is suitable forsimulating the time domain instantaneous responses,the electromagnetic transients, of electrical powersystems with FACTS equipment. The PSCADGraphical Interface greatly enhances the power ofEMTDC. It allows the user to schematicallyconstruct a circuit, run a simulation, analyze theresults, and manage the data in a completelyintegrated graphical environment. The following aresome of the common components found in systemsstudied using PSCAD/EMTDC:

• Resistors (R), inductors (L), capacitors (C)• Mutually coupled windings such as transformers• Frequency dependent transmission lines and

cables• Current and voltage sources• Switches and breakers• Diodes, thyristors and GTO’s• Analogue and digital control functions• Ac machines, exciters, governors, and stabilizers

models• Meters and measuring functions• Generic DC and AC controls• HVDC, SVC, and other FACTS controllers

2.Typical Studies Conducted usingPSCAD/EMTDC

The following are samples of types of studies that can beconducted using EMTDC.

• Contingency studies of AC networks consistingof rotating machines, exciters, governors, turbines,transformers, transmission lines, cables and loads

• Relay coordination• Transformer saturation effects• Insulation coordination of transformers, breakers

and arrestors• Impulse testing of transformers• Sub-synchronous resonance (SSR) studies of

networks with machines, transmission lines andHVDC systems

• Evaluation of filter design and harmonic analysis

• Control system design and coordination ofFACTS and HVDC; including STATCOM, VSC andcycloconverters

• Optimal design of controller parameters• Investigation of new circuit and control concepts

• Studies to determine the worst case over voltagedue to lightning strikes, faults or breaker operations.

3. Features of PSCAD• Multi-platform: PSCAD is available for use on

all Windows operating systems• Totally Integrated: You can put run-time plots

alongside the circuit or arrange them on a separatepage. Circuits, plots and descriptive comments canall be printed together.

• Modular: Electrical systems can be split intodifferent modules (or pages) without having toconnect them using transmission lines. Controlsystems can be modeled in separate modules as inearlier versions.

• Hierarchical: Circuits assembled using basicbuilding blocks can be contained inside modules(also called pages), which can in turn contain moresuch modules. Simply double-click on one of thesemodules to see the circuit inside.

• Online information: Point to any circuitcomponent and you will get useful information aboutsuch topics as the circuit connection, shortcomponent help, simulation data such as node voltageif the case is running, etc.

• HTML Help: All the detailed online help iswritten in HTML. It is fast, portable and easy tomaintain. Users can write these help pages for theirown components very easily.

• Graphical Component Design Tool: You candesign your PSCAD components in a completelygraphical environment called Component Workshop.This is the tool used to write/edit all the componentsin the Master library.

• Multiple Libraries and Cases in a Project: Nowyou can easily build cases that depend on multiplelibraries and simultaneously load multiple cases.Thus, you can copy circuit components from one caseand paste them into another easily.

• Multilevel Zoom and Split Views: You canzoom in on the entire circuit as well as selectively

SRK- B1

zoom in on selected plots. A single circuit can bedisplayed in multiple views, each with a differentzoom level.

• Sequencer Components: You can now monitorand control asequence of events easily using thelibrary of Sequence Components. They can be usedto set up complex sequences to control theapplication of faults, opening/closing of breakers, andwaiting for events (such as a zero crossing…).

4. Features of EMTDC

• Faster Solution and Memory EfficientStorage: Computationally intensive parts ofEMTDC are rewritten to maximize the speed.Network branch models and transmission line modelsare internally reorganized to provide memoryefficient storage.

• Dynamic Dimensioning: EMTDC is written ina FORTRAN 77 and FORTRAN 90 compliantmodel. When used in FORTRAN 90 mode, itdynamically allocates network dimensions to exactlyfit the simulation requirements. This enables you tomodel much larger cases compared to FORTRAN 77mode before you run out of computer memory.

• Ideal Branches: You can model infinite voltagesources, infinite transmission lines and cables, idealammeters and zero resistance switches. There is norestriction on how many such elements you can havein series and parallel.

• Interpolation with Instantaneous SwitchAlgorithm: EMTDC interpolates the solutionbetween two time steps to find the solution at theexact instant of the event. The instantaneous Switchalgorithm virtually eliminates losses due tointerpolation, producing very accurate results.

• MATLAB Interface: You can simulate all orpart of the controls in MATLAB and interface it tothe rest of the system simulation in PSCAD/EMTDC.You can process or plot EMTDC results in MATLABinteractively.5. Component Library

Components are the basic building blocks ofPSCAD circuits. Fig. 1 shows the major componentsof PSCAD. A component can have externalconnection points, which can be input, output andelectrical types. In addition, it can have internalparameters for inputting model data. Eachcomponent is usually designed to perform onespecific function. Double clicking on a componentopens its parameters.

6. Circuit Simulation using PSCAD/EMTDCDouble click on PSCAD icon: Start PSCAD

Select file & click on load project: Load an existing case (with psc extension)

Open ‘tutorial’ directory and click on Vdiv-1.psc

* [ The ‘project tree’ will now show this project Vdiv-1.psc ]

• Double click on the title to open and view thecircuit.

[ In the circuit, since Vsource = 1 Ω and Vload = Vsource/2.This voltage is measured using a volt meter Vmidconnected to the node between the source and theload. Iload = Esource / (Rsource + Rload)]

• Double click on the source component to viewits data. [Note that Vsource = 70.71 kV rms or100 V peak]

• Click anywhere in the empty space to de-selectthe selected component.

• Click the RUN Button to run the simulation(Watch the graphs as the simulation progress. At theend of the run, the message ‘EMTDC run completed’will appear].

7. Creating a New Case

• Select file and click on ‘Create NewProject’ (By default, the new project is labeled ‘noname.psc’. This will appear as the las project on theproject tree.

• Click the right mouse button on‘noname.psc’ and select ‘properties’.

• Click inside the “Description” field andtype a name for the case, say, “Voltage Divider”.(You can accept the rest of the default settings on thisform for the time being. The case is set up to run for0.5 seconds with a 50 microsecond time stop)

• Right click on the case name in theproject tree and select “save project as”

• Type the name of the file as “test.psc”.• Double click on “test.psc” in the project

tree with the left mouse button to open the main pageof your case.

• Double click on “Master-Library” toopen the same.

8. Typical Functions

Resizing Wires: The wire component is a special,built-in component that is resizable in length. Pressthe left mouse button close to either end of the wireand drag the mouse. If the entire wire moves youwere not close enough to the end. Let go the buttonand repeat the operation closer to the end. As thewire is resizing, move the mouse along the length of

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the wire this will simply change its length. However,if you move the mouse in a circle around the oppositeend of the wire, you can rotate it while resizing.

Editing Component Parameters: Nearly allcomponents have editable parameters. Theparameters are in the form of editable text fields, dropdown lists or radio buttons. To change a value in thetext field, click inside the white field and type thevalue. The drop down list has a downward pointingarrow on the right hand side. Click on that arrow tosee the list and click on the required item. To select aradio button, click on the item.

Viewing and Editing Component Parameters: Toview/edit component parameters, double click on it.Or select the Edit Parameters… from its componentmenu. This will open the component parametersdialog. The component name is displayed on the topbar of this dialog. Click in the data field and enterthe value. Most of the fields have a default value and[unit] where applicable. Make sure that you enter thevalue in the right unit as displayed.

Editing Multiple Components: Many of the basiccircuit design commands such as cut, copy, paste,move and rotate can be applied on a selection ofmultiple components.

Selecting Multiple Components: To select multiplecomponents, press and hold the left button on anempty space and drag the mouse. You will see aselection rectangle stretching with the cursor. Stretchit so that all the components to be selected arecompletely enclosed. Components that are partiallyenclosed are not selected. The selected componentsflash to confirm that they are selected.Including or Excluding components from Selection:To add a component to the selection or to remove itfrom the selection, hold the SHIFT key down andclick the left button on the component. If thecomponent is already flashing (selected), it will stopflashing, signifying that it is deselected, otherwise itwill be added to the selection and will start flashing.This is particularly an essential operation when youwant to select components that are scattered around.

Editing a Selection: Click the right button on any ofthe flashing components and select the desired menuitem from the pop up menu.

Electrical and Data Wire: A wire is a specialcomponent that is used for connecting two points onthe page and assumes its property based on what it isconnected to. A wire connecting electrical nodesbecomes an electrical wire (bus) and a wire

connecting non-electrical nodes becomes a data wire.Connecting an electrical node to a non-electrical nodeusing a wire is not permitted. An electrical wire canbe considered as a zero resistance conductor used inbuilding the electrical network. A “node label” maybe placed on an electrical wire to name the bus.Electrical wires have a voltage, with respect toground and can be viewed on the flyby messagewindow. Data wires are used for building the controlspart of the power system and they carry control dataduring a simulation. Only a single component can bethe source of data for a data wire, but severalcomponents may be recipients or sinks. The datawire assumes the type of the source signal which canbe REAL, INTEGER. A “data label” placed on a datawire gives the data source a signal name. Once a datasource is labeled, you can use that data label nameanywhere in the circuit to receive and use thatsignal.To pass data from one page to another, it mustbe “exported” on the page with the component thatgenerates the data, and imported on the pages whereit is required.

9. Monitoring Quantities in PSCAD

For the PSCAD simulation software to beuseful, access to the information generated during thesimulation must exist. For a simple circuit, it istheoretically possible to store all the simulation datafor every time-step of the simulation; for morecomplex circuits, this would consume a lot ofcomputer resources and unnecessarily slow down thesimulation. For these reasons, PSCAD lets the circuitdesigner select the quantities that are to be monitored.These quantities are either collected by EMTDCthroughout the simulation and can be sent to PSCAD(plot, meter, and flyby) on demand or they areoutputted into a file at the end of the run. There is nolimit on the number of quantities that can bemonitored; however monitoring does have an impacton the simulation speed.

10. ASSEMBLING THE VOLTAGEDIVIDER CASE

The voltage divider circuit in this exampleuses eight different components. Locate thesecomponents in the Master Library. When you doubleclick on the Master Library target on the ProjectTree, the main page of the library that contains allthese components opens.

Saving the Circuit: Whenever changes are made to acase, its title in the Project Tree will turn red. Tosave the changes, click the right mouse button on thecase title, Voltage Divider, in the Project Tree and

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left click on the item Save. The title will return to itsregular mode. This means that the case is saved todisk.

Running Your Case: Finally, click on the menubutton with the picture of the green arrow (at the topof the PSCAD window) to compile and run the case.This is the last step, assuming there are no errors. Ifthere are any errors, they will be logged in theMessage Tree. By default, the message tree windowis situated at the bottom left corner of PSCADwindow. However, it can be moved, resized orclosed. If you cannot locate the message window,select it from top menu bar using View => Messagesmenu. Resizes and move the windows as desired.

11. Plotting in PSCADCreating a New Plot: To create a new plot with asignal, right click on Output Channel componentmarked with Mid Point Voltage, and selectInput/Output Reference => Create new plot withsignal.

The Plot Menu: The above menu action creates andempty plot labeled Untitled next to your cursor. Plotis a complex component with many features and hasits own special menu referred to as the Plot Menu.Right click on the plot title bar (top bar on the plot)and the plot menu will pop up.

Plot Properties: Select Plot Properties from the plotmenu to change the title. When the Plot Propertiesdialog appears, click in the Title box and replaceUntitled with Currents and Voltages. Accept thedefault settings for the rest of the parameters. Clickon OK button at the bottom of the dialog to save thechanges and close the dialog. We will learn moreabout plots from the online help on plots at a latertime.Resizing the Plot: To resize the plot, press the leftmouse button on any corner of the plot, say buttonright, and drag the mouse diagonally away from theplot. If the entire plot moves, it means you were notclose enough to the corner. Let go of the mousebutton and repeat the operation from closer to thecorner. Resize the plot to approximately 3x3 inches.

Graphs: A plot is MERELY A CONTAINER THATCAN HOLD MULTIPLE GRAPHS AND EACHGRAPH CAN CONTAIN MULTIPLE CURVES.Next, we have to add graphs inside this plot andcurves inside those graphs.

Adding a Graph to the Plot: To add graphs to a plot,right click on the plot title the Add => Graph menuitem. This will insert a new plot. Repeat this to

insert the second graph. Voltage in the top graph andCurrent in the bottom.

Graph Properties: To customize the graph title andvertical axis label, right click on the top graph (whitespace in the center of the graph) and select GraphProperties… Enter Voltage in the Title box where itsays no name and click the button Edit_Y_Axis andenter kV in the Label field. Click OK and select thesecond graph titled noname. Enter Current for thetitle and kA for the vertical axis label.

Curves: Now we have to associate the current signalmeasured on the circuit to the second graph. This isdone in two steps. First we have to create a curvereference to the monitored signal on the circuit andthen paste it inside the graph.

Step 1: Creating a Curve Reference

To create a curve reference to the Load Currentsignal, right click on the Plot Channel component thatis connected to the load signal, then click on themenu item Input/Output Reference => Add asCurve.

Step 2 : Pasting the Curve Reference into theGraph

To paste this reference into the graph, right click ontop of the graph entitled Currents and select PasteCurve from the pop up menu.

Now you should have a plot entitled Currents andVoltages containing two graphs namely, Current andVoltage. The Voltage graph contains MidpointVoltage curve and the Current graph contains LoadCurrent curve. When you run the simulation, youwill be able to see these curves.

Help on Plots, Graphs and Curves: We havediscussed only those features of plots, graphs andcurves that are essential to this example in thischapter. There are a lot more features that youshould be aware of to make effective use of them.For a detailed help, right click anywhere on the plotand select Help from the pop up menu.

Reference

1. PSCAD/EMTDC (Version 3.0) ReferenceManual, Manitoba HVDC Research Centre Inc.,Canada

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INTRODUCTION TO MICROSIM DESIGN LAB 8.0 – PART ISuresh Kumar.K.S

Asst.Prof.,Dept.of Elect. Engg.,N.I.T Calicut

1. Introduction

MicroSim Design Lab 8.0 is an EDA (Electronic Design & Analysis) Suite based on PSpicebrought out by M/s MicroSim Corporation originally. MicroSim merged with ORCAD recently and this productwith few modifications is available now from M/s ORCAD.

A full installation of Design Lab 8.0 will install MicroSim Schematics, MicroSim PSpice A/D,MicroSim PSpice Optimizer, MicroSim Plogic, MicroSim PLSyn, MicroSim Parts, MicroSim Probe, MicroSimStimulus Editor, MicroSim PCBoards, SPECCTRA Autorouter and the model libraries. This introduction willdeal only with Schematics, PSpice A/D and Probe mainly with cursory coverage on Stimulus Editor and Partsroutine.The remaining components of Design Lab are beyond the scope of this introductory lecture.

The interaction between various programs in the Design Lab is shown in the Fig.1 below.

Fig.1 Flow Diagram showing Program Interactions in Design Lab

2. Who Does What in Design Lab?

PSpice A/D does the most important job of solving the equations describing the circuit to besimulated and preparing the output data i.e it does all the analysis. But it asks for many files related to the circuitbefore it can start simulating. These files are described below.

The primary circuit file contains analysis commands and references to netlist, alias, model andother files required by the circuit to be simulated. I t has .cir as its extension. The second file needed is the netlistfile that contains the components and connections of the circuit and goes with the extension .net. The third file isthe alias file with the extension .als. The PSpice program also calls for model files-both primitive device modelsand subcircuit definitions. Though PSpice provides standard stimulus functions for use in the circuit, custommade voltage and current waveforms may need to be used in some simulation studies. Design Lab permitssynthesis of such user defined stimulus functions in an Interactive Graphic program called Stimulus Editor. Thestimulus function drawn and saved in this editor will have the extension .stl and the PSpice A/D will ask for thesefiles too.

The Schematics program is the one that prepares all these files for PSpice A/D .It is a visualinterface to the whole of Design Lab. The circuit to be simulated is first drawn in this interface by drawingelement symbols from the part library, editing their attribute values, making interconnections between elements

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etc. A symbol may be edited for changing its graphics if necessary by invoking the Symbol Editor fromSchematics .In fact Schematics is the general entry point into the whole of Design Lab and all other programscan be started from Schematics .The commands to start all other programs are available as various menu entriesin Schematics. After preparing the diagram, the circuit thereby constructed ,will have to be checked for electricalrule consistency. Running ‘Electrical Rule Check’ or ‘Net List’ from analysis menu in Schematics does this.If the net listing is error free the .net,. cir and .als get written at this stage. Invoking ‘Simulate’ command fromthe analysis menu will start PSpice A/D and simulation will proceed to completion if there are no run time errors.

The Schematics program supports all Windows features like copy, cut, paste, print etc from theapplication environment. Cross application copy/cut/paste is allowed in a limited sense in that the circuitdiagram or its parts can be copied into windows clipboard by specifically invoking ‘Copy to Clipboard’command under Edit menu; but clipboard contents from other applications can not pasted into Schematicswindow.

The analysis options (which analysis is to be carried out, what kind of outputs are to begenerated, what error tolerances are to be used, what kind of control is needed on the simulation time step etc.)are to be selected before netlisting is done. Similarly the settings needed by the Probe program also are to bedone from Schematics. All the menu commands needed for this come under the ‘Analysis/Setup’ submenu. It ispossible to put voltage markers and current markers in the circuit diagram so that when the output visualisationprogram Probe starts up later it will know which waveforms to show by default. Also it is possible to makeProbe show a particular waveform by double clicking on the marker placed on the corresponding variable in theSchematics window.

The figure shows a very useful single phase rectifier with passive powerfactor correction. This circuit is used in many Electronic Fluorescent Lamp Ballasts available in the market. Thediagram was prepared in Schematics and ‘Copy to Clipboard’ from Edit menu in Schematics and Paste from Editmenu of Microsoft Word brought this figure into this lecture note. The circuit file-set for this circuit wasprepared by running ‘Net List’ from Analysis menu of Schematics. Design Lab includes its own text editorcalled MicroSim Text Editor. The three circuit files, namely lamppfc.cir, lamppfc.als and lamppfc.net wereviewed in this text editor and ‘copied’ from there and ‘pasted’ below.

Lamppfc.cir* D:\Msim Projects\lampPFC.sch

* Schematics Version 8.0 - July 1997* Sun Feb 20 03:02:39 2000** Analysis setup **.tran 20us 100ms 0 20us.OP* From [SCHEMATICS NETLIST] section of msim.ini:.lib "D:\MSim_8\UserLib\MyBlocks.lib".lib "D:\MSim_8\lib\nom.lib".INC "lampPFC.net".INC "lampPFC.als".probe.END

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Lamppfc.als* Schematics Aliases *

.ALIASESD_Diode1 Diode1(1=$N_0001 2=Output )D_Diode2 Diode2(1=$N_0002 2=Output )D_Diode3 Diode3(1=0 2=$N_0002 )D_Diode4 Diode4(1=0 2=$N_0001 )C_Cbulk1 Cbulk1(1=Output 2=$N_0003 )C_Cbulk2 Cbulk2(1=$N_0004 2=0 )R_Rload Rload(1=Output 2=0 )D_Dout1 Dout1(1=0 2=$N_0003 )D_Dout2 Dout2(1=$N_0004 2=Output )D_Dcharging Dcharging(1=$N_0005 2=$N_0004 )R_Rlimit Rlimit(1=$N_0003 2=$N_0005 )V_Vsource Vsource(+=Input -=$N_0002 )L_Linput Linput(1=Input 2=$N_0001 )_ _(Output=Output)_ _(Input=Input).ENDALIASES

Lamppfc.net* Schematics Netlist *D_Diode1 $N_0001 Output D1N4007D_Diode2 $N_0002 Output D1N4007D_Diode3 0 $N_0002 D1N4007D_Diode4 0 $N_0001 D1N4007C_Cbulk1 Output $N_0003 47uF IC=150C_Cbulk2 $N_0004 0 47uF IC=150R_Rload Output 0 1kD_Dout1 0 $N_0003 D1N4007D_Dout2 $N_0004 Output D1N4007D_Dcharging $N_0005 $N_0004 D1N4007R_Rlimit $N_0003 $N_0005 22V_Vsource Input $N_0002+SIN 0 320 50 0 0 0L_Linput Input $N_0001 10mH

These files reveal what in general circuit files will contain. Of course one is free to write thesefiles in some text editor program without drawing the circuit in Schematics. Only that one has to be very familiarwith the syntax of files and one has to have genuine hatred for the ‘Mouse’! Otherwise there is no reason forsubjecting oneself to quite unneeded inconveniences. The PSpice A/D program does not mind us preparing thecircuit files outside Schematics.

The simulation in PSpice A/D results in two output files-one with .out extension and the otherwith .dat extension. The first one can be opened with MicroSim Text Editor or by any other text editor for thatmatter and it will contain all the information contained in the three circuit files and in addition results of d.c andsmall signal bias solutions, initial transient solution etc. It will also report the total time taken for the numbercrunching. It will contain details of the error conditions that PSpice faced before quitting on error. The .out filefor the circuit above is given below.

**** 02/20/100 03:48:50 **** Win95 PSpice 8.0 (July 1997) ***** ID# 97696 **** * D:\Msim Projects\lampPFC.sch **** CIRCUIT DESCRIPTION***************************************************************************** Schematics Version 8.0 - July 1997* Sun Feb 20 03:02:39 2000** Analysis setup **.tran 20us 100ms 0 20us.OP* From [SCHEMATICS NETLIST] section of msim.ini:.lib "D:\MSim_8\UserLib\MyBlocks.lib"

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.lib "D:\MSim_8\lib\nom.lib"

.INC "lampPFC.net"**** INCLUDING lampPFC.net ***** Schematics Netlist *D_Diode1 $N_0001 Output D1N4007D_Diode2 $N_0002 Output D1N4007D_Diode3 0 $N_0002 D1N4007D_Diode4 0 $N_0001 D1N4007C_Cbulk1 Output $N_0003 47uF IC=150C_Cbulk2 $N_0004 0 47uF IC=150R_Rload Output 0 1kD_Dout1 0 $N_0003 D1N4007D_Dout2 $N_0004 Output D1N4007D_Dcharging $N_0005 $N_0004 D1N4007R_Rlimit $N_0003 $N_0005 22V_Vsource Input $N_0002+SIN 0 320 50 0 0 0L_Linput Input $N_0001 10mH**** RESUMING lampPFC.cir ****.INC "lampPFC.als"**** INCLUDING lampPFC.als ***** Schematics Aliases *.ALIASESD_Diode1 Diode1(1=$N_0001 2=Output )D_Diode2 Diode2(1=$N_0002 2=Output )D_Diode3 Diode3(1=0 2=$N_0002 )D_Diode4 Diode4(1=0 2=$N_0001 )C_Cbulk1 Cbulk1(1=Output 2=$N_0003 )C_Cbulk2 Cbulk2(1=$N_0004 2=0 )R_Rload Rload(1=Output 2=0 )D_Dout1 Dout1(1=0 2=$N_0003 )D_Dout2 Dout2(1=$N_0004 2=Output )D_Dcharging Dcharging(1=$N_0005 2=$N_0004 )R_Rlimit Rlimit(1=$N_0003 2=$N_0005 )V_Vsource Vsource(+=Input -=$N_0002 )L_Linput Linput(1=Input 2=$N_0001 )_ _(Output=Output)_ _(Input=Input).ENDALIASES**** RESUMING lampPFC.cir ****.probe.END_**** 02/20/100 03:48:50 **** Win95 PSpice 8.0 (July 1997) ***** ID# 97696 **** * D:\Msim Projects\lampPFC.sch **** Diode MODEL PARAMETERS**************************************************************************** D1N4007 D1N4001 IS 14.110000E-09 14.110000E-09 N 1.984 1.984 IKF 94.81 94.81 BV 1.500000E+03 75 IBV 10.000000E-06 10.000000E-06 RS .03389 .03389 TT 5.700000E-06 5.700000E-06 CJO 25.890000E-12 25.890000E-12 VJ .3245 .3245 M .44 .44

**** 02/20/100 03:48:50 **** Win95 PSpice 8.0 (July 1997) ***** ID# 97696 ****

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* D:\Msim Projects\lampPFC.sch **** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C**************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE(Input) 74.7280 (Output) 149.2000 ($N_0001) 74.7280($N_0002) 74.7280 ($N_0003) -.7969($N_0004) 150.0000 ($N_0005) -.7969 VOLTAGE SOURCE CURRENTS NAME CURRENT V_Vsource 0.000E+00 TOTAL POWER DISSIPATION 0.00E+00 WATTS**** 02/20/100 03:48:50 **** Win95 PSpice 8.0 (July 1997) ***** ID# 97696 **** * D:\Msim Projects\lampPFC.sch **** OPERATING POINT INFORMATION TEMPERATURE = 27.000 DEG C******************************************************************************** DIODESNAME D_Diode1 D_Diode2 D_Diode3 D_Diode4 D_Dout1MODEL D1N4007 D1N4007 D1N4007 D1N4007 D1N4007ID -1.42E-08 -1.42E-08 -1.42E-08 -1.42E-08 7.46E-02VD -7.45E+01 -7.45E+01 -7.47E+01 -7.47E+01 7.97E-01REQ 1.00E+12 1.00E+12 1.00E+12 1.00E+12 6.88E-01CAP 2.36E-12 2.36E-12 2.36E-12 2.36E-12 8.28E-06

NAME D_Dout2 D_DchargingMODEL D1N4007 D1N4007ID 7.46E-02 -1.43E-08VD 7.97E-01 -1.51E+02REQ 6.88E-01 1.00E+12CAP 8.28E-06 1.73E-12 _**** 02/20/100 03:48:50 **** Win95 PSpice 8.0 (July 1997) ***** ID# 97696 **** * D:\Msim Projects\lampPFC.sch **** INITIAL TRANSIENT SOLUTION TEMPERATURE = 27.000 DEG C**************************************************************************** NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE(Input) 74.7280 (Output) 149.2000 ($N_0001) 74.7280($N_0002) 74.7280 ($N_0003) -.7969($N_0004) 150.0000 ($N_0005) -.7969 VOLTAGE SOURCE CURRENTS NAME CURRENT V_Vsource 0.000E+00 TOTAL POWER DISSIPATION 0.00E+00 WATTS JOB CONCLUDED TOTAL JOB TIME 29.36

The other output file with .dat extension contains all the simulation output of variables of thecircuit. The simulation algorithm is a variable step integration algorithm. But the data file will contain valueswritten at equal intervals of time. The ‘print step’ i.e. the time increment used in writing the values into the .datfile is set in ‘analysis/setup’ menu in Schematics program. Also the ‘Probe Set Up’ submenu under ‘Analysis’menu in Schematics will ask for our decision on whether we want all the circuit variables written into the .datfile or only those variables that we have marked using markers in the circuit diagram. Also, there is a provisionto skip the data till a specified time point in the ‘Analysis/set up’ menu in Schematics. All these points are vitalin controlling the .dat file size. It takes only a few simulation runs (and may be an hour) of a somewhat complexcircuit to fill up the hard disk and make the PC crawl if all the variables are written into .dat file at too small aprint step with a too long a simulation final time! Even if the hard disk has ample space, it takes unbearably longtime to load large .dat files into the Probe program and display update in that program can be excruciatinglyslow if the .dat file is much bigger than the RAM size of the PC.

Only the Probe data visualisation program can open these files. Waveforms can be observed,analyzed, modified and printed from this program. It can be set up to run automatically at the start of simulationor after the simulation from Schematics. It can also run independent of other Design Lab programs and outputdata analysis can be done provided the required data file has been created already as a result of a simulation run.

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Note that the .dat file created in one simulation run gets overwritten as soon as another simulation run on thesame circuit. If the .dat file from a run has to be saved for future use it has to be saved under a different namebefore running another simulation of the same circuit.

Fig.3 Sample Output from Probe Program for the Circuit in Fig.2

The above figure reveals the basic capability of Probe in displaying the waveforms and doinga Fourier analysis on them. The same data file was opened in two windows in the program (the program supportsmultiple windows) and Fourier analysis option was activated in one window. By the way, notice that the a.c linecurrent has very good power factor and much reduced harmonic content compared to a traditional single-phaserectifier.

3. More About Schematics Program

3.1 Symbol & Model Library

A part available from part browser in Schematics program for placement in a circuit diagramhas three two major dimensions as far as circuit simulation is concerned. The first is the graphic appearance ithas along with its changeable and fixed attributes. The second is its ‘model’ i.e. its behavioral description inPSpice syntax. Both informations are placed in suitable files in the Msim_8/lib directory of the program. Thefirst dimension is available in a file with extension .slb and the model information is available in .lib extension.For example the file opamp.slb contains the symbols of many opamps and the corresponding models areavailable from opamp.lib.

It is not enough to have the libraries in the disk; it is necessary to configure the libraries for useby the Schematics program. Opening the editor configuration dialog box from options/editor configurationsubmenu in Schematics program after it starts up for the first time does this. The library path is to be entered inthe box provided for that purpose. After setting the library path go to ‘library setting’ dialog box. The dialogboxes are shown in the next page. The available libraries are listed in the list box (or can be brought up bybrowsing) and they are to be added to the list of configured libraries by clicking on the needed library and thenclicking on add local or add*. If library is added locally, this library will be configured and loaded by theSchematics program only when the particular .sch file i.e. the particular circuit diagram which was beingprepared at the time of adding this library i.e., the library is purely local to that circuit alone. On the otherhand, ifadded globally (add*) that library will be configured and loaded every time Schematics program is started andwill be available to any circuit project. The package extension .plb need not be added unless the installationincludes PCB Software and Autorouter also. Browsing in the ‘Library Setting’ dialog box may bring up librarieswhich are not identified in the library path setting in the parent dialog box i.e. in the ‘Editor Configuration’ Box.It is also possible to add library files from such a library directory either locally or globally. But since thedirectory is not listed in the path setting , the program will return ‘unable to find library path’ error every time it

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starts up. So the first thing to do is to enter the directory path from which we want to configure libraries to the‘library path’ list.

3.2 The Symbol Editor

When a part is placed in the schematics it becomes an instance of the part. It is possible and itis needed to change one or more attributes of the part instance before the schematic is ready for simulation. Forexample the figure below shows the dialog box for a resistor instance (obtained by double clicking on it afterplacing it in the schematic).

The box shows all theattributes including theones that can not bechanged from theSchematics program (theones with asterisk). Theonly ones to be changedare the value of theresistor and the packagesreference (the last entrywhich is not visible in thefigure). Obviously thechanges made fromschematic can be savedonly in the instance partand not to the part in thelibrary. And it should be

so. But what if we want to edit the attributes of some symbol and save it to the library so that the changes(changes in graphics or attributes, addition or deletion to the attribute list, changes in pin configurations etc.)made will be effective for all instances of the concerned part? What if we want to create a new symbol and add itto the library? And what if we want to create a new library of new symbols? That is when we need the SymbolEditor program. This program can be started by choosing to edit an already placed symbol in the Schematicsprogram or by choosing File/Edit Library submenu in the same program.3.3 Hierarchical and Multi Page Designs

Not all designs can be drawn in a single page. Not all designs can be visualised in a singlelayer since there will be too many details cluttering vision in every sense. It is only natural on the part of anintelligent designer to think of a hierarchical approach to the problem of a complex design. And Schematicspermits this. We can draw the system using functional blocks and define it as the top layer. Then each block maybe ‘pushed’ into ('push' is a submenu available under ‘navigate’ menu of the program) and the detailed circuit ineach block may be put together. Of course, the detailed circuit inside a block in the top layer may in its turn

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contain blocks that may have to be pushed into to see the details. And, so on to as many levels of hierarchy asneeded. The technique described just now involves drawing blocks first and then getting down to filling them upwith circuits and/or further blocks. This is the so-called ‘Top-Down’ approach.

The opposite approach is also possible in Schematics. In the ‘Bottom-Up’ method the detailedcircuits, based on functions performed by them, will be assembled separately. Then they will be converted intohierarchical symbols by using File/Symbolize submenu in Schematics. Later these hierarchical symbols will beassembled together to form the top layer of the system. The menu ‘Navigate’ and its submenu items deal withthe navigation in the layers of a hierarchical design.

Different schematics at different levels of the same hierarchical design or of another designmay make use of hierarchical blocks that contain same sub-schematic inside. But if any of them is pushed intoand edited then the changes made will be effective for all the blocks using this underlying schematic. Similarlyhierarchical symbols may also be used many times in the same design or in different designs. But all of themmap to same entity and any editing done on the internal circuit of a hierarchical symbol from any schematic willenforce those changes every where that symbol is used. In this sense the hierarchical symbols created by users isvery much different from the symbols available from a library.

Even with hierarchical approach, it may not be possible to draw the entire design in one page.Schematics allow multi page design and off-page connector symbols allow signal passing between pages. Globaloff-page connectors with a common label connect the points in different pages together even if these pointsbelong to different layers of the hierarchical design. Local off-page connectors of same label connect points indifferent pages only if the pages belong to the same level in a hierarchical design.3.4 Model Files and Model Editing

Usually; but not always, a symbol is associated with a model. Models define the electricalbehaviour of parts or subcircuits for simulation. Two kinds of models are in use. The first is the so-calledprimitive spice device models and goes with a declaring statement of .MODEL .The second kind of modeldefinition is a subcircuit definition and it describes the behaviour of the candidate part in terms of a circuitdescription employing PSpice devices i.e. the ones which have primitive device models. This kind of model willgo with a .SUBCKT/.ENDS construct.

An example of a .MODEL definition is given below.This is included in the model library filediode.lib. Library files can be opened with any text editor.

.MODEL D1N4148/TEMP D (+ IS = 1.27106E-8+ RS = 0.7546332+ N = 1.9215823+ TT = 3.679E-9+ CJO = 1.72434E-12+ VJ = 0.3026211+ M = 0.2+ EG = 1.11+ XTI = 3+ KF = 0+ AF = 1+ FC = 0.998001+ BV = 1E5+ IBV = 1.0E-10+ )*$An example for a SUBCKT definition type MODEL file of an opamp is given below. This was

taken from the file opamp.lib opened in Wordpad.* connections: non-inverting input

* | inverting input* | | positive power supply* | | | negative power supply* | | | | output* | | | | |.subckt mc1741 1 2 3 4 5* c1 11 12 8.660E-12 c2 6 7 30.00E-12 dc 5 53 dy

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de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2),(3,0),(4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 42.44E6 -1E3 1E3 42E6 -42E6 ga 6 0 11 12 188.5E-6 gcm 0 6 10 99 5.961E-9 iee 10 4 dc 15.16E-6 hlim 90 0 vlim 1K q1 11 2 13 qx q2 12 1 14 qx r2 6 9 100.0E3 rc1 3 11 5.305E3 rc2 3 12 5.305E3 re1 13 10 1.837E3 re2 14 10 1.837E3 ree 10 99 13.19E6 ro1 8 5 25 ro2 7 99 25 rp 3 4 18.16E3 vb 9 0 dc 0 vc 3 53 dc 1 ve 54 4 dc 1 vlim 7 8 dc 0 vlp 91 0 dc 20 vln 0 92 dc 20.model dx D(Is=800.0E-18).model dy D(Is=800.00E-18 Rs=1m Cjo=10p).model qx NPN(Is=800.0E-18 Bf=93.75).ends*$

It ispossible to edit themodel associated witha symbol placed in aschematic by selectingit and invokingEdit/Model submenu.It is even possible toassociate an entirelydifferent model. Butwhether editing orcomplete change, itwill be valid only forthe instance part andnot for the library part.This editing can bedone by the ModelEditor in the textediting mode or by theParts program if thatparticular part issupported by thatprogram. The Model

Editor window is shown in the last page. Model Editor can be opened from the Symbol Editor window too. Butthe model editing done within the Symbol Editor window is global i.e. it changes the library itself.

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INTRODUCTION TO MICROSIM DESIGN LAB 8.0 – PART IISuresh Kumar.K.S

Asst.Prof.,Dept.of Elect. Engg.,N.I.T Calicut

1. The MicroSim PSpice A/D Program

MicroSim PSpice A/D is a simulation program that models the behavior of a circuit containingany mix of analog and digital devices. Used with MicroSim Schematics for design entry, we can think of PSpiceA/D as a software-based breadboard of our circuit that we can use to test and refine our design before evertouching a piece of hardware by running basic and advanced analyses PSpice A/D can perform. Such analysesthat this program can perform are: DC, AC, and transient analyses, so we can test the response of our circuit to different inputs. Parametric, Monte Carlo, and sensitivity/worst-case analyses, so we can see how our circuit’s behavior

varies with changing component values. Digital worst-case timing analysis to help we find timing problems that occur with only certain

combinations of slow and fast signal transmissions.

1.1 Analyses We Can Run with PSpice A/D

1.1.2 Basic Analyses

DC sweep & other DC calculationsThese DC analyses evaluate circuit performance in response to a direct current source.DC Analysis TypesDC Sweep - Steady-state voltages, currents, and digital states when sweeping a source, a model parameter, ortemperature over a range of values.Bias point detail - Bias point data in addition to what is automatically computed in any simulation.DC Sensitivity - Sensitivity of a net or part voltage as a function of bias point.Small-signal DC transfer - Small-signal DC gain, input resistance, and output resistance as a function of biaspoint.

AC sweep and noiseThese AC analyses evaluate circuit performance in response to a small-signal alternating current source. To runa noise analysis, we must also run an AC sweep analysis.AC Analysis TypesAC sweep - Small-signal response of the circuit (linearized around the bias point) when sweeping one or moresources over a range of frequencies. Outputs include voltages and currents with magnitude and phase; we canuse this information to obtain Bode plots.Noise - For each frequency specified in the AC analysis:

· Propagated noise contributions at an output net from every noise generator in the circuit.· RMS sum of the noise contributions at the output.· Equivalent input noise.

Transient and FourierThese time-based analyses evaluate circuit performance in response to time-varying sources. To run a Fourieranalysis, we must also run a transient analysis.Time-Based Analysis TypesTransient - Voltages, currents, and digital states tracked over time. For digital devices, we can set thepropagation delays to minimum, typical, and maximum. If we have enabled digital worst-case timing analysis,then PSpice A/D considers all possible combinations of propagation delays within the minimum and maximumrange.Fourier - DC and Fourier components of the transient analysis results.

1.1.2 Advanced Multi-Run Analyses

The multi-run analyses—parametric, temperature, Monte Carlo, and sensitivity/worst-case—result in a series ofDC sweep, AC sweep, or transient analyses depending on which basic analyses we enabled.

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Parametric and temperature-For parametric and temperature analyses, PSpice A/D steps a circuit value in asequence that we specify and runs a simulation for each value.

Parametric –• Global parameter• Model parameter• Component value• DC source• Operational temperature

Temperature• Operational temperature

Monte Carlo and sensitivity/worst-case

Monte Carlo and sensitivity/worst-case analyses are statistical. PSpice A/D changes device model parametervalues with respect to device and lot tolerances that we specify, and runs a simulation for each value.Monte Carlo - For each simulation, randomly varies all device model parameters for which we have defined atolerance.Sensitivity/worst-case- Computes the probable worst-case response of the circuit in two steps:1. Computes component sensitivity to changes in the device model parameters. This means PSpice A/Dnonrandomly varies device model parameters for which we have defined a tolerance, one at a time for eachdevice and runs a simulation with each change.2. Sets all model parameters for all devices to their worst-case values (assumed to be at one of the tolerancelimits) and runs a final simulation.

1.2 The Analysis Output Files

After first reading the circuit file, netlist file, model libraries, and any other required inputs,PSpice A/D starts the simulation. As simulation progresses, PSpice A/D saves results to two files—the Probedata file with .dat extension and the PSpice output file with .out extension.1.2.1 Probe

Probe is a graphical results analyzer. When PSpice A/D completes the simulation, Probe plotsthe waveform results so we can visualize the circuit’s behavior and determine the validity of our design. Performpost-simulation analysis of the result. This means that we can plot additional information derived from thewaveforms. What we can plot depends on the type of analyses we run. Bode plots, phase margin, derivatives forsmall-signal characteristics, and waveform families are only a few of the possibilities. We can also plot otherwaveform characteristics such as rise time versus temperature, or percent overshoot versus component value.Probe also pinpoints design errors in digital circuits When PSpice A/D detects setup and hold violations, raceconditions, or timing hazards, Probe displays detailed message text along with corresponding waveforms. Probealso helps to locate the problem in our schematic.

The Probe data file contains simulation results in a format that Probe can read. Probe readsthis file automatically and displays waveforms reflecting circuit response at nets, pins, and parts that we markedin our schematic (cross-probing). We can set up our simulation so that Probe displays the results as thesimulation progresses or after the simulation completes. Once Probe has read the Probe data file and displays theinitial set of results, we are free to add more waveforms and to perform post-simulation analysis of the data.

The PSpice output file is an ASCII text file with .out extension that contains:8 The netlist representation of the circuit.8 The PSpice command syntax for simulation commands and options (like the enabled analyses).8 Simulation results, and warning and error messages for problems encountered during read-in or simulation.

Its content is determined by:8 · the types of analyses we run,8 · the options we select for running PSpice A/D8 · the simulation control symbols (like VPRINT1 and VPLOT1) that we place and connect to nets in our

schematic.

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1.3 The DC Sweep AnalysisThe DC sweep analysis causes a DC sweep to be performed on the circuit. DC sweep allows

you to sweep a source (voltage or current), a global parameter, a model parameter, or the temperature through arange of values. The bias point of the circuit is calculated for each value of the sweep. This is useful for findingthe transfer function of an amplifier, the high and low thresholds of a logic gate, and so on. The setting up of allanalyses is done from Schematics program by choosing ‘Analysis/Set up’ submenu. The relevant dialog box isshown below with the no analysis option enabled.

A Common Emitter Amplifierdrawn in Schematics program is shown inFig.1.Simulating the circuit with no analysisoption selected in the analysis/set up menu resultsin simulation calculating only the d.c operatingpoint. Opening the output file in MicroSim TextEditor by choosing ‘Analysis/Examine Output’submenu can see the resulting information. Or theresult can be displayed in Schematics itself bychoosing ‘analysis/display results inSchematics/Enable Voltage Display’ submenu inSchematics program. The resulting display isshown in Fig.2.If DC Sweep analysis is selectedand the tab is pressed the following set up screenis displayed. Notice that ‘Voltage Source’ typesweep is selected and name is entered as V1 that isthe reference designator of the bias supply. Sweeptype is selected as ‘Linear’ and start value, Endvalue and Increment are also set. Pressing OKfollowed by closing the set up dialog completes

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the setting up of DC Sweep. Running the simulation and configuring the Probe properly results in the VCEwaveform shown in Fig.3.

Selecting Transfer FunctionAnalysis in the set up menu and pressing tabbrings up the following dialog box.

Notice the entries made. Runningsimulation results in calculation of d.c small signalgain between the bias supply and collector outputand some resistance levels. These results will beavailable in the .out file. The relevant portion ofthe file is pasted below.SMALL-SIGNAL CHARACTERISTICSV(Out1)/V_V1 = 5.066E-01INPUT RESISTANCE AT V_V1 = 7.565E+03OUTPUT RESISTANCE AT V(Out1) =4.995E+03

Selecting Sensitivity Analysis results in adialog box shown below.Notice that V(Out1) is entered there. This means that we want to calculate the change inthis voltage when the component values and transistor model parameter values change one at a time.The relevant

portion of simulation output file is pasted below.

DC SENSITIVITIES OF OUTPUT V(Out1)

ELEMENT ELEMENT ELEMENT NORMALIZED NAME VALUE SENSITIVITY SENSITIVITY (VOLTS/UNIT) (VOLTS/PERCENT)

R_R2 1.000E+04 -3.899E-04 -3.899E-02 R_R1 2.000E+04 1.980E-04 3.959E-02 R_Ro 1.000E+04 0.000E+00 0.000E+00 R_Re 3.300E+03 1.477E-03 4.873E-02 R_Rc 5.000E+03 -9.918E-04 -4.959E-02 V_V2 0.000E+00 0.000E+00 0.000E+00 V_V1 1.200E+01 5.066E-01 6.079E-02Q_Q1 RB 0.000E+00 0.000E+00 0.000E+00 RC 1.464E+00 9.671E-07 1.416E-08 RE 0.000E+00 0.000E+00 0.000E+00 BF 3.755E+02 -1.010E-04 -3.794E-04 ISE 7.049E-15 7.286E+12 5.136E-04 BR 2.611E+00 1.535E-11 4.007E-13 ISC 1.217E-10 -1.484E+04 -1.806E-08

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IS 7.049E-15 -1.111E+13 -7.832E-04 NE 1.281E+00 -8.026E-01 -1.028E-02 NC 1.865E+00 9.686E-07 1.806E-08 IKF 4.589E+00 -5.339E-06 -2.450E-07 IKR 5.313E+00 2.902E-17 1.542E-18 VAF 1.163E+02 2.576E-05 2.995E-05 VAR 0.000E+00 0.000E+00 0.000E+00

The nested DC Sweep tab in the DC Sweep Set up dialog box can be used to set up a nestedDC Sweep i.e a second sweep on another variable.For every value of first sweep variable the second variablewill be swept and repeated simulations will be performed.An example circuit for this is shown below.This cktwas DC Swept with main sweep on V1 from 0 to 5V in increments of 0.01V and second sweep was on I1 from 0to 200µA with increment set at 20µA.The marker shown will result in a display of common base characteristicof the transistor shown in Fig.5.

1.4 AC Sweep Analysis

AC sweep is a frequency response analysis. PSpice A/D calculates the small-signalresponse of the circuit, linearized around the bias point, to a combination of inputs. Here are a few

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things to note:• Nonlinear devices, such as voltage- or current-controlled switches, are linearized about their bias point value

before PSpice A/D runs the linear (small-signal) analysis.• Digital devices hold the states that PSpice A/D calculated when solving for the bias point.• Because AC sweep analysis is a linear analysis, it only considers the gain and phase response of the circuit;

it does not limit voltages or currents.The best way to use AC sweep analysis is to set the source magnitude to one. This way, the

measured output equals the gain, relative to the input source, at that output.To run an AC sweep analysis, we need to place and connect one or more independent sources

and then set the AC magnitude and phase for each source. The source to be used for conducting this analysis iseither VAC or IAC source from the Schematics parts. The AC Sweep set up screen for the Circuit in Fig.1 isshown above and resulting Probe output after simulation is shown in Fig.6.The input signal amplitude was10mV.

1.5 Transient Analysis

The Transient response analysis causes the response of the circuit to be calculated from TIME= 0 to a specified time. The transient analysis does its own calculation of a bias point to start with, using thesame technique as described for DC sweep. This is necessary because the initial values of the sources can bedifferent from their DC values. If we want to report the small-signal parameters for the transient bias point, weshould use the Transient command and enable Detailed Bias Point. Otherwise, if all we want is the result of thetransient run itself, we should only enable the Transient command.

During analog analysis, PSpice A/D maintains an internal time step that is continuouslyadjusted to maintain accuracy while not performing unnecessary steps. During periods of inactivity, the internaltime step is increased. During active regions, it is decreased. The maximum internal step size can be controlledby specifying so in the Step Ceiling text box in the Transient dialog. PSpice A/D will never exceed either the stepceiling value or two percent of the total transient run time, whichever is less. The internal time steps used maynot correspond to the time steps at which information has been requested to be reported. The values at the printtime steps are obtained by 2nd order polynomial interpolation from values at the internal steps. When simulatingmixed analog/digital circuits, there are actually two time steps: one analog and one digital. This is necessary forefficiency. Since the analog and digital circuitry usually have very different time constants, any attempt to lockthem together would greatly slow down the simulation. The time step shown on the PSpice A/D display during atransient analysis is that of the analog section.

Running transient analysis on switching circuits can lead to long run times. PSpice A/D mustkeep the internal time step short compared to the switching period, but the circuit’s response extends over manyswitching cycles. One method of avoiding this problem is to transform the switching circuit into an equivalent

circuit without switching. The equivalent circuit representsa sort of quasi steady state of the actual circuit and cancorrectly model the actual circuit’s response as long as the

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inputs do not change too fast. The Transient Analysis set up box with entries suitable for conducting transientanalysis of the Common Emitter Amplifier circuit in Fig.1 with a square wave source coupled to the base isshown above. The fourier analysis options can be enabled but much better fourier analysis can be done in theProbe program and hence the fourier option in this screen is generally never used. The simulation output isshown in Fig.7 and shows a somewhat surprising result that there is d.c component in the output after thecoupling capacitor. Not surprising when we remember that the simulation was for 0-10uS and the capacitors hadinitial voltages of zero value.

1.6 Parametric and Temperature Analysis

1.6.1 Parametric Analysis

If a parametric analysis is to be done, the circuit must be set up according to the swept variabletype as voltage source voltage source with a DC specification (VDC, for example), temperature, current sourcecurrent source with a DC specification (IDC, for example), model parameter PSpice A/D model or a globalparameter defined with a parameter block (PARAM). And a DC Sweep or AC Sweep or Transient Analysis mustbe set up.· In the Analysis Setup dialog box, click the Parametric button. Complete the Parametric dialog box as needed.· If needed, in the Analysis Setup dialog box, select the Parametric check box to enable it.· Start the simulationNote- Do not specify a DC sweep and a parametric analysis for the same variable.

Parametric analysis performs multiple iterations of a specified standard analysis while varyinga global parameter, model parameter, component value, or operational temperature. The effect is the same asrunning the circuit several times, once for each value of the swept variable.

The CE amp with a parameter called R with a default value of 10k and with the value of theelement Ro set to this parameter value is shown in fig.8.The parametric analysis dialog box with entries made forrunning a parametric analysis on the amplifier is also shown. Two analyses i.e transient analysis and parametric

analysis are selected. The simulation results in a data file with 11 sections.When the Probe program starts it will seek the information on the number of sections to be

loaded. If all sections are loaded and the ‘performance analysis’ menu selected and if MAX(V(Out2))/).01 isentered in the trace add dialog box the following plot in Fig.9 appears in the Probe window. This is a plot of themid frequency gain of the amplifier Vs load resistance.

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1.6.2 Temperature Analysis

In the Analysis Setup dialogbox, click the Temperature button.Specify the temperature or list oftemperatures in the TemperatureAnalysis dialog box. If needed, in theAnalysis Setup dialog box, select theTemperature check box to enable itand start the simulation.

When a temperature analysisis run, PSpice A/D reruns standardanalyses enabled in the Analysis Setupdialog box at different temperatures.Temperature analysis allows zero ormore temperatures to be specified. Ifno temperature is specified, the circuitis run at 27°C. If more than onetemperature is listed, the effect is thesame as running the simulation severaltimes, once for each temperature inthe list. Setting the temperature to avalue other than the default results inrecalculating the values oftemperature-dependent devices.

2. The MicroSim Probe Program

MicroSim Probe is the waveform analyzer for PSpice A/D simulations. In Probe, we canvisually analyze and interactively manipulate the waveform data produced by circuit simulation. Probe useshigh-resolution graphics so we can view the results of a simulation both on the screen and in hard copy. In effect,Probe is a software oscilloscope. Running PSpice A/D corresponds to building or changing a breadboard, andrunning Probe corresponds to looking at the breadboard with an oscilloscope.With Probe we can:• view simulation results in multiple plot windows• compare simulation results from multiple circuit designs, including checkpoint schematics, in a single plot

window• display simple voltages, currents, and noise data• display complex arithmetic expressions that use the basic measurements• display Fourier transforms of voltages and currents, or of arithmetic expressions involving voltages and

currents• for mixed analog/digital simulations, display analog and digital waveforms simultaneously with a common

time base• add text labels and other annotation symbols for clarification

PSpice A/D generates two forms of output: the simulation output file and the Probe data file.The calculations and results reported in the simulation output file act as an audit trail of the simulation. However,the graphical analysis of information in the Probe data file is the most informative and flexible method forevaluating simulation results.

A single Probe plot consists of the analog (lower) area and the digital (upper) area. A singleProbe plot consists of the analog (lower) area and the digital (upper) area. A plot window is a separatelymanaged waveform display area. A plot window can include multiple analog and digital plots. Because a plotwindow is a window object, we can minimize and maximize the window or move and scale the window withinthe Probe window area. A toolbar can be displayed in the Probe window and applies to the active plot window.We can have one or more Probe data files open in one plot window. Do one of the following:

· Using the Design Journal feature in Schematics set up Probe to automatically load open workingschematics and checkpoint files.

· After the first file is loaded, load other files into the same plot window by manually appending them inProbe.

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Any number of plot windows can be opened. Each plot window is an independent window.The same Probe data file can be displayed in more than one plot window. Only one plot window is active at anygiven time, identified by a highlighted title bar. Menu, keyboard, and cursor operations affect only the active plotwindow. Another plot window can be made active by clicking anywhere in the window.

We can print all or selected plot windows, with up to nine windows on a single page. When weselect Print from the File menu, a list of all open plot windows is displayed. Each plot window is identified bythe unique identifier in parentheses in its title bar. The arrangement of plot windows on the page can becustomized using the Page Setup dialog box. We can print in either portrait (vertical) or landscape (horizontal)orientation. We can also use Print Preview to view all of the plot windows as they will appear when printed.

2.1 Starting Probe

If we are using Schematics, we can automatically start Probe after a simulation is run, or wecan start Probe separately from Windows 95 or NT. When we start Probe, we can use the default .prb file or wecan use a custom .prb file.To automatically start Probe after simulation1. In Schematics, from the Analysis menu, select Probe Setup.2. In the Probe Setup Options dialog box, select the Probe Startup tab.3. In the Auto-Run Option frame, select Automatically Run Probe after Simulation.4. Select any other options that we want to use.5. Click OK.

To start Probe and monitor results during a simulation -1. In Schematics, from the Analysis menu, select Probe Setup.2. In the Probe Setup Options dialog box, select the Probe Startup tab.3. In the Auto-Run Option frame, select Monitor Waveforms (Auto-Update). If this option is unavailable, do thefollowing:a. Select the Data Collection tab.b. Clear the Text Data File Format (CSDF) check box. The Monitor Waveforms (Auto-Update) option shouldnow be available from the Probe Startup tab.4. Click OK.5. From the Analysis menu, select Simulate to start the simulation. Probe starts automatically and displays onewindow in monitor mode.6. Do one of the following to select the waveforms to be monitored:· In Probe, from the Trace menu, select Add, and enter one or more trace expressions.· In Schematics, from the Markers menu, select and place one or more markers (and marker color, as needed).

To start Probe from Schematics1. From the Analysis menu, select Run Probe.

To start Probe in Windows 951. From the Windows Start menu, select the MicroSim program folder and then the Probe shortcut.

Other Ways to Run Probe

Starting Probe during a simulation

Once a simulation is in progress, we can monitor the results for the data section currently being written byPSpice A/D. This function is only available when Monitor Waveforms (Auto-Update) is not enabled inSchematics in the Probe Setup Options dialog box.

To start Probe during a simulation1. Start the simulation2. In Schematics, from the Analysis menu, select Run Probe. Probe automatically opens the data file and the

data section that PSpice is currently writing. When started during a simulation, the Probe window monitorsthe waveforms for as long as the current data section is being written. After the data section is finished, thewindow reverts to manual mode.

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Pausing a simulation and then running ProbeWe can pause a simulation to analyze waveforms before the simulation is finished. Once we pause thesimulation, we can either resume the simulation or terminate it.

To pause a simulation and then run Probe1. In the PSpice A/D simulation status window, from the File menu, select Pause Simulation.2. From the File menu, select Run Probe and verify that the analysis is proceeding correctly.3. Do one of the following:

· In the PSpice A/D simulation status window, from the File menu, select Pause Simulation to clear thecheck mark.

· In the PSpice A/D simulation status window, from the File menu, select Terminate Simulation.

Interacting with Probe while in monitor modeAll of the Probe functionality is available when in monitor mode. However, functions that change the x-axisdomain (set a new x-axis variable) pause monitoring and place the window in manual mode until the x-axis isreverted to its original domain.Using Schematic Markers to Add TracesWe can place markers on a schematic to identify the points where we want to see the waveform results displayedin Probe. Markers can be placed before simulation to limit results written to the Probe data file and automaticallydisplay those traces in Probe.Fast Fourier transforms1. From the Plot menu, select X Axis Settings.2. In the Processing Options frame, choose the Fourier option.Performance analysis1. From the Plot menu, select X Axis Settings.2. In the Processing Options frame, choose the Performance Analysis option.New x-axis variable1. From the Plot menu, select X Axis Settings, and click Axis Variable.2. In the X Axis Variable dialog box, specify a new x-axis variable.Goal function evaluation1. From the Trace menu, select Eval GoalFunction.2. In the Evaluate Goal Function(s) dialog box,specify a goal function.Load a completed data section1. From the File menu, select Append.2.Specify a .dat file to append.

Limiting Probe Data File SizeWhen PSpice A/D runs, it creates a Probe data file. The size of this file for transient analyses is roughly equal to:(# transistors)·(# simulation time points)·24 bytes The size for other analyses is about 2.5 times smaller. For longruns, especially transient runs, this can generate Probe data files that are several megabytes in size. Even if thisdoes not cause a problem with disk space, large Probe data files take longer to read in and longer to displaytraces on the screen. We can limit Probe data file size by: placing markers on our schematic before simulationand having PSpice A/D restrict the saved data to these markers only excluding data for internal subcircuitssuppressing simulation outputLimiting file size using markersOne reason that Probe data files are large is that, by default, PSpice A/D stores all net voltages and devicecurrents for each step (for example, time or frequency points). However, if we have placed markers on ourschematic prior to simulation, PSpice A/D saves only the results for the marked wires and pins.To limit file size using markers1. In Schematics, from the Analysis menu, select Probe Setup.2. In the Probe Setup Options dialog box, select the Data Collection tab.3. In the Data Collection frame, select At Markers Only and click OK.4. In Schematics, from the Markers menu, select the marker type we want to place.5. If desired, on the Simulation toolbar, from the marker color list, select a color for one or more of the markers(and its Probe trace).6 Click wires or pins to place markers.7 Right-click to quit placing markers.8 From the Analysis menu, select Simulate.

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Limiting file size by excluding internal subcircuit dataBy default, PSpice A/D writes data to the Probe file for all internal nodes and devices in subcircuit models on aschematic. We can choose to exclude data for internal subcircuit nodes and devices.To limit file size by excluding data for internal subcircuits1. In Schematics, from the Analysis menu, select Probe Setup.2. In the Probe Setup Options dialog box, select the Data Collection tab.3. In the Data Collection frame, select All Except Internal Subcircuit Data and click OK.4. From the Analysis menu, select Simulate.Limiting file size by suppressing the first part of simulation output

Long transient simulations create large Probe data files because PSpice A/D stores many datapoints. We can suppress a part of the data from a transient run by setting the simulation analysis to start theoutput at a time later than 0. This does not affect the transient calculations themselves—these always start at time0. This delay only suppresses the output for the first part of the simulation.To limit file size by suppressing the first part of transient simulation output1. In Schematics, from the Analysis menu, select Setup.2. In the Analysis Setup dialog box, click the Transient button.3. In the No-Print Delay text box, type a delay time and click OK.

4. From the Analysis menu, select Simulate. No data will be stored until the delay has elapsed.Using Simulation Data from Multiple Files

We can load simulation data from multiple files into the same Probe plot in two ways: · By setting up Probe for automatic loading of checkpoint and working schematic data files. · By appending data files.

When more than one data file is loaded, we can add traces using all loaded data, data from onlyone file, or individual data sections from one or more files.Setting up Probe for automatic loading of data filesIn Schematics, we can set up Probe so data from open checkpoint and working schematics simulations isautomatically loaded.To set up Probe for automatic loading of data files1. In Schematics, from the Analysis menu, select Probe Setup.2. In the Probe Setup Options dialog box, select the Checkpoint tab.3. Select the following option: Automatically load data for open checkpoints.4. In the Show Results In frame, choose proper option.5. Click OK.Appending data filesWe can manually load data sets one at time into a plot window using the Append command.To append a data file1. In Probe, from the File menu, select Append.2. Select a .dat file to append, and click OK.3. If the file has multiple sections of data for the selected analysis type, the Available Sections dialog boxappears. Do one of the following:

· Click the sections we want to use. · Click the All button to use all sections.

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4 Click OK.Adding traces from specific loaded data files

If two or more data files have identical simulation output variables, trace expressions thatinclude those variables will plot traces for each file. However, we can specify which data file to use in the traceexpression. We can also determine which data file was used to generate a specific trace.To add a trace from a specific loaded data file

In Probe, from the Trace menu, select Add to display the Add Traces dialog box. In the TraceExpression text box, type an expression using the following syntax: trace_expression@fn where n is thenumerical order (from left to right) of the data file as it appears in the Probe title bar, or trace_expression@s@fnwhere s is a specific data section of a specific data file. Click OK.To identify the source file for an individual trace

In the trace legend, double-click the symbol for the trace we want to identify . The SectionInformation dialog box appears, containing the trace name and, if there is more than one data file loaded in theplot, the full path for the file from which the trace was generated. Also listed is information about the simulationthat generated the data file and the number of data points used. If the trace is from a checkpoint data file, thedialog box includes the checkpoint description.Probe Trace Expressions

Traces are referred to by Probe output variable names. Probe output variables are similar to thePSpice A/D output variables specified in the Schematics Analysis Setup dialog boxes for noise, Monte Carlo,worst-case, transfer function, and Fourier analyses. However, there are additional alias forms that are validwithin Probe. Both forms are discussed here.To add traces using Probe output variables1 From the Trace menu, select Add to display the Add Traces dialog box.2 Construct a trace expression using any combination of these controls:· In the Simulation Output Variables frame, click output variables.· In the Functions or Macros frame, select operators, functions, constants, or macros.· In the Trace Expression text box, type in or edit output variables, operators, functions, constants, or macros.3 If we want to change the name of the trace expression as it displays in the plot window, use the followingsyntax: trace expression;display name3. Click OK.

SA 1

LINEAR TRANSFORMATIONS

Ashok SElectrical Dept, NIT Calicut

Linear transformations simplifies the analysis and calculation. In 3-phase rotating machinesinduced e.m.fs are depends upon mutual inductance between stator and rotor windings, so mutualinductance depends upon angle between stator reference frame and rotor reference frame, i.e depends onangular speed. So e.m.f equation becomes differential equations to solve that are difficult, to simplify thecalculation transform stator 3-phase to rotor 2-phase (α, β, 0).

A symmetrical 2- pole, 3-phase winding on the rotor is represented by three coils A, B, C each ofN effective turns and mutually displayed by 120o, see Fig given below Maximum values of m.m.fs. Fa, F b,and Fc are shown along their respective phase-axes. The combined effect of these three m.m.fs, results in aconstant magnitude m.m.f., which rotates at a constant angular velocity depending on the poles andfrequency.

Fig.(a) Balanced 3-phase windings

Fig.(b) 2-phase windings on the rotor

If the three currents are

−=

=

32cos

cos

πω

ω

tli

tli

mb

ma

and

−=

34cos πω tli mc (1)

then, these will produce a m.m.f. of constant magnitude 2

3 Nlm rotating with respect to the three phase

winding must comply with the time-phase angle between the currents.In Fig.(b), a balanced two-phase winding is represented by two orthogonal coils α, β on the

rotor. For convenience in transformation the axis of phase A and C are taken to be coincident.If two-phase currents

A

B

C

Fa

Fb

Fc

120o

wr

Fβ

Fα

αβ

iα

iβ

SA 2

Andtltli

tli

mm

m

ωπωβ

ωα

sin2

cos

cos

=

−=

= (2)

flow in the two-phase windings, the result will be a m.m.f. of constant magnitude Nlm , revolving withrespect to the two-phase windings at the time frequency of the phase currents.

The m.m.f.s of three-phase and two-phase systems can be rendered equal in magnitude bymaking any one of the following changes:

(i) by changing magnitude of the two-phase currents,(ii) by changing number of turns of the two-phase windings,(iii) by changing both the magnitude of currents and number of turns.

These will be now discussed one after other.

(i) If the effective number of turns per phase in case of two-phase winding is N (ie. The windingfactors are same for both three-and two-phase windings) then for equal m.m.fs the magnitude of the currentin the two phases, must be 3/2 times the magnitude of the three phase currents. This can be proved byresolving the instantaneous 3-phase m.m.fs along the α-β axis. Ref. to Fig. above, gives

[ ]000 240cos120cos0cos cbaa iiiNNi ++=

or ( )

+−= cbaa iiii

21

Similarly [ ]000 240sin120sin0sin cba iiiNNi ++=β

or

−+= cb iii

23

230β (3)

For a balanced system

( )

+−=∴

=++

cbaa

cba

iiii

iii

21

0

or aaa iioriii23

21 =+= αα (4)

Thus the magnitude of the two-phase currents is 3/2 times the magnitude of the three phasecurrents

.With the conditions given above, equal m.m.fs will give rise to equal fluxes. Number of effective turns

per phase being the same in both the windings, the magnitude of phase e.m.fs of the two and three phasewindings would be equal. The power per phase of the two-phase system (V.3/2.1) is thus 3/2 times thepower per phase (V.!) of the three phase system. Note that the total power of the two-phasesystem( ( )1...2 3

2V= .and the three phase system (=3 VI) is the same. Thus the invariance of power hasbeen attained. The only disadvantage is that the transformation of current and voltage will differ because ofthe presence of factor 3/2 in the current transformation. As factor 3/2 appears in the current transformationand not in voltage transformation, the per phase parameters of the two-phase induction machines will notbe the same.

SA 3

(ii) If the effective number of per-phase turns winding is made 3/2 times that of the three phasewinding, then for equal m.m.fs the magnitude of the currents in the two-phase and three phase system mustbe equal i.e. iα =Ia. This can be proved as is done in the previous case.

With these conditions, the per phase voltage of two-phase machine will be 3/2 times (3/2 V) theper phase voltage (v) of the three-phase system.

The power per phase in two-phase system = VI23

Total power in the two-phase system = VI3Also total power in the three-phase system = VI3

Here again the invariance of power has been obtained, but, s earlier, the transformation of currentand voltage will differ because of factor 3/2 in the voltage transformation. As such, per phase parameters ofthe 2-phase induction machine will be different from that of the 3-phase induction machine

.(iii) Here both the magnitude of currents and number of turns of the two-phase system are changed toobtain identical transformation for voltage and current.

Let the number of per-phase turns in the two-phase winding be made 23

times the per- phase turns of

the three-phase winding.

Then for equal m.m.fs, .23

aa ii = his can be proved by resolving the 3-phase m.m.fs along the α- axis

as shown below:

−−= cba iiiNNi

21

21

23

α

or ( )

+−= cba iiii

21

32

α

a

aa

i

ii

23

21

32

=

+=

( 5)

The voltage per-phase of the two-phase winding is23

times that of the three-phase winding. Thus the

phase voltage and current of the two-phase system are 23

times those of the three-phase system. This fact

results in identical transformations for both the voltage and current.

SA 4

−+=

−−=∴

cb

cbaa

iiiand

iiii

23

230

32

21

21

32

β

(6)

.Since the transformations for voltage and current are identical, impendence per-phase of the two-and three-phase systems is the same. This is illustrated by an example given below:

Example: A three phase induction motor has the following per-phase parameters referred to stator:Stator resistance 0.30 ΩRotor resistance 0.45 Ω

Stator and rotor leakage reactance 2.1 ΩMagnetizing reactance 30.00 Ω

Find out the parameters of an equivalent 2-phase induction motor if its per-phase turns are:(a) Same as that of the 3-phase induction motor.(b) 3/2 times that of the 3-phase induction motor.

(c) 2/3 times that of the 3-phase induction motor.

Solution. (a) Let ( )( )φω

φω−−=

−=0120cos

cos

tlitli

mb

ma

And ( )φω −−= 0240cos tli mc

Since per-phase turns in both 2-phase and 3-phase induction motors are the same, for equal m.m.f.s,

the magnitude of currents in the 2-phase motor must be 23

times the magnitude of currents in the 3-phase

motor. Thus from Eq. (4),

( )φω −== tlii maa cos23

23

From Eq. (3),

( )

( ) ([ ]( )[ ( )

( ) ( ) ]00

00

00

024sinsin240coscos

120sinsin120coscos23

240cos120cos2323

φωφω

φωφω

φωφω

β

−−−−

−+−=

−−−−−=

−=

tt

ttl

ttl

iii

m

m

cb

But 0120cos = ;2160cos 0 −=−

SA 5

( ) ( ) ( ) ( )

( )φω

φωφωφωφωβ

−=

−+−+−+−−=∴

−=−=−=

==

tl

ttttli

m

m

sin23

sin23cos

21sin

23cos

21

23

23240sin;

2160cos240cos

2360sin120sin

000

00

Further, let

( )( )0

0

240cos

120cos

cos

−=

−=

=

tVUtU

tVU

mc

b

ma

ωω

ω

andSince the per-phase turns in both the machines are equal and their rotating m.m.fs. have the same

magnitude, factor23

will not appear in the voltage transformations, i.e

and

[ ]

( ) ( )[ ]

[ ]

[ ] .sinsinsin33

1

sin23cos

21sin

23cos

21

31

240sinsin240coscos120sinsin120coscos3

1

240cos120cos3

13

1cos

0000

0

tVVtV

ttttV

ttttV

ttV

UUU

tVUU

mmm

m

m

om

cb

ma

ωω

ωωωω

ωωωω

ωω

ω

β

α

==

+++−=

−+=

−−−=

−=

==

For obtaining the phase voltage ,βU the factor3

1 is essential, because ( )cb UU − gives the

line voltage for a 3-phase system.From above, it is seen that

For a 3-phase motor,

==

IphasecurrentVphasevoltage

//

And for a 2-phase motor,

=

=

Iphasecurrent

Vphasevoltage

23/

/

SA 6

32

/23/

//

32

==

−−−−=

−−

iV

iV

currentphasepervoltagephasePercurrentphasepervoltagephasePer

parametersmotorinductionphaseparametersmotorinductionphaseNow

This shows that the parameters of the 2-phase induction moor are 32

times the corresponding

parameters of the 3-phase induction motor. In view of this, the parameters of the equivalent two-phaseinduction motor are:

Stator resistance = Ω= 20.030.032 x

Rotor resistance = Ω= 30.045.032 x

Stator and rotor leakage reactance

= ( ) eachΩ= 4.11.232

Magnetizing reactance = ( ) .00.203032 Ω=

(b)When per phase turns of the two-phase motor are 23

times that of the 3-phase motor, then it can

be shown that

==

−lcurrentphaseperVvoltagephaseper

motorphaseafor 3

=

=−

icurrentphaseper

Vvoltagephasepermotorphaseaforand 2

3,2

Thus the parameters of the equivalent 2-phase induction motor are 23

times the corresponding

parameters of the equivalent parameters of the 3-phase induction motor and their magnitudes are:

Stator resistance = Ω= 45.030.023 x

Rotor resistance = Ω= 675.045.023 x

Stator and rotor leakage reactance

= eachx Ω= 15.31.223

Magnetizing reactance = .00.4500.3023 Ω=x

(c)In this case it can be shown that per phase values of 3-phase induction motor, are V, I and the

corresponding per phase values of 2-phase induction motors are .23,

23 lV Since the ratio of per-phase

SA 7

voltage to per-phase current is the same in both the induction motors, the parameters of the equivalent 2-phase induction motor are the same as that of the 3-phase induction motor.

The transformation equations giving the new currents βα ii , in terms of cba iii ,, i.e. Eq.(6), can beexpressed in matrix form as follows:

(6)The transformation matrix,containing the constantcoefficients, in a singularone and thus cba iii ,, cant

be obtained from βα ii , ; since inverse of singular matrix does not exist. The matrix can be made square

matrix if there is a third equation of constraint between cba iandii , . Since the magnitude and direction of

the m.m.f. Produced by two and three-phase systems are identical, the third current in terms of cba iii ,,should not produce any resultant air-gap m.m.f. The only obvious choice is the zero sequence current

0i which, for convenience, is defined as:

( )cba iiii ++=3

10

Note that zero sequence current does not produce any rotating m.m.f. and here the factor

3

1is chosen

arbitrarily to suit the transformations.The three phase currents cba iii ,, are thus replaced by two-phase currents βα ii , plus zero

sequence current 0i according to the equations,

−+=

−−=

cb

cba

iii

iiii

23

230

32

21

21

32

β

α

and

++= cba iiii2

12

12

132

0

In matrix form (7)

The transformationmatrix now is non-singular and its inverse

can be easily obtained.

αi 1

21−

21− ai

βi32=

23

-23 bi

ci

αi1

-21

-21 ai

βi0

23

-23 bi

0i

32= α

21

21

21 ci

SA 8

Let [ ]32=A a b c

1

21−

21−

α

32 -

61

61

0

23

-23 β=

21

-2

1

21

21

21 0

31

31

31

Now =A32

++

+121

121

31

61

61

= .13

13

132

32 =

+

Co- factor matrix =

32 -

61

-6

1

21

-2

1

31

31

31

Inverse of matrix A is given by

[ ] [ ]matrixfactorfcotransposeoA

A −=− 11

32 -

61

-6

1

32= 2

1-

21

31

31

31

α β 0

SA 10

Or [ ] [ ]1−= AAt

Thus it is seen that if the transpose of the transformation matrix (here At) equals the inverse ofthe transformation matrix (A-1), the power is invariant or constant.

In the present case of transformation from three phases to two-phases, it is observed that

[ ] [ ]1−= AAt

and so the power invariance has been maintained.

Transformation from Rotating axes (αααα, ββββ, 0) to Stationary axes (d, q, 0):In the above Fig., three-phase and two-phase windings are shown on the rotor and for convenience, the axisof phase ‘α’ is taken to coincide with the axis of phase ‘A’ Since the two rotors rotate at the same angularvelocity and in the same direction, axis of phase a continues coinciding the axis of phase A. In other words,the rotating 2-phase axes α,β and the rotating 3-phase axes a, b, c ; moving in one direction at the sameangular speed, are at rest with respect to each other. Consequently, the transformation matrix relating the 3-phase and 2-phase variables has constant coefficients, as in Eqs. (7) and (8).

In the above Fig. the transformation from 3-phase rotating axes to 2-phase rotating axes means thetransformation from rotating reference frame a, b, c to rotating reference frame α,β,0. A reference frame is,quite simply, any fixed point that enables one to judge motion or change. In this article, the transformationfrom rotating axis to stationary axis means the transformation from rotating reference frame, α,β,0 tostationary reference frame d, q, 0.

When the transformation is carried out from rotating to stationary axes, the relative position ofrotating axes varies with respect to stationary or fixed axes. In view of this, the matrix giving the transformation from rotating to stationary axes or vice-versa must contain coefficients, which are functions ofthe relative position of the moving (α,β) and fixed (d, q) axes. The transformation from rotating tostationary axes results in replacing the moving coils by pseudo-stationary coils.

Zero sequence quantities are not transformed and thus the required transformation is only from α-β to d-q axes. The two windings α and β on the rotor are shown inside the circle in Fig.(c) given below. Asthe rotor moves, the α-β axes (i.e. α, β windings) also revolve along with it. By the revolving axes on therotor, it is meant that these axes are moving with respect to the stator. By stationary axes on the rotor, it isunderstood that these axes are fixed with respect to the stator, (pseudo-stationary coil-axes). In the presentcase, rotating and stationary axes refer to the rotor and are described with respect to the d-q-o axes.

Fα=Niα

θ

θ

α

β

iα

iβωrD

Q

id

iq

Fdd-axis

q-axis

Fα=Ni

FR

Fβ=Niβ

θθR

θ Fd=Nid

FRFq=Niq θR

Fig.(c) Fig.(d)

SA 11

In the above Fig. (c), angle θ is such that at atime t=0,θ=0. In other words, rotating axes α and β arealigned along d and q axes respectively at t = 0. At any time t, = ωrt, ωr is the angular velocity in radiansper second.

Phases α and β of the rotating angle θ with the stationary d-q axes windings and Fd, Fq for d, qwindings shown in above Fig. Assuming that the effective number of turns in α, β and d-q windings issame, m.m.fs Fα Fβ can be resolved along the d- and q-axes, giving the relationship,Fd = Fα cosθ + Fβ sinθor Nid = Niα cosθ + Niβ sinθid = iα cosθ + iβ sinθSimilarly,Iq = – iα sinθ + iβ cosθ

In matrix form, α β

θθθθ

cossinsincos

−=

qd

iqid

βα

ii

(14)

let C=θθθθ

cossinsincos

−

θθθθ

cossinsincos −

=∴ Ct

1sincos 22 =+= θθC

tCC =−

=∴ −

θθθθ

cossinsincos1

As C-1=Ct, the matrix is orthogonal and the voltage and current have identical transformations.

d q

q

d

ii

ii

θθθθ

βα

βα

cossinsincos −

=∴ (15)

Let the current in d-q axes windings be functions of time and be given by id = Imsin (ωt+φ) and iq = Imcos (ωt+φ)

Where φ is a constant arbitarary phase angle. The equivalent currents iα and iβ can now beobtained with the help of Eq. (15) where θ is taken equal to ωt.

iα = Imsin φand iβ= Imcos φThus time varying currents in stationary d-q coils results in m.m.f which is identical with the

m.m.f produced by constant (or d.c) currents in rotating α,β coils.

If coils α,β are stationary , d.c currents in them would set up stationary m.m.f . now if these coilsare to rotate at a certain constant speed their m.m.f will also rotate at the same speed and in also beproduced by stationary d-q coils ,carrying time varying currents.

If coils α and β are stationary, d.c. currents in them would set up stationary m.m.f. Now if thesecoils are made to rotate at a certain the rn.m.f. will also rotate at the same speed and in also be produced bystationary d-q coils, carrying time varying currents.

SA 12

In the above transformation from α-β to d-q axes, zero sequence current is not transformed. But ifit exits, it can be taken into account in matrix C, by an additional row an additional column, containing aunity as their common element. Thus,

α β o

ai D Cos θ Sin θαi

bi = Q

-sin θ Cos θβi

ci O 10i

…..(16)

the transformation from three phases a,b,c t two phases α,β,0 and from the two phases to stationary axesd,q,0 have been obtained. With the help of Eqs (16) and (7), the transformation follows, where Eq. (7) issubstituted in Eq (16).

a b c

ai D Cos θCos(θ- )

32π

Cos(θ- )3

4π ia

bi = 3/2 Q

-sin θ-sin(θ- )

32π

-sin(θ- )3

4π ib

ci O 2/1 2/1 2/1 ic

…..(17)Thus the new currents (or fictitious currents) id,iq, and i0 can be expressed in terms of actual

three phase currents ia,ib,ic, Eq.(17) or two phase currents iα,iβ,i0.Eq.(16).The equations of the inverse transformation giving the actual currents ia,ib,ic in terms of the

currents id,iq,i0 can be obtained by substituting Eq. (15) in Eq. (8). In order to include zero sequence current,an additional row and an column containing unity, has been added to the transformation matrix of Eq(15),as illustrated below.

d q 0

ai a Cos θ -sin θ 2/1 ia

bi = 3/2 b

Cos(θ- )3

2π-sin(θ- )

32π 2/1 ib

ci

CCos (θ- )

34π

-sin(θ- )3

4π 2/1 ic

…..(18)

From Eq.(17) and (18), it can be observed that inverse of transformation matrix=transpose oftransformation matrix.

So the axes voltages vd,vq,and v 0are related to the armature phase voltages of two or threephase systems by expressions of identical form. For example, for α-β to d-q transformation or vice versa,oltages can be substituted for currents in Eqs. (14) and (15). Similarly, voltages can replace currents in Eqs.(17) and (18).

In Eqs. (17) and (18), three phase variables ia,ib,ic or va,vb,vcare related to d-q variables id,iq orvd,vq. these two sets of relations in between the 3-phase variables and d-q variables are called park’stransformations.

SA 13

The stator may carry single phase,2-phase or 3-phase windings. The stator axes, a,b,c or α,βwill be stationary relative to the stator and its windings. The stator two phase axes α,β may coincide withd,q axes and thus there is no disparity between α,β and d,q axes in case of a star\tor. So if the stator carries:

(i)1-phase windings, it is taken along d-axis;(ii)2-phase windings, they are taken along d-q axes;(iii)3-phase windings, transformation has to be made from 3-phase axes to α,β or d-q axes;

through the coefficients of the transformation matrix will be constant.Simulink -Power System block in Matlab-simulink computes the direct axis, quadratic axis, and zero sequencequantities in a two- axis rotating reference frame for a three-phase sinusoidal signal.Reference

J. Arrilaga, CP Arnold , “Computer aided power systems analysis”Charles G. Cullen, Culten, “Matrices and Linear Transformations”Stephen Campbell and Carl D. Meyer. , “Generalized Inverses of Linear Transformations”

SG 1

Pulse Width Modulation TechniquesDr. Saly George

AP,EED,N.I.T Calicut

1. Introduction

An inverter is a circuit which converts a dc powerinto an ac power at desired output voltage andfrequency. This can be achieved by controlled turnon and turn off devices. The dc power input to theinverter may be battery, fuel cell, solar cells or otherdc sources. But in most industrial applications, it isfed by a rectifier. This configuration of ac to dcconverter and dc to ac converter is called a dc linkconverter. The output voltage waveforms of an idealinverter should be sinusoidal. But for practicalinverter, the voltage waveforms are nonsinusoidaland contains certain harmonics. Square wave andquasi square wave voltages may be acceptable forlow and medium power applications. For high powerapplication, low distributed sinusoidal waveforms arerequired.Inverters find application in

• Variable speed ac motor drives.• Induction heating• Aircraft power supplies• Uninterrupted power supplies• High voltage dc transmission lines• Static VAR generator (SVG) or

compensator (SVC)• Active harmonic filter (AHF)

2. Half –Bridge InvertersOne of the simplest possible inverter configuration isthe single-phase, half-bridge inverter shown in Fig. 1.

The circuit consists of a pair of devices TA+

and TA- connected in series across the dc supply, and

the load is connected between point A and the centre-point 0 of a split-capacitor power supply. Thedevices TA

+ and TA- are closed alternately for π angle

to generate the square-wave output voltage, as

shown. In fact, a short gap, or lock out time (td), ismaintained, to prevent in a short circuit or “shoot-through” fault due to turn-off switching delay. Theload is usually inductive, and assuming perfectfiltering, the sinusoidal load current will lag thefundamental voltage by angle ϕ, as shown. When thesupply voltage and load current are the same polarity,the mode is active, meaning the power is absorbed bythe load. On the other hand, when the voltage andcurrent are opposite polarity (indicated by diodeconduction), the power is fed back to the source.However, the average power will flow from thesource to the load. To maintain the center-point ofthe supply voltage Vd, the capacitors should be large.

3. Full, or H-Bridge, InverterTwo half bridges or phase-legs can be connected toconstruct a full, or H-bridge, inverter, as shown inFig. 2.

The split-capacitor power supply is not needed in thiscase, and the load is connected between the center-points, A and B. in the square-wave operation mode,the device pairs TA

+ , TB- and TB

+ , TA- are switched

alternately to generate the square wave outputvoltage of amplitude Vd. Again, assuming inductiveand harmonic-free load current at face angle ϕ, theload current in active mode will be carried by the TA

+

, TB- or TB

+ , TA- pair, whereas the feedback current

will flow through the DA+ , DB

- or DB+ , DA

--. Boththe diodes and IGBTs are designed to withstand thesupply voltage Vd with the current waves, it can beeasily seen that the peak current in the IGBT is Im,whereas that in the diode is Im sin ϕ.Because an inverter contains electronic switches, it ispossible to control the output voltage magnitude,frequency as well as to optimize the harmonics byperforming multiple switching with the inverter with

Fig.1. Half Bridge Inverter Configuration

Fig.2. Full Bridge Inverter Configuration

SG 2

a constant dc input voltage. In this context, PWMtechniques find application in inverters. PWMtechniques are classified as• Sinusoidal PWM (SPWM)• Selected Harmonic Elimination (SHE) PWM• Minimum ripple current PWM• Hysterisis band current control PWM• Sigma delta modulation• Space vector PWM (SVM)

4. Sinusoidal PWM Method4.1 Sinusoidal PWM with Bipolar VoltageSwitching Scheme

In order to have a sinusoidal output voltagewaveform, a sinusoidal control signal Vcontrol at thedesired inverter output frequency f1 is compared witha triangular carrier waveform to generate theswitching signals as in Fig. 3.. The frequency of thetriangular waveform establishes the inverterswitching frequency fs and is kept constant.

The amplitude modulation ratio tri

controla

VV

m ˆˆ

=

Where controlV is the peak amplitude of the control

signal and triV is the peak of the triangular carrierwave.

Frequency modulation ratio 1f

fm s

f = .

When Vcontrol > Vtri, −+BA TandT are kept on

and V0 = Vd.When Vcontrol < Vtri, −+

AB TandT are kept onand V0 = – Vd..The output voltage fluctuates between +Vd and -Vd..The harmonic spectrum of V0 is shown in Fig. 4.

The peak value of fundamental frequency componentof the output voltage.

da VmV =01ˆ .

Amplitude of the fundamental frequency componentof the output voltage varies linearty with ma providedma ≤ 1.0. Range of ma in 0 to 1 is referred to as thelinear range. The harmonics in the inverter outputvoltage waveform appear as sideboard containedaround the switching frequency and its multiples likemf, 2mf, 3mf and so on. mf should be an odd integer sothat the output voltage waveform has only oddharmonics. It is easier to filter out harmonics at highfrequencies. Hence, it is desirable to use highswitching frequency as possible which has thedrawback that the switching losses increaseproportionally. The border line between large andsmall values of mf is selected as 21

For small values of mf (mf ≤ 21), thetriangular waveform signal and the control signalshould be synchronized to each other. It is calledsynchronous PWM. It requires mf be an integer. Inasynchronous PWM, where mf is not an integer,subharmonics of the fundamental frequency areproduced which is not desirable. When mf is madelarge, subharmonics due to asynchronous PWM aresmall. Hence, at large values of mf, asynchronousPWM can be used.

For SPWM, ma < 1.0 corresponds to linearrange and the amplitude of the fundamentalfrequency voltage varies linearly with ma. But thedraw back is that the maximum available amplitudeof the fundamental frequency component is less.When ma is increased beyond 1.0, amplitude alsoincreases which results in overmodulation. Theoutput voltage waveform contain many moreharmonics in the side bands as compared with thelinear range as in Fig. 5. Normalised peak amplitudeof the fundamental frequency component dAo VV /ˆ

1 asa function of modulation ratio ma is shown in Fig. 6.

Fig.3. Bipolar SPWM scheme

Fig.4. Harmonic spectrum for Bipolar SPWM

SG 3

Harmonics that are dominant in the linear range maynot be dominant during overmodulation. Amplitudeof the fundamental frequency component does notvary linearly with ma . In UPS application overmodulation region is avoided to minimise thedistortion in the output voltage . In induction motordrives, over modulation is normally used. When mais sufficiently large, the inverter voltage waveformdegenerates from a PWM into a square waveform.

4.2 PWM with Unipolar Voltage Switching

Each inverter of the full bridge configuration iscontrolled separately by comparing the triangularwave Vtri with Vcontrol and –Vcontrol.WhenVcontrol > Vtri TA

+ on and VAN = VdVcontrol < Vtri TA

- on and VAN = 0.

For controlling leg B, -Vcontrol is compared with thetriangular waveform.When–Vcontrol > Vtri TB

+ on and VBN = Vd–Vcontrol < Vtri TB

- on and VBN = 0.

There are four combinations of switch on states andthe corresponding voltage levels.This scheme is called Unipolar voltage switchingscheme because the output voltage changes from zeroand +vd or between zero and –vd.

Devices in

the on state

VAN VBN V0

+AT , −

BT−

AT , +BT

+AT , +

BT−

AT , −BT

Vd

0

Vd

0

0

Vd

Vd

0

Vd

-Vd

0

0

Harmonic spectrum is shown below. The switchingfrequency is effectively doubled as far as the output

Fig.5. Harmonic spectrum for overmodulation inBipolar SPWM scheme

Fig.6. Variation of fundamental component ofoutput voltage with ma.

Fig.7. Unipolar SPWM Scheme

SG 4

harmonics are concerned. Hence harmonics appearat and side bands of mf, 2 mf , 3mf etc. Harmonicsdisappear at 2 mf , 4 mf ,, 6 mf etc and they occur atthe side bands of the above frequencies.

4.3 Effect of blanking time on output voltage inPWM inverters

When one switch of the inverter is in the on state, theturn on of the other switch in the same leg is delayedby a blanking time t∆ to avoid short circuiting. Thisblanking time is chosen as few microseconds for fastdevices like MOSFETs and larger for slower devices.The effect of blanking time on output voltage isshown in Fig. 9. A constant dc voltage Vcontrol iscompared with the triangular waveform Vtri whichdetermines the switching instants. During theblanking time both the switches in one leg are off andoutput voltage VAN depends on the direction of iA .VAN (actual) is shown in for both types of iA .

The difference isVε = VAN ideal – VAN actual.Average drop in output due to this is

Tst

VV dAN∆=∆ if iA > 0.

= Tst

Vd∆− if iA < 0.

Thus ∆VAN does not depend on the magnitude ofcurrent. But its polarity depends on the currentdirection. It is proportional to the blanking time t∆and the switching frequency fs (=1/Ts). At higherswitching frequencies, faster switching devices thatallow t∆ to be small should be used.Applying the same analysis for leg B,

iA = -iB.

.0>−

=∆ ∆Ad

sBN iV

Tt

V

.0∠∆Ad

siV

Tt

V0 = VAN - VBN, io = iA.

The instantaneous average value of the voltagedifference is the average value during Ts of theidealized waveform minus the actual waveform is

.02

02

0

0

0

<∆−

=

>∆

=

∆−∆=∆

iVdTs

t

iVdTst

VVV BNAN

A plot of the instantaneous average value V0 as afunction of Vcontrol is shown below with and withoutblanking time. For sinusoidal Vcontrol, theinstantaneous average output V0(t) for a load currenti0(t) is shown below. i0 (t) is assumed sinusoidaland lagging behind V0(t). The distortion in V0(t) atthe current zero crossings results in low orderharmonics such as third fifth, seventh and so on ofthe fundamental frequency in the inverter output.Similar distortion occur in the line to line voltages atthe output of a three phase PWM inverter where thelow order harmonics are of the order 6m ± 1 (m = 1,2, 3, …..) of the fundamental frequency.

Fig.8. Harmonic spectrum for unipolar SPWMScheme

Fig.10Fig.9. Effect of blanking time

SG 5

..

4.4 PWM in 3 phase voltage source InvertersTo generate the switching signals, same triangularvoltage waveform is compared with three sinusoidalcontrol voltages that are 120o out of phase.

The phase difference between the mf harmonic in VANand VBN is (120 x mf). this will be zero if mf is oddand multiple of 3. Thus, the harmonic at mf issuppressed in the line to line voltage VAB.Modulation ratio ma ≤ 1.0 is considered as the linearrange. The fundamental frequency component in theoutput voltage varies linearly with the amplitudemodulation ratio ma.

The voltage VAO varies between 22VdandVd −+ .

The peak value of the fundamental component in Vaois

.21

VdmV aao =∧

RMS value of 22

01Vdm

V aA =

RMS value of the line to line fundamental voltage is

dada Vm

Vm612.0

22

3≈

In overmodulation (ma >1.0), peak of the controlvoltages are allowed to exceed the peak of thetriangular wave. Here, fundamental frequencyvoltage does not increase proportionally with ma. Inthe following figure, rms value of the fundamentalline to line voltage is plotted as a function of ma. Forsufficiently large values of ma, the PWM waveformdegenerates into square waveform. This results inmaximum value of VLLI equal to 0.78 Vd. In the overmodulated region, more sideband harmonics appearcentred around the frequency of harmonics mf and itsmultiples. However, dominant harmonics may nothave as large as an amplitude as with ma ≤ 1.0.Therefore, the power loss in the load due to harmonicfrequencies may not be as high in the overmodulation region as the presence of the sidebandsharmonics would suggest.

Fig.11. Effect of blanking time on output voltage

Fig.12. Three phase inverter

Fig.13. Three phase inverter output voltage

Fig.12. Harmonic spectrum in three phaseinverter output voltage

SG 6

5. Selected Harmonic Elimination PWM(SHE PWM)

The undesirable lower order harmonics of a squarewave can be eliminated and the fundamental voltagecan be controlled as well by the SHE PWM method.In this method, notches are created on the squarewave at predetermined angles as shown in the Fig.15. Positive half cycle is shown with quarter wavesymmetry. Four notch angles α1, α2, α3 and α4 can becontrolled to eliminate three significant harmoniccomponents and control the fundamental voltage.

The general Fourier series of the wave is given as

twnbtwnatV nn

n sincos)(1

+= ∑∞

=.

For the waveform with quarter cycle symmetry, onlythe odd harmonics with sine components will bepresent. Hence

∑∞

==

1sin)(

nn twnbtV

where ∫=2/

0

.sin)(4 π

πdwtnwttVbn

Assuming that the wave has unit amplitude, that is,V(t)=1, bn can be written as

−++−+

+++

=

∫ ∫

∫∫3

2

2/

2

1

1

0

sin)1(.......sin)1(

sin)1(sin)1(4

α

α

π

α

α

α

α

π

k

n

dwtnwtdwtnwt

dwtnwtdwtnwtb

[ ])cos.....coscos(21421 knnn

nααα

π+−+−+=

.cos)1(214

1

−+= ∑

−

K

Kk

K nαπ

The equation contains K number of variables like α1,α2, α3 ………. αk . With K number of α angles, the

fundamental voltage can be controlled and (K – 1)harmonics can be eliminated. The SHE method canbe conveniently implemented with a microcomputerusing lookup table of notch angles.

6. Minimum Ripple Current PWM.

One disadvantage of the SHE PWM method is thatthe elimination of lower order harmonicsconsiderably boosts the next higher level ofharmonics. Since the harmonic loss in a machine isdictated by the rms ripple current, it is this parameterthat should be minimized instead of emphasizing thedimension of individual harmonics. RMS ripplecurrent is given by

Iripple = ......211

27

25 +++ III

= ......22

27

25 ++

∧∧ II

=

2

,...11,7,5

ˆ

21 ∑

∞

=

n

n

LnVω

Where,I5, I7, ….. rms harmonic currents.L effective leakage inductance of the machineper phase

∧∧75 , II peak value of harmonic currents

∧nV peak value of nth order harmonic

ω fundamental frequency.

∧nV depends on notch angles α. Thus, ripple current

can be obtained as a function of α angles. The αangles can be iterated in a computer program so as tominimize Iripple for a certain desired fundamentalmagnitude.

7. Hysterisis bard Current ControlPWM

High performance drives invariably require currentcontrol because, it influences the flux and developedtorque directly. Hysterisis band PWM is basically aninstantaneous feedback current control method ofPWM where the actual current continuously tracksthe command current within a hysterisis band. Fig.Explains the principle of hysterisis band PWM for ahalf bridge inverter. The control circuit generates thesine reference current wave of desired magnitude andfrequency. It is compared with the actual phasecurrent wave. When the current exceeds a prescribedhysterisis band, the upper switch in the half bridge isturned off and the lower switch is turned on. Theoutput voltages charges from +0.5 Vd to – 0.5 Vd andthe current starts to decay. As the current crosses thelower band limit, the lower switch is turned off andthe upper switch is turned on. A lock out time is

Fig.15. Selected Harmonic Elimination Scheme

SG 7

provided at each transition to prevent short circuit.The actual current in this forced to track the sinereference within the hysterisis band by back and forth(or bang-bang) switching of the upper and lowerswitches. The inverter then essentially becomes acurrent source with peak to peak current ripple,which is controlled within the hysterisis bandirrespective of Vd fluctuations.

When the upper switch is closed, positive slope of thecurrent is given as

L

tVVdtdi ecnd ωsin5.0 −

= .

Where 0.5 Vd is the applied voltage, Vcn sin ωct is theinstantaneous value of the opposing load counter emfand L is the effective load inductance.

When the lower switch is closed, negative slope ofthe current is given as

L

tVVdtdi ecnd ωsin5.0 −−

=

The peak to peak current ripple and switchingfrequency are related to the width of the hysterisisband. For example, a smaller band will increaseswitching frequency and lower the ripple. Anoptimum band that maintains a balance between theharmonic ripple and inverter switching loss isdesirable. The bandwidth HB is given as

21

2

RRR

VHB+

= .

Where V is the comparator supply voltage. Theconditions for switching the devices areUpper switch on: (i* - i) > HB.Lower switch on (i* - i) < HB.

For a three phase inverter, a similar control circuit isused in all phases.

8. Sigma-Delta Modulation

The principle of sigma delta modulation is given inFig.18. The modulator receives the concerned phasevoltage *

aoV at variable magnitude and frequency andit is compared with the actual discrete phase voltagepulses. The resulting error (delta operation) isintegrated (sigma operation) to generate the integralerror function e given as

∫ ∫−= .* dtVdtVe aoao

The polarity of the error function is detected by abipolar compensator. The positive polarity of eselects a positive voltage pulse whereas the polarityselects a negative pulse.

9. Space Vector Modulation (SVM)

SVM is based on the space vectorrepresentation of the voltages in the α, β, plane. Theyare capable of producing the highest availablefundamental output voltage with low harmonicdistortion of the output current and are well suited fordigital implementation. Because of its superiorperformance characteristics, if finds widespreadapplication in recent years. The SVM theory is basedon the concept of a rotating space vector. If a threephase sinusoidal and balanced voltages are applied toa three phase induction motor, it can be shown thatthe space vector V with magnitude Vm rotates in acircular orbit at angular velocity ω. The direction of

Fig.16. Hysterisis band control scheme

Fig.17. Hysterisis band control scheme

Fig.18. Sigma Delta Modulation scheme

SG 8

rotation depends on the phase sequence of thevoltages. The composite PWM fabrication at theinverter output should be such that the averagevoltages follow the sinusoidal three phase commandvoltages with a minimum amount of harmonicdistortion.

A 3 Φ bridge inverter shown in Fig. 12 has23=8 permissible switching states. Following tablegives a summary of the switching states and thecorresponding phase to neutral voltages.

The inverter has 6 active states (1 – 6) whenvoltage is impressed across the load and two zerostates (0 and 7) when the load terminals are shortedthrough lower devices or upper devices respectively.The vector V1 (100) indicates the space vector for

switching state 1 and has a magnitude of dV32 and

is aligned in the horizontal direction. In the sameway, all six active vectors and two zero vectors arederived and plotted. The active vectors are π/3 angleapart and describe a hexagon boundary shown dotted.Two zero vectors V0 (000) and V7 (111) are at theorigin. For three phase square wave operation of theinverter, the vector sequence is V1, V2, V3, V4, V5, V6with each dwelling for an angle of π/3 and there areno zero vectors.

The space vectors are to be controlled togenerate harmonically optimum PWM voltage wavesat the output.

9.1 Linear or Undermodulation Region

In undermodulation region, the inverter transfercharacteristics are linear. The command voltages arealways sinusoidal and they constitute a rotating spacevector *V as shown in Fig. 19 . As an example, ifV* is located as in Fig. 19, then the convenient wayto generate the PWM output is to use the adjacentvectors V1 and V2 of sector I on a part time basis tosatisfy the average output demand.

3sin

3sin παπ

aVV =

−∗

3sinsin πα bVV =∗

−= απ

3sin

32 *VVa

αsin3

2 *VVb = .

where Va and Vb are the components of V* aligned inthe directions of V1 and V2 respectively.Consider a time period Tc during which the averageoutput should match the command.

V* = Va + Vb

= ( )c

o

c

b

c

a

Tt

VorVTt

VTt

V 7021 ++ .

or

V*Tc = V1 ta + V2 tb + (V0 or V7) t0.Where

ca

a TVV

t1

= , cb

b TVV

t2

= , )(0 bac ttTt +−=

Inverter devices are kept in the on state according tospace vector V1 (100) for an internal ta and according

Fig.19. Space Vector Modulation scheme

Fig.20. Space Vector Modulation referencephase voltage

SG 9

to V2 (110) for an internal tb. Time to fills up theremaining gap for Tc with the zero or null vector.Symmetrical pulse pattern for two consecutive Tcinternals is shown below. Here, Ts = 2 Tc = 1/fs (fs= switching frequency).Null time has been conveniently distributed betweenV0 and V7 vectors to describe the symmetrical pulsewidths. Symmetrical pulse patterns gives minimaloutput harmonies.

In the under modulation region, the vector V* alwaysremains within the hexagon. The mode ends in theupper limit when V* describes the inscribed circle ofthe hexagon.

Modified modulation factor ISWV

Vm ˆˆ *

1 =

Where *V - Peak value of referencevoltage

ISWV - Peak of the fundamental

component of the square wave = π

dV2.

m1 varies from 0 to 1 at the squarewave output.

The maximum possible value of m1 at the end of theunder modulation region is obtained as follows.The radus of the inscribed circle is

.577.063

2*ddm VCosVV == π

Therefore, m1 for this condition is

.907.0

32577.0ˆ *

1 ===d

d

ISW

m

V

VVV

m

This means that 90.7% of the fundamental at thesquare wave is available in the linear region.Compared to 78.55% in the sinusoidal PWM.

References1. B K Bose, Modern Power Electronics and

AC Drives, Pearson Education, Inc, 2002.2. N.Mohan, T M Undeland and WP Robbins,

Power Electronics, John Wiley, 19953. Dorin o Neacsu “Space Vector Modulation

– An Introduction”, IECON’01, 27th annualConference of the IEEE IndustrialElectronics Society, 2001.

Fig.19. Symmetrical pulse pattern for SVM

AUGMENTATION OF TRANSMISSION –a review

S G MENONTata Consulting Engineers

Government Policy now encourages IndependentPower Producers & Large Scale Consumers(Steel, Refinery, Fertiliser, Cement Plants etc.) togenerate Power for captive consumption andfeeding surplus power into connected grid Thishelps in reducing burden on generation and T&Dallocation by Govt. But this requires systemdiscipline as the number and type of generatingagencies are higher

Steps in Expansion of T&D Systemi) System Planning -- budget allocation for last

decade is less than 30% that of Generationfor T&D as against optimal of 100%

ii) Review Options:a) New System or Strengthening/Upgrading existing system (Physicalchange)b) Enhancing power system capability

(System Management)

Transmission System System Planning Criteria

1 Load forecast –(5yrs Short Term,10yrs Med Term,

15yrs Long Term)2 Design redundancy (1st level)3 Regional self sufficiency(NREB,WREB,SREB,EREB, NREB) (Tie lines exclusively for emergencytransfer) (Apply FACTS devices).4 Voltage limits on EHV lines

(± 5% Normal, ±10% Emergency)5 Equipment specifications (Line,Transformer, CBs).6 Requirement of series capacitors. 7 Optimal line loading (thermal limits)if stability permits (Using FACTS devices) 8 System studies:• Anticipate system performance(under normal and emergency condition)• Performance of AVRs, Governors,Load shedding schemes, OLTC

9 Planning for network control andmanagement(for optimal usage ofsystem)

10 Reactive compensation (Voltageimprovement, through SVS)

a) Upgrading Existing T&D System-Developing a New System demands-

Higher initial cost. Long gestationperiod,Acquisition of land &Right of way

To overcome these issues,Strengthening & Upgradation is an

attractive option

OPTIONS• Change of conductor size (managing current)• Upgrade Voltage on same line (managing

current)• Use of multi-circuit tower (managing ROW)• Use of insulated cross-arm (managing

ROW/Clearances)• Reduced span for reduced sag (managing in

crowded area)• Clearances to the minimum as per rules• Use of lighter but electrically superior

conductors (AAAC)

b) Enhancing Power System Capability bymodern Technology-Flexible AC TransmissionSystemTypes of FACTS Devices:

• Static Var Compensator (SVC) – shunt connected Var generator for controlof capacitive/ inductive reactive power. Large numbers are inoperation• Static Synchronous Compensator(STATCOM) – Shunt connected GTO based convertor forcontrol of capacitive/ inductive reactive power.Several are in operation in Japan and one inthe USA• Thyristor Controlled SeriesCapacitor (TCSC)

– For enhancing transient stabilitylimit of the line

– Improved voltage regulation and reactivepower balance

SGM-1

– Improved load sharing between parallel lines

Other benefits: - Mitigation of SSR risks. Damping of active power oscillations.

- Dynamic power flow control. Significant no. of TCSC units are in

operation. Raipur Rourkela 400 kV line recent order for900 MVArUnified Power Flow Controller

(UPFC):- Provides independent control of active and

reactive power.- It is an ideal controller.- Limited Experience Case studyOne case study was conducted wherein it was

required to limit the flow of reactive powerfrom one area to other in an interconnectedsystem. It was found that it is possible to limitVAR flow within specified limits by use ofTCVR in the interconnected line.

It was also found that the combination of UPFCand TCVR installed at two different tiesbetween interconnected systems will havelimited control over distribution of activepower flow and reactive power flow betweentwo systems.

• Use of HVDC light to isolate systems e.g Largeindustrial Generation• installing a 500 MW unit ( large size) in 3000MW system (contingency of loss of biggest unit,using suitably designed-and-positioned FACTSdevice)

Captive generators are small compared to theGrid. Hence, it requires special care to protectthese generators, in case of grid disturbances.Isolation from Grid disturbances could also bedone by FACTS or HVDC. Currently Islandingis one technique used.

The collapse of captive generation during griddisturbances should be avoidedHence, islanding schemes must beincorporated in the systemAfter islanding, if there is excess loadcompared to captive generation availability, loadshedding has to be initiated to save captivesystem

Developement of FACTSPower electronic controllers form the basis of aFlexible AC Transmission System (FACTS),

which has been under development for nearlytwenty years and is now entering its thirdgeneration.

• The first generation of FACTS devices usedpower electronics to control large transmissioncircuit elements, such as capacitor banks, tomake them more responsive to changing systemconditions.

• Second generation FACTS devices were able toperform their functions, such as providingvoltage support to a long transmission line,without the need for large, expensive externalcircuit elements. Both first and secondgeneration FACTS controllers are currentlyoperating on utility transmission networks.

-Third generation FACTS called the UnifiedPower Flow Controller (UPFC). The UPFC has aunique ability to control simultaneously all threeparameters (voltage, phase angle, andimpedance) that govern power flow overtransmission lines. The first installation of aUPFC has been completed at a substation of theAmerican Electric Power Company (AEP),where it will increase power flow into a region ofrapid demand growth while also providingvoltage support for a neighboring industrialregion.

Limitations of FACTS

Stability issues can be managed moreeconomically at the generator end with advancedstabilizer controls as stabilizer components needonly handle a fraction of the power they actuallycontrol - the generator is like a big amplifier withthe signal conditioning being done at relativelylow power levels. By comparison, FACTStechnologies must handle the full power beingcontrolled. However FACTS device can be deployed andjustified on the basis of other functions and toprovide other benefits, such as controlling powerflow in a corridor.FACTS would have to be critically checked on acase by case basis as our circuits are notunderutilised. Actually our main problem isthermal limits on circuits.

Case Study will be presented and discussed indetail SGM -2

HVDC AND FACTS

P. PreethaLecturer

EED, NITC

Introduction.

The industrial growth of a nation requiresincreased consumption of energy, particularlyelectrical energy. This has lead to increase in thegeneration and transmission facilities to meet theincreasing demand. Remote generation and systeminterconnections lead to a search for efficientpower transmission at increasing power levels.The problems of AC transmissions particularly inlong distance transmission have led to thedevelopment of DC transmission. However asgeneration and utilization of power remain atalternating current, the DC transmission requiresconversion at two ends from AC to DC at thesending end and back to AC at the receiving end.This conversion is done at converter stations-rectifier station at the sending end and inverterstation at the receiving end. The converters arestatic- using high power thyristors connected inseries to give the required voltage ratings. Thephysical process of conversion is so that the samestation can switch from rectifier to inverter bysimple control action, thus facilitating powerreversal.With the developments of modern systems, itbecomes more and more important to control thepower flow along the transmission corridor. Theevolutionary process in the 1970s by introducingpower electronics based control for reactive powerand high voltage direct current (HVDC)transmission has been greatly accelerated. Manycountries in Asian region are expanding theirelectric power systems by augmentation orconstruction of new high voltage (HV) or Extrahigh voltage (EHV) power transmission systems,interconnection of power systems within thecountry and across country borders via HVDC orEHV lines with flexible alternating currenttransmission systems (FACTS) controllers.At present, most high voltage transmission linesare operating below thermal ratings due toconstraints such as voltage and transient stabilitylimits. Power electronics based technology(HVDC & FACTS) can enhance transmissionsystem control and increase line loading in somecases all the way to thermal limits withoutcompromising reliability. Based on these

capabilities, operational bottlenecks can beeliminated, line capacity can be increased, andreliability can be improved. These capabilitiesallow transmission systems owners and operatorsto maximize asset utilization and executeadditional bulk power transfers, with immediatebottom-line benefits. Moreover, FACTScontrollers can also enable utilities to avoid orminimize the time consuming, source-intensiveprocess of constructing new transmission facilitiesand instead concentrate on maximizingprofitability of existing facilities as the market fortransmission service expands.

Comparison of AC and DC transmission:The relative’s merits of two modes oftransmission, which need to be considered by asystem planner, are based on the following factors.

• Economics of transmission• Technical performance• Reliability

Economics of power transmission:The cost of a transmission lines includes theinvestment and operational cost. The investmentincludes costs of Right of Way, Transmissiontowers, conductors, insulators and terminalEquipment. The operational cost includes mainlythe cost of losses.Investment costs: Assuming same insulatedcharacteristics for AC and DC and based on peakvoltage: DC line (2 conductors+/- polarity w.r.tground) can carry as much current as AC (3conductors of same size). For a given power level,DC line requires less RoW, simpler and cheapertowers and reduced conductor and insulator cost.The terminal equipments (converters/ filter) arecostly and the break-even distance can vary from500 to 800 Km in overhead lines. Figure (1) showsthe variation of costs of transmission with distancefor AC and DC transmission.

PP-1

Operational Cost: The corona effects tend to beless significant on DC conductors than for AC.

Technical Performance:• DC: Power flow is controlled

(modulation for stability enhancement, faultcurrent limiting in DC lines is also possible)

• Ground return possibility in DC dueto relatively low ground impedance for extendedperiods. Buried metallic structures may poseproblems due to corrosion

• Transformation of voltage level forutilization is not possible without converterstation.

• When two power systems areconnected through AC ties (synchronousinterconnection) the automatic generation controlof Both systems have to be coordinated using tieline power and frequency signals. Even withcoordinated controls the operation of AC ties canbe problematic due to (i) The presence of largepower oscillation, which can lead to frequenttripping (ii) Increase in fault level (iii)Transmission of disturbances from one system tothe other. The controllability of power flow in DClines eliminates all the above problems

• When the frequency of the twosystems is different the interconnection requiresthe use of DC links.

Technical Aspects: Long distance ACtransmissionThe power transfer in AC lines is dependent on theangle difference between the voltage phases at thetwo ends, for a given power level this angleincreases with distance. The maximum powertransfer is limited by the consideration of steadystate and transient stability. The power carryingcapability of AC/DC lines as a function of distanceis shown in Figure (2).

DC Line

P

SIL AC Line

distance

Figure 2 Power transfer capability vs distance

The line charging complicates the voltage controlin AC lines and inductive voltage drops. Thevoltage profile in an AC line is relatively flat onlyfor a fixed level of power transfer corresponding tosurge impedance loading. (SIL). The voltageprofile varies with the line loading. Reactivepower generated or absorbed depends on deviationfrom SIL. Therefore reactive power compensationis necessary at various points and loading cannotdeviate much from SIL If voltage at both end ismaintained at 1, the voltage tend to sag as wemove towards the mid point if Ps > SIL. The lineabsorbs reactive power. If Ps is < SIL voltageswells and the line generates reactive power. AClines require shunt and series compensation in longdistance transmission, mainly to overcome theproblems of line charging and stability limitations.Series capacitors and shunt inductors are used forthis purpose.Although DC converter stations requires reactivepower related to the line loadings the line itselfdoes not require reactive power. HVDC find use inthe following situations

• Long distance bulk powertransmission

• Asynchronous Ties• Underwater cable transmission

Reliability

The reliability of DC transmission system is quitegood and comparable to that of AC systems. Thebipolar DC line can be as reliable as a doublecircuit AC line with the same power capability.This is because of the fact that the failure of onepole does not affect the operation of the other pole(with ground return).Types of HVDC systemsTwo terminal (with DC transmission line, onerectifier terminal + one inverter terminal) Back-to-Back (two terminal with no DC line – used forasynchronous tie) Multi-terminal (with DC lines

Distance

AC

DC

Cost

aa-break even distanceFig.1 Variation of cost with line length

PP-2

and several rectifier and/or inverter terminalsconnected to more than 2 nodes of the ACnetwork).

Types of links

The DC links are classified into three types:• Mono polar link (figure 3.1) has

one conductor usually of negative polarity anduses ground or sea return.

I

Fig 3.1 monopolar link

• Bipolar link (figure 3.2) has twoconductors, one positive and other negative. Eachmay be a double conductor in EHV lines. Eachterminal has two sets of converter of identicalratings, in series on the DC side. The junctionbetween the two sets of converters is grounded atone or both ends.

I

• Homopolar link (figure3.3) hastwo or more conductors all having the samepolarity, usually negative and always operatedwith ground or metallic return.

I

2I

I

Fig 3.3 Homopolar link

Components of HVDC Transmission Systems

The major components of HVDC transmissionsystems are converter stations. A typical converterstation with two 12-pulse converter units per poleis shown in figure 4. The various components of aconverter station are converter unit, convertertransformer,filter, reactive power source, smoothing reactorand DC switchgear.

Converter Unit: this usually consists of two three-phase converter bridges connected in series toform a 12-pulse converter unit as shown in figure5. The total number of valves in such a unit are 12.The converter is fed by converter transformerconnected in star –star and star-delta arrangements.

DCTerminal

ACBus

Fig 5. A 12 pulse converter unit

Fig 3.2 Bipolar link

Pole 1

Fig 4 Schematic diagram of a typicalHVDC converter station

Tuned AC Filters

DCFilters

Pole 2

Transformer

Smoothing reactor

12 Pulseconverter

PP-3

Filters: There are three types of filters used.• AC filters: These are passive

circuits used to provide low impedance, shuntpaths for AC harmonic currents.

• DC Filters: These are similar toAC filter and are used for the filtering of DCharmonics.

• High frequency filters: Theseare connected between the converter transformerand the station AC bus to suppress any highfrequency currents.Reactive Power Source: Converter stationrequires reactive power supply that is dependenton the active power loading apart of this reactivepower requirement is provided by the AC filter inaddition shunt capacitors, synchronous condensers,SVC and STATCOM are used depending on thespeed of control desired.

Smoothing Reactor: Sufficiently large seriesreactor is used on DC side to smooth DC current.

HVDC and FACTS

HVDC systems are very useful for transmittingenergy between two asynchronous AC powersystems with high controllability. ConventionalHVDC transmission systems based on thyristorconverters have been widely applied whereflexibility and stability improvements are required.However, thyristor based HVDC systems needhigh support of local reactive power generation.Moreover the active and reactive power cannot becontrolled independently from each other. NewHVDC system based on DC voltage links has beenconsidered feasible. Since they are based on forcecommutated converters (also known as voltagesource converters VSC) they can provideindependent control of active (real) and reactive(imaginary) power or even supply fully passive acloads.

The STATCOM is advanced power electronicequipment for reactive power compensation. It is avery fast acting, electronic equivalent of thesynchronous condenser. It is considered as aflexible AC transmission systems controller(FACTS). The STATCOM is a shunt compensator.It can draw variable reactive current from thesystem to control the voltage magnitude of aselected bus (controlled AC bus). Thus HVDCtransmission system based on VSC technology isan interesting alternative to conventional thyristorbased HVDC system in the fields of

• Interconnecting week or isolatedAC systems

• Interconnecting AC systems inthe lower and middle power range

• Connecting remote isolatedloads like offshore oil and gas platforms.

• Multi terminal HVDC systemsOngoing development in the sector of power semiconductors for high power applications is expectedto widen the range of commercial applications inthe near future.

REFERENCES• K.R Padiyar, HVDC Power

Transmission systems: Technology and systemInteractions, Wiley Eastern Ltd., New Delhi, 1990.

• High voltage Direct Currenttransmission systems Technology Review Paperby Roberto Rudervall , Raghuveer Sharma.

• HVDC Transmission Systemsusing Voltage Sourced Converters- Design andApplication by F.Schettler, H Huang and NChristl.

• FACTS Option Permits TheUtilisation of The Full Thermal Capacity of ACTransmission By D N Ewart, R J Koessler

• Flexible AC TransmissionControllers By Gautam Bajracharya

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SINGLE-PHASE SHUNT ACTIVE POWER FILTER

Suresh Kuamr.K.SAsst. Professor,Dept. of Elect. Engg.

N.I.T ,Calicut1. Introduction

The increasing use of power electronics-based loads (adjustable speed drives, switch modepower supplies, etc.) to improve system efficiency and controllability is increasing the concern for harmonicdistortion levels in end use facilities and on the overall power system. The application of passive tuned filterscreates new system resonances which are dependent on specific system conditions. In addition, passive filtersoften need to be significantly overrated to account for possible harmonic absorption from the power system.Passive filter ratings must be co-ordinated with reactive power requirements of the loads and it is often difficultto design the filters to avoid leading power factor operation for some load conditions. Active filters have theadvantage of being able to compensate for harmonics without fundamental frequency reactive power concerns.This means that the rating of the active power can be less than a comparable passive filter for the same non-linear load and the active filter will not introduce system resonances that can move a harmonic problem from onefrequency to another.

The active filter concept uses power electronics to produce harmonic current components thatcancel the harmonic current components from the non-linear loads. The active filter uses power electronicswitching to generate harmonic currents that cancel the harmonic currents from a non-linear load. The activefilter configuration investigated in this lecture is based on a pulse-width modulated (PWM) voltage sourceinverter that interfaces to the system through a system interface filter as shown in Figure 1. In this configuration,the filter is connected in parallel with the load being compensated. Therefore, the configuration is often referredto as an active parallel or shunt filter. Figure 1 illustrates the concept of the harmonic current cancellation so thatthe current being supplied from the source is sinusoidal. The voltage source inverter used in the active filtermakes the harmonic control possible. Thisinverter uses dc capacitors as the supplyand can switch at a high frequency togenerate a signal that will cancel theharmonics from the non-linear load.

The active filter does notneed to provide any real power to cancelharmonic currents from the load. Theharmonic currents to be cancelled show upas reactive power. Reduction in theharmonic voltage distortion occursbecause the harmonic currents flowingthrough the source impedance are reduced.Therefore, the dc capacitors and the filtercomponents must be rated based on thereactive power associated with theharmonics to be cancelled and on theactual current waveform (rms and peakcurrent magnitude) that must be generatedto achieve the cancellation.

The current waveform for cancelling harmonics is achieved with the voltage source inverter inthe current controlled mode and an interfacing filter. The filter provides smoothing and isolation for highfrequency components. The desired current waveform is obtained by accurately controlling the switching of theinsulated gate bipolar transistors (IGBTs) in the inverter. Control of the current waveshape is limited by theswitching frequency of the inverter and by the available driving voltage across the interfacing inductance.

The driving voltage across the interfacing inductance determines the maximum di/dt that canbe achieved by the filter. This is important because relatively high values of di/dt may be needed to cancel higherorder harmonic components. Therefore, there is a trade-off involved in sizing the interface inductor. A largerinductor is better for isolation from the power system and protection from transient disturbances. However, thelarger inductor limits the ability of the active filter to cancel higher order harmonics.

The Inverter (three-phase unit or single-phase unit as the case may be) in the Shunt ActivePower Filter is a bilateral converter and it is controlled in the Current Regulated mode i.e. the switching of theInverter is done in such a way that it delivers a current which is equal to the set value of current in the currentcontrol loop. This mode of operation of a PWM-VSI has been covered in detail in an earlier lecture. Thus thebasic principle of Shunt Active Power Filter is that it generates a current equal and opposite in polarity to the

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harmonic current drawn by the load and injects it to the point of coupling thereby forcing the source current to bepure sinusoidal. This type of Shunt Active Power Filter is called the Current Injection Type APF.

2. A Single Phase Current Injection Type Active Power Filter

Single-Phase topology is assumed for purposes of explanation for the sake of simplicity.Whatever is covered here will be equally applicable for three-phase systems also with minor modifications. Asimplified diagram of a single-phase APF is given in Fig.2 below.

The control system maintains the average voltage across the capacitor constant againstvariations in line and filtering load on the APF.The Inverter is gated in such a way that the current IL follows areference current waveform set by the concerned control system. The voltage required at the terminals of Inverteroutput will be automatically made suitable for maintaining the required current in the Lf line,i.e. the Inverter iscontrolled in the 'current regulated' mode. The current delivered by the source Is = Io - IL and it is desired that thiscurrent be a pure sinusoidal wave even when the load draws a highly distorted current wave. This isaccomplished by making IL equal to the harmonic current required by the load. Thus,there has to be a harmoniccurrent calculator which will calculate the harmonic current to be generated by the Inverter in order to maintainthe source current harmonic free. Under a loss free situation, the Inverter does not need to draw any activepower. However,there will be losses in the resistances of inductor,switches etc. and switching losses when theInverter is generating current. Unless these losses are compensated , the capacitor voltage will come downsteadily. Hence the control of capacitor voltage involves drawing an in phase sinusoidal component of currentfrom the source along with the required harmonic currents, i.e. the reference current for IL should contain anappropriate amount of 1800 component to maintain the D.C voltage across the capacitor.

It is indeed possible to make the Inverter deliver the reactive current demanded by the loadalong with its harmonic current requirement by providing suitable reference. In that case APF becomes an SVC -cum-APF or an APF-cum-SVC.In fact,it should by now be clear that, whether it does reactive compensation ornot, the operation and control of this APF is almost the same as that of the SVC with Current Regulated Control.The basic principles involved are the same. But, usually in an SVC harmonic filtering is not attempted alongwith Fundamental frequency VAr compensation since the range of switching frequencies needed for APF actionis much higher than the frequency needed for SVC action. The kVAr rating of SVC for a load will be muchhigher than the kVA rating needed for an APF.Hence it is better to use a small kVA rated Inverter with highswitching frequency(thereby demanding IGBTs/MOSFETs) for the APF function and a high power Inverter withlow switching frequency for ( thereby permitting the use of thyristors and GTOs) for SVC action. In fact , if thetwo jobs are separated this way,it is possible to run the SVC at a still lower frequency with the APF helping tocancel the harmonics generated by the low frequency switching of SVC partially. Such systems have been madeat subtransmission level. Notwithstanding the above, the continuous improvement in the voltage and currentratings of IGBTs and MOSFET power modules has made it possible to combine both SVC and APF functions inthe same Inverter at distribution levels(i.e. at 440V,1.1kV,3.3kV,6.6kV and 11kV levels).

The control of a single-phase APF using hysterisis current control is given in Fig.3.The D.Cvoltage across the capacitor is sensed,compared with reference and the error is processed in a PI controller. Thiserror multiplies a fixed amplitude sine wave which is pure and is in 1800 phase with the source. The productforms one component of the current reference of the Inverter.The harmonic current calculator receives the loadcurrent signal from the CT in the load line and a pure sine wave template from the control system and calculatesthe harmonic current component in the load in real time. The output of this calculator forms the second

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component of reference current. These two components are added together and given as current reference into ahysterisis current controller.

3. Current Control Schemes Suitable for APF

The block diagram above assumed hysteresis current control and hysteresis current control isindeed suitable if only low order harmonics (like 3rd ,5th,7th etc.) need be compensated. However,if harmonicsupto 25th or so are to be cancelled ,hysteresis control will require excessively high switching frequency. Inaddition, the variation in switching frequency which is basic to hysteresis control makes it difficult to choosefilter components. Hence constant switching frequency,unipolar switching schemes are preferred forimplementing current control of Inverter in APF application as a rule.

In one constant switching frequency current control scheme,the filter inductor current is sensedand compared directly with the reference current to form the current error. This error is amplified and used as themodulating signal in the unipolar pulse width modulator which controls the gating of switches. This schemesuffers from some disadvantages. First,the current sensed will have switching ripple in it and it will have to befiltered before getting into the high gain error amplifier. This filtering introduces a time delay. Already thesystem is of second order due to the Lf and Cf .This second order dynamics has sharp phase angle variation nearits resonance frequency due to its underdamped nature. In addition, the phase delay contributed by it dependsstrongly on the operating condition. Now if a high gain stage with a first order filter is put in the feedback path ,the system easily becomes unstable. Even if it is stable, its transient response will not be satisfactory. This willcall for reduction of gain in the error amplifier which will affect the ability of the APF to track the referencecurrent adversely. If a high gain has to be used then a high switching frequency becomes mandatory.Secondly,the current that is being sensed is current in a switching system and will be corrupted by the inevitablehigh frequency switching noise. The control loop usually gets thoroughly upset with this noisy feedback.

These limitations of feedback control scheme provided the motivation for the development of afeed-forward control scheme for the control of current in the Inverters.The principle of this scheme follows.

Assuming the control is successful,the current that will flow through Lf is known apriori and itis equal to the reference current. Then,if the IL value is known before hand ,the voltage that the Inverter shouldgenerate in order to make this current flow can be calculated and the calculation result(a voltage signal) can begiven as the modulating signal for the unipolar PWM generator. The voltage that the Inverter should generate isgiven below by applying K.V.L.

Vinv = Vac + RIref + Lf (dIref /dt) where Iref is the current commanded by the control system,R isthe equivalent loss resistance(includes winding resistance,switch power loss etc.) , Lf is the filter inductance and

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Vac is the source voltage. A simple Opamp circuit can implement the above equation by accepting a steppeddown version of source voltage and the reference current signal as the inputs .The output of the circuit is given tothe unipolar PWM circuit after suitable scaling. Then the Inverter generates the right voltage and hence thecurrent in Lf will have to be Iref.

However, this requires the knowledge of accurate values of R and Lf.The value of R isoperating point dependent (through switch power losses) and can not be known accurately. If these values areprecisely known the current control would have been 'free of dynamics' i.e.,the bandwidth of current control loopwould have been infinite. But there are inaccuracies in the estimation of the parameters and inaccuracies in themeasurement of Vac.Also the differentiator operation has to be band limited in practise due to the well knownsensitivity of differentiator to noise and high frequency signals. These imperfections make the current controllogic deviate from the ideal and a small amount of actual current feedback will be needed along with the othercomponents to correct the minor deviations. However, now the role of current feedback is only to correct secondorder effects and hence can be of low gain. Moreover, for the same reason no filtering is needed in the feedbackpath. With this term added ,the Inverter voltage control equation becomes:

Vinv = Vac + RIref + Lf (dIref /dt) +K ( Iref - IL ) where K is the feedback gain and is usually verysmall. This scheme is capable of rise time of 50µs -250 µs and yields a high bandwidth current control loopwhich is highly desirable in APF since APF is expected to track up to 25th harmonic and more.

K is the feedback gain,Kpwm is the gain of Inverter and Z0(s) is the equivalent load impedanceconnected at the a.c source point.

4. The D.C Voltage Control Loop

The D.C voltage control loop in APF is similar to the D.C control loop of Active LineConditioners or PWM Rectifiers , Static VAr Compensators etc, and similar considerations apply.

The instantaneous power input into the inverter (due to harmonic currents, fundamental activecurrent needed to supply the inverter losses and fundamental reactive power if static Var compensation is alsobeing performed) from mains will get balanced by (i) the dissipation in the inverter and capacitor (ii) the rate ofchange of stored energy in the inverter passive filter reactive elements and (iii) rate of change of stored energy inthe DC Side Capacitor. The inverter losses and the power that goes into changing the energy storage in the smallfilter elements may be ignored in a first order qualitative analysis and we may say that to a good approximationthe instantaneous power that goes into the inverter reaches the DC Side capacitor. Fundamental current flow(which will be a small active component if no shunt Var compensation is being done) will result in secondharmonic pulsations in the inverter input power and this should lead to second harmonic voltage componentsappearing across DC side capacitor. Harmonic current flow into inverter similarly will give rise to higherharmonic voltage ripples in the DC Side Capacitor.The second harmonic ripple in voltage across the DC Sidecapacitor can cause some difficulty in the DC voltage control loop.The problem becomes significant if theinverter is doing VAr control as well as harmonic control.

K

R/KsKpwm

(Lf/KsKpwm)d/dt

Kpwm

R

Ks1/sLf

Zo(s)1/Kpwm

+

+

+ + +

Iref+

+ +

- -

-

+

+

+

IL

Fig.4 Feedforward Current Control Scheme

+

+

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When the DC Side voltage is sensed , compared with a set reference and the error is amplifiedthe second harmonic (and higher harmonics in capacitor voltage) get amplified and appear at the output of theerror amplifier.The second harmonic at the error amplifier output results in a third harmonic componentappearing in the reference current and this will lead to injection of third harmonic current in the line.The DCSide voltage will have to be filtered to remove the second harmonic to prevent this.This filtering will invariablyslow down the DC voltage control loop which in turn will call for a higher value of DC side capacitance.

However, since the 50 Hz current in the Inverter line of an APF is small ,the DC side capacitorwill not have much second harmonic ripple and hence not much filtering is required on this voltage before it getsinto the control loop if the APF will never be required to do static VAr compensation too. By the same reason,the D.C loop control can be faster in APF compared to APLC,SVC or Switched Mode Rectifier.

5. The Harmonic Current Calculator

This is the most important component in the control system. It accepts the load current andsinusoidal templates from the PLL-Sine wave generator and returns the value of harmonic content of the loadcurrent for further control purposes. The D.C side capacitor should not be asked to supply even a fraction of theactive power required by the load since it will run down rapidly if that happens. Hence, the Calculator mustensure that neither under steady state nor under load transient conditions the calculated current will contain anactive fundamental component. However, it is not possible to ensure this under transient conditions strictly. Thenthe Calculator must reduce the active component to zero as fast as possible. Any delay on the part of thisCalculator in removing the active power component in its output will be translated as higher and higher value forthe D.C side capacitor especially considering the unavoidable filtering in the DC voltage control loop.

The method for extracting the reactive fundamental component contained in a sinusoidalcurrent is based on extraction of orthogonal fundamental frequency components from the waveform. The sensedload current is multiplied with unit amplitude sine and cosine waves (produced by PLL + EPROM method). Theproducts are integrated over one half cycle. The value of integrated outputs are sampled and held at the end ofthe half cycle period and after sampling the integrators are reset briefly to start the next cycle of integration. Thesampled outputs will be the amplitude of active and reactive component respectively. The unit sine and cosinetemplates are multiplied by these amplitudes to re-create the active and reactive fundamental components andtheir sum is subtracted from the total load current. The result will be the instantaneous harmonic content in theload current and this is sent to the output. Obviously, the maximum delay in the calculation is one half-cycletime.This method of harmonic component calculation is insensitive to the presence of harmonics in supplyvoltage.If the both the supply voltage and load current contain harmonics it is possible that some active powertransfer is taking place through harmonics.Then these active power components will be missed out by thiscalculator ; but then the voltage control loop will handle this. However this method is sensitive to supplyfrequency and component tolerances and can result in wrong estimates of harmonic components if frequencyvaries over a wide range.

If the products ofload current and unit sine/cosinetemplates are passed through low passfilters of cutoff around 10Hz (to avoid100Hz components in the products)we can get the active and reactivefundamental components of the loadcurrent. Subtracting these componentsfrom the total will lead us to theharmonic content. And in order tomake the circuit rugged againstparameter inaccuracies and variationsthe following closed loop system hasbeen suggested.(See “A SimpleFrequency Independent Method forCalculating the Reactive andHarmonic Current in a NonlinearLoad” , J.Sebastian Tepper et.al, IEEETrans. On Industrial Electronics, Vol43, No 6, Dec 1996, pp 647-654)

The low pass filterin this scheme has to be of very lowbandwidth , otherwise the secondharmonic that comes through will

manifest as third harmonic in the line current.But then a low bandwidth in the LPF will make the circuit very

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slow and when a sudden load change takes place all the load current will come through in name of “harmonics”because of delayed response of LPF.This will lead to inverter trying to support the load active power for too long- the result is too heavy a value for the DC Side Capacitor.

The two methods of harmonic extraction described above were compared by PSpice Simulation.The outputswhen a 1Volt amplitude 50 Hz pure sine wave was applied are shown below.The differences are clear.

6. Simulation of a Single Phase Active Power Filter

The Design Lab Simulation diagram for the simulation of a 0.5kVA Active Power Filter ofCurrent Injection type is given below.

The APF simulated uses a 230V,50Hz,500VA Single Phase Full Bridge Inverter usingIRFP450 MOSFETs as the power converter. An inductance of 1mH and a shunt connected capacitance of 2 uFcarry out the filtering of inverter output to remove the switching frequency components. The output of theinverter is tied to the a.c supply and a non-linear load is supplied from the point of common coupling. The

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Inverter uses unipolar PWM using triangular carrier of 20kHz.The inverter works in the current regulated modeusing feed forward method of current control.

There are two ‘time dimensions’ involved in simulating a power electronic system of this kindin Pspice. One is the period of switching in the inverter and the other is the characteristic time constants involvedin the rest of the control loops. These time constants could be in 10’s or 100’s of milliseconds. Simulating theswitching behaviour of an inverter in PSpice will require very small time steps due to the switching transients inMOSFETs and IGBTs taking place in the nano second time range. Such a simulation long enough to cover atleast one full cycle of 50 Hz output in the case of a unipolar modulated inverter using 20kHz triangle carrier willtake 10’s of minutes for completion. And long duration simulations at small time steps will usually encounterconvergence problems in Pspice. The outer control loop dynamics on the otherhand proceeds slowly compared tothe switching frequency. Thus simulation over many a.c cycles will be needed to catch dynamics of interest insystems of the type described here. Obviously one cannot retain all the details of the inverter and simulate formany a.c cycles.

The solution to this problem of excessively large simulation time and frequent convergenceproblem lies in decoupling the two ‘time dimensions’. Two separate simulation models are to be derived for this.In the first the inverter along with its gating control logic alone will be simulated with time step suitable for theswitching frequency. The simulation schematic will be same as the circuit diagram of the inverter with allcomponents and details. The simulation will be carried out for one or two cycles of a.c for different loading onthe inverter. The loading is arranged to represent the actual loading on the inverter when the inverter becomespart of APF. The aim of this separate simulation of inverter in a stand alone mode is two fold. Primarily, the aimis to verify the operation of electronic circuits and drivers (pulse transformer based , opto based as the case maybe) used in gating logic and to verify various critical issues like sufficiency of dead time designed into gatinglogic etc. Secondly stand alone simulation of inverter is used to estimate the total losses taking place in theinverter under various load conditions. Based on the loss data the equivalent loss resistance of the inverter can beworked out. This value of equivalent inverter loss resistance is needed to simulate the dynamic behaviour of APFand to design proper compensators in the APF control loops. Such a simulation was carried out and the lossresistance was found to be 0.2 ohms. This value is used in the simulation diagram in Fig.4

The second simulation model is used to simulate the dynamics of the complete system. Theswitching frequency domain is eliminated in this model by using an ‘average’ model for the inverter. The timeconstants involved in dynamics are usually lage compared to switching period in the inverter and hence nothingmuch happens in the dynamics during one switching period. The dynamics responds to a sort of averaged effectof the switching taking place in the inverter. In the present simulation the principle of Power Balance is used onthe inverter to arrive at an averaged model for the inverter. The a.c side power and d.c side power in the case ofan inverter will have to be equal within losses and changes in reactive energy storages. But the reactivecomponents in the inverter will be small value due to high frequency switching and the rate of change of theirenergy storage can be ignored in a first order model. Then the a.c side power and d.c side power will be equalwithin the loss in the inverter equivalent resistance.

In the simulation model shown in Fig.4,the inverter output is modelled as a voltage controlledvoltage source with saturation behaviour. The input side i.e, the d.c capacitor side modelled by implementingpower balance through an ABM block. The ABM block senses the inverter a.c side current, multiplies it byinverter output voltage and divides the product by the d.c side capacitor voltage. Using power balance principle itcan be seen that the result of this calculation will be the capacitor current. ABM block output is a current and this

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is fed into the capacitor node. The sensing points avoid the inverter loss resistance.The load current is sensed and its harmonic content waveform is calculated by the harmonic

calculator block shown in Fig.5. This block implements the harmonic current calculation algorithm describedearlier.

The d.c capacitor voltage is compared with a set value and the error is processed in an opampbased PI controller. The PI Controller output multiplied by unit amplitude sine wave becomes the active currentreference. The total current reference is formed by adding the harmonic calculator block output and the activecurrent component.

The reference current which comes out as a voltage signal in the simulation diagram isconverted into a current by the G device and the current is pushed into an impedance representing the netimpedance between the inverter and the a.c supply. The drop in the impedance added to the a.c supply voltagewill have to be the output voltage synthesised by inverter. Thus inverter control voltage is obtained by scalingthis voltage suitably.

The load circuits contain standard rectifies/thyristors to simulate a non-linear current load. Twoswitches with controllable ON/OFF instants are included to simulate the load-switching transients on the APF.

7. Simulation Results

Case-1 Rectifier Load 300W with 330uF Capacitor Filter switched on at t=0 and switched off at t=100ms andline at 230V r.m.s

Fig.6 shows the simulation waveforms in this case.

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The source current is seen to be a good sine wave. The rectifier stops drawing load current att=100ms.However the effect of this will be felt in the current control loop since the feed back is based on asampling scheme. The information on how much active power and reactive power were drawn by the load in ana.c cycle will be available only at the end of that cycle in the harmonic current calculator block. In other wordsthere is a maximum of one cycle delay between change in load current and change in the harmonic currentcalculated by the harmonic current calculator. Hence the source current continues to be at the same old level forone more cycle after the 100ms point. But, now since there is no load to absorb this power it will go into inverterand charge up the d.c side capacitor. This is clearly seen in the capacitor voltage waveform. The set value ofcapacitor voltage is 400V and as the capacitor approaches that level the source current tapers down to zero. Closeexamination of the source voltage and source current waveforms reveal that there is a sudden phase change of180 deg in source current at 120ms and that after that time point the power flow is into the source. It is as itshould be since the capacitor is overcharged now and the system has to pump energy back into the source inorder to bring the capacitor back to its set value.

Fig.7 shows the spectral analysis of the relevant currents when the 300W rectifier was drawingpower. The low frequency harmonics in source current are in the 10-50mA range indicating almost pure sinewave current. Note that the inverter current and the rectifier current are harmonic rich.

The simulation model employed makes an assumption that whatever voltage is demanded ofthe inverter by the current regulation loop can really be synthesised by the inverter. This is not true. Themaximum voltage that an inverter can synthesise is equal to the d.c side voltage theoretically. But there arerestrictions on minimum and maximum pulse widths that can be realised in an inverter practically. Due to theserestrictions the practical inverter can utilise only a maximum of 95% of d.c voltage. These practical limits areignored in this simulation and it is assumed that the inverter can utilise the d.c side voltage fully. This is whythere is a limiter set at ±380V in the inverter model. This assumes that d.c side is maintained at 400V.But duringtransients d.c voltage varies. Hence after simulation run is over the result should be checked to see that at no timethe inverter synthesised voltage was above the capacitor voltage. In case-1 the maximum inverter demand was360V and the capacitor voltage never went below 382Volts.Hence the simulation results for case-1 will beacceptable.

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Case-2 Full Bridge Thyristor Converter Load 500W with negligible smoothing inductor on d.c side,line at 230Vr.m.s

Fig.8 shows the simulation output. The load waveform has sharp change at the firing instantdue to low level of smoothing inductance (the load circuit time constant was 20uS) in the d.c side. Inverter has toabsorb this sudden change in current if the supply current is to become pure sine. But if the inverter currentchanges suddenly the filter inductance will demand a very high voltage. This high voltage can not be supplied bythe inverter due to limited value of d.c side voltage. Hence the inverter output goes to the maximum possible andgets clamped there as evident in the form of narrow pulses in the waveform in fig.8. Thus the inductance getsonly a limited voltage (the difference between maximum inverter output and peak supply voltage) and hence itscurrent slews up only gradually. This results in the supply line taking the sudden changes in load current which isclearly visible in the supply current waveform in Fig.8.Thyristor converter fed resistive load is the mostdemanding load on an Active Power Filter and waveform improvement on supply side will be only partial asillustrated in this case study.

In this case also the capacitor voltage was verified to be above the inverter output at all timeand hence simulation results are acceptable.

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Case-3 Same as in case – 2 but the load circuit time constant was changed to 200uS.

Fig.9 shows the relevant waveforms in this case. The source current is seen to be almost puresine wave in this case.

8. Shunt Active Filter for Reactive CompensationIt is possible to control the power factor at the load bus by varying the amount of reactive

power injection by the shunt active filter (within its capability range). A reactive power control loop whichcalculates the amplitude of load reactive power, and controls the reactive current reference of the active filter tobe exactly the opposite of the load reactive power will be needed for this. Load reactive power is calculated byproduct-integrate-sample every 10ms-reset strategy described earlier.A PSpice simulation diagram for this scheme is given in Fig. 10 and PSpice simulation diagram for the ShuntAPF as a Reactive Compensator is given in Fig. 11.

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The results of simulation for a RL load with APF enabled at 110ms (by using “Gate” block inFig. 11 ) is shown below.The rapid change in source current and its near unity power factor may be noted.Thepower factor is not exactly upf because of the fundamental reactive power taken by the filter capacitor across theinverter output which was not accounted for anywhere in the control loops.

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HARMONIC VOLTAGE CANCELLATION & ISOLATION BY SERIES ACTIVEPOWER FILTERING (SPAF) IN DISTRIBUTION SYSTEMS

Suresh Kumar.K.SAsst.Professor,Dept. of Elect. Engg.

N.I.T.,Calicut1. Introduction

In Shunt Active Power Filtering ,the Inverter injects harmonic currents required for eliminationof harmonics in the source current and injects it at the node where the load is connected. The current drawn bythe Inverter is forced to contain a small in-phase sinusoidal component in order to draw enough active powerfrom source to supply losses in the APF and to maintain the D.C side capacitor voltage constant. Series APF isthe dual of Shunt APF.

In Series APF the Inverter injects a voltage in series with the line which feeds the pollutingload through a transformer. The injected voltage will be mostly harmonic with a small amount of sinusoidalcomponent which is in-phase with the current flowing in the line. The small sinusoidal in-phase (with linecurrent) component in the injected voltage results in the right amount of active power flow into the Inverter tocompensate for the losses within the Series APF and to maintain the D.C side capacitor voltage constant.Obviously, the D.C voltage control loop will decide the amount of this in-phase component.

Depending upon the location of Series APF, nature of bus voltage and nature of load thepurpose of injecting harmonic voltage in series with the line can be one of the following.

(i) In this case the distribution bus (say 11 kV) is polluted and has non-negligible harmoniccontent. It is required to clean up this voltage before it reaches sensitive loads. Essentially we want toremove the harmonic content in the voltage at the distribution substation before it is fed into a feedersupplying harmonic-sensitive loads. The bus voltage corruption may have been due to harmonic currentgenerating loads upstream. However, the Series APF is not aimed at that harmonic generation problem;but is applied to protect other chosen loads from the already present harmonics in the source bus. In thismode ,the Series APF senses the bus voltage and line currents and injects the right amount of harmonicvoltages in series with the line in such a way that the voltages after the filter will be harmonic free andclean.Fig.1 shows the power circuit and control blocks of a Series APF working in this mode. This modeof operation can be termed Harmonic Cancellation Mode since the Series APF in this mode cancels theharmonics present in the source voltage before it gets to the load.

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(ii) In the second context, a Series APF is used to help a shunt connected Passive Filter in divertingthe harmonic currents generated by a non-linear load. Tuned LC filters are supposed to have zeroimpedance at the tuning frequency. However, they will have non-zero value due to losses in theinductor. Hence, the tuned filter shares the harmonic current with the line and source impedance insteadof absorbing it entirely. Moreover, the filter is easily detuned with ageing of components anddegradation in capacitors. In addition, changes in system frequency make the filter detuned. If the filteris detuned, the harmonic current generated by the non-linear load will flow in the source path partiallythereby reducing the filtering effectiveness of the Passive Filter.One way to increase the effectiveness ofthe Passive Filter and make it absorb all the harmonic current is to insert a high impedance in serieswith the line (source) before the load. Of course, this high impedance should be there only for harmoniccurrent flow and it should go to a zero value for fundamental current flow.

The Series APF in this mode of operation, senses the harmonic current flow in the line andforces the Inverter to inject (through a transformer) a harmonic voltage proportional to this current inseries with the source in direction to oppose the current flow-in short the Series APF simulates a highresistance in series with the line for harmonic currents alone. With this high resistance in the sourceside, the Passive Filter is forced to absorb all the harmonic current generated by the load even if it has anon zero impedance at the harmonic frequency due to detuning.

Of course, the load voltage will become distorted if the filter impedance is not zero. Moreover,a single tuned LC filter will take care of only one harmonic component. It needs multiple LC filters tohandle all the major harmonics. All the LC sections will derive benefit from the same Series APF.Ifthere are harmonic components which the Passive Filters can not absorb without distorting load busvoltage beyond acceptable levels, they will have to be permitted to flow into the source by Series APFpresenting a low or zero resistance those frequency components. The Series APF used in this mode ofoperation is called Harmonic Isolator since it isolates the source bus at h frequencies from the pollutingload.

2. The Series APF in Harmonic Cancellation Mode

Fig.1 shows a Series APF in this mode. The source VS and inductance LS represent theThevenin's equivalent of the power system behind the distribution bus. Vsb is the source bus voltage whichcontains harmonics. Lline represents the line inductance of the feeder feeding the load bus.Vlb is the load busvoltage.The Series APF injects Vi in series with the line as shown.Single-Phase topology is considered in theinterest of simplicity.

The line current I is sensed by a CT and converted to electronic level and is fed into a PLL-Counter-EPROM-DAC type sine wave generator.This block generates unit amplitude pure Sine wave which is inphase with the feeder line current.It also outputs a unit amplitude Cosine wave.The harmonic content of thesource bus voltage (and thereby the voltage that the APF must inject into line) can be found out by subtractingthe fundamental component of bus voltage from the total bus voltage.This requires the extraction of fundamentalcomponent.

The sensed bus voltage is multiplied with unit Sine and Cosine respectively to extract thefundamental orthogonal components of voltage.The products are integrated for a cycle duration and the value ofintegrals is noted by a sample and hold mechanism at the end of cycle period.After sampling the integrators arereset and allowed to perform the integration for the next period.The sampled values will give the amplitude of in-phase and quadrature (with respect to line current) fundamental components of voltage.These amplitudes aremultiplied with appropriate sinusoidal templates and added to re-construct the net fundamental component ofvoltage and then it subtracted from the total bus voltage to get the harmonic content.

The D.C side capacitor voltage will discharge down to zero unless sufficient power is drawnfrom the line to meet the losses in the Inverter.This power is drawn by injecting a fundamental in-phasecomponent against the line current flow. The amount of this component is decided by a PI controller whichmonitors the D.C bus voltage.

The Inverter in the Series APF carries the full line current (after transformation). But thevoltage generated at the output has only a small fundamental component and has mostly harmonic components(usually 5th,7th,11th etc.).Therefore the a.c side power in the inverter will be at 4th,6th,8th harmonic etc. Thus, thereactive power flow into the D.C. side capacitor is at those frequencies and the ripple across the capacitor can bemade small due to high frequency nature of these power components. Also, the kVA rating of Inverter and D.Cside capacitor will be decided by the harmonic content in the voltage and the maximum line current.

The control system design considerations for the D.C. voltage control loop has been describedalready described in other contexts (SVC,Shunt APF,PWM Rectifier etc.) and need not be repeated here. The

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crucial control block in this application is the harmonic content calculator. The calculator has to ensure that theoutput from it does not contain any in-phase component. If it contains that the capacitor will either discharge fastor overcharge and in order to limit the change in capacitor voltage before the voltage control loop can act ,it willbe necessary to use large valued capacitor. The calculator will ensure that there is no fundamental component inits output under steady conditions. But under transient conditions (change in line current, changes in bus voltageetc.), it may output fundamental component. The value of D.C side capacitor will be decided almost entirely bythe dynamic response of this Calculator block.

The most difficult thing about a Series APF is to protect it. Note that it is in series with the lineand has to carry all the load current (fundamental plus harmonic, if any) .Moreover,the fault currents also willpass through it. It is not enough to shut down the Inverter based on fast over current sensing because if theInverter is shut down the transformer primary goes open and secondary imposes a large impedance in series withthe line. A Series APF is to be shorted to take it out of service i.e. it has to be taken out of line and a sort path hasto be put in its place. This can call for fast acting static transfer switches.

The Series APF effectively cancels the entire harmonic content of source bus voltage. Nowwhat if the load at the load bus is non-linear ? The harmonic currents drawn by the load via the line will flowthrough the Thevenin's impedance of the source (Ls) and produce further harmonic voltages at the source bus.But these also will get cancelled by the Series APF.i.e. the Series APF makes the harmonic impedance to its leftside zero. Hence the harmonic impedance of the line plus source is reduced by Series APF and any shunt filterput at the load bus will have to compete with a lower harmonic impedance in the harmonic current sharingprocess. In particular ,if this Series APF is installed at the load bus i.e. after the line ,a passive shunt filter(like capacitor or tuned LC etc.) is going to be completely useless and all the harmonic current will go into theline,thereby corrupting the voltage received by other loads which are not protected by a Series APF.Of courseit is possible to install a Shunt Active Filter at the load bus to cancel the harmonic currents taken by load.

3. The Series APF as a Reactance Compensator

In the last section ,it was pointed out that the harmonic voltage calculator has the in-phase andout-of-phase sine waves available to it in order to arrive at an estimate of net fundamental component in thevoltage. The injected voltage is harmonic plus a little in-phase fundamental component required to draw the losspower. Now,if the injected voltage reference is made to have a sinusoidal component which is in quadrature withline current , the Series APF will absorb or deliver fundamental frequency reactive power. It becomes a seriesreactive power compensator or equivalently it becomes a reactance at fundamental frequency. Series APF in thismode can provide series capacitor/inductor compensation to the line along with harmonic cancellation. Therequired voltage reference can be obtained using the Cosine wave template already available in the controlsystem. Of course, the kVA rating of Inverter and other components will have to be suitably chosen.

This series compensation capability can be made use of in two ways. In one case, it can becontrolled in such a way that it injects a fundamental voltage in quadrature with the line current in proportion tothe current magnitude. In that case, the Series APF becomes a fixed reactance value at fundamental frequency -usually capacitive. The application of series capacitors in the transmission lines to improve power transfercapability,system stability and voltage regulation is well known. Series APF can implement this series capacitorcompensation as explained above.

A second way in which the fundamental Var compensation capability of Series APF can beemployed is by using it to regulate the voltage after the Series APF location at a pre-decided value. This can bedone by sensing the voltage magnitude downstream ,comparing it with a set value,processing the error in a PIController and using the error to multiply Cos (ωt+1800) .The product is added along with the harmonicreference coming from the Harmonic Content Calculator to form the net reference signal for the PWMInverter.Thereby the value of effective capacitive reactance at fundamental frequency simulated by the SeriesAPF is varied to maintain a constant amplitude a.c voltage at a point after the Series APF.

In both ways of implementing the Var compensation action,it is possible to derive additionaladvantage from Series APF in the form of a fault current limiting reactance (provided the Series APF has highoverload capability for short duration).When the sensed line current indicates the occurrence of a fault(either byp.f angle or by its magnitude) the Series APF fundamental reference can be shifted from -Cos ωt to +Cos ωt.Then the Series APF will simulate an inductive reactance and thereby limit the fault current.Series APF is usedfor this function too in practice.

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4. The Series APF in Harmonic Isolation Mode

Fig.2 shows a Series APF in harmonic isolation mode where it serves to isolate the source fromthe harmonic currents drawn by the load.it does this by simulating a high resistance in series with the line forharmonic current flow. Only one tuned passive filter is shown at the load bus and it is assumed that the loaddraws one harmonic component predominantly. Otherwise more tuned filters are needed at the load bus.

The source current Is is sensed and a pure sine wave is in phase with it is generated by the PLLsubsystem. The sine thus generated is used to extract the harmonic content in the source current using theorthogonal decomposition method which has been described in the last section. The extracted harmoniccomponent of Is is multiplied by a gain K and that (along with the small fundamental component needed todraw the loss power) is given as the reference to the PWM Voltage Source Inverter.Thus,the Inverter injects aharmonic voltage which is proportional to the harmonic current into the line ,thereby simulating a resistance ofvalue K ohms in the line (only for harmonic current flows).

Now, the harmonic current drawn by the load has two parallel paths to choose-through thefilter and through the line which appears as a high resistance now. It chooses filter path predominantly even ifthe filter is slightly detuned. Thus, the harmonic current into the source is reduced to very low levels.

Similar action takes place in the case of harmonic content in the source. The high resistancesimulated by the Series APF will absorb all the harmonic voltages (for which there are passive filter branchesat load end) present in the source bus and isolate the load from supply side harmonics. This is a welcomefeature since in the absence of Series APF, the tuned filter would have drawn large currents from source ifthere were source side harmonics. This would have led to overloading of the filter and would have called forparallel tuned LC section in series with the line to isolate the series tuned filter from supply side harmonics.

With a series tuned LC filter,there is always a chance of system resonances due to parallelresonance between line/source inductance and filter components. The Series APF in the resistance emulationmode will damp these resonances well and will avoid dangerous harmonic amplification.

It is possible to combine series capacitor compensation along with harmonic isolation in thissystem by suitably modifying the reference signal to the PWM Inverter.

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5. PSpice Simulation of a Series Active Filter in Harmonic Isolator Mode

(Also called Hybrid Active Filter)

The PSpice Simulation diagram (using Design Lab 8.0) for a Single Phase Series APF inHarmonic Isolation mode is given below. The inverter was modelled as an ideal controlled voltage source. Ahalf-controlled thyristor converter is used as load.

The simulation run results for a pure sinusoidal source and thyristor load is shown below inFig. 4.The harmonic calculator takes one half cycle to calculate the harmonic content properly, till then it outputsall the input as the harmonic content ; this explains why the inverter had to inject maximum (limited to 50V) inthe beginning.This will lead to a large active power outflow from the DC Side of Inverter and will require asuitably sized capacitor to hold the voltage against such outflow (or inflow) of active power.The filter is seen totake a large leading reactive power – expected since passive filtering is practically possible only along withpassive capacitor reactive compensation.The value of inductor required for harmonic filtering alone (withoutfundamental leading reactive power) will be impracticably high.The source current, though more or lesssinusoidal, shows high frequency content.This is so since the load current has high frequency content , but thepassive filter offers low impedance path only for a few harmonics.Thus the current sharing ratio between theSeries Inverter equivalent resistance (40 ohms in the simulation) and filter impedance is adversely affected athigh frequencies – leading to more of high frequency currents flowing to source side and consequent appearanceof high frequency harmonic content at the load terminal voltage.

The simulation results for a distorted source containing 10% fifth harmonic is shown in Fig. 5.Now the source current is distorted perceptibly – since the inverter has to absorb all the source fifth harmonicacross it. However the load voltage is more or less sinusoidal with a little h.f content which is due to the h.fcontent in load current as eaplained above.Thus it can be seen that the Series APF handles all those load currentharmonics and source voltage harmonics for which there are tuned passive filter structures at load bus well. Andit can not handle the harmonic components for which there is no low impedance path across load bus.Thedistortion reported in this simulation will be on the optimistic side due to the neglecting of switching frequencyfilter of the series inverter.

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It may be better to introduce a high resistance in series with the line using Series Inverter onlyfor those harmonic components for which there is a tuned structure at the load bus. This will require a harmoniccalculator that can extract individual harmonics from the line current.

6. Differences in DC Side Control between Series APFs and Shunt APFs

Both Shunt and Series APFs with self-sustained DC bus (i.e a Capacitor holding DC Voltageconstant without any AC-DC Converter to help it to do so) control their DC Side voltage by drwaing a smallamount of active power from ac side to supply the losses in the inverter.In the Shunt APF this is done by a PIControl loop on the DC Voltage injecting an active current component into the reference current of the APF.Correspondingly a similar control loop will inject a sinusoidal voltage component which is in phase with the linecurrent to draw/supply the required adjustment power.In the Shunt APF case the loop gain of this control loopwill be directly proportional to the bus voltage magnitude and hence reasonably constant.But in the Series APFcase the loop gain of voltage control loop is directly proportional to the fundamental current amplitude in the linei.e the load current and hence is widely variable with line loading level.This is a major problem with the designof this control loop – a loop which is well damped under low load conditions will either be unstable or will behighly oscillatory under full load conditions.

If the function of Series APF is only harmonic cancellation or isolation (and not load voltageregulation or series reactive compensation) an easy solution to this control problem will be to replace the DCSide with a small rated single phase diode rectifier or a Battery with a Charger.In fact this is how suchinstallations are made in practice. The rating needed of such a converter will be very small and usually is about3-5% of the line full load capacity.The rating of Series Inverter itself will be about 10-20% of the line capacitydepending on the amount of source and load side harmonics and on the extent of detuning and quality of thepassive filters.

Note :- The Series APF Systems described here can be applied in three phase systems too.Usually Series APFs inthree phase systems make use of three single phase inverters feeding a Y-Open Y transformer and in this case thecontrol strategy described here can strightwaway be applied on a phase by phase basis.Only that three PLLsystems are not needed. A single PLL locked onto first phase along with suitable EPROM storage can generatethe six required unit sinusoidal templates.Also, there are a variety of algorithms available for harmonic contentextraction which may have stndard implementations in DSP hardware.One of those can replace the harmonicextraction procedure described here (but not with much advantage in performance !)

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THREE PHASE SHUNT ACTIVE POWER FILTERSPART I - INTRODUCTION

Suresh Kumar K.SAP,EED,NIT Calicut

The use of modern electronic equipment has changed our lives (most would argue for thebetter) but has also changed the load characteristic of modern facilities. Electronic loads have earned the name"nonlinear load" to describe the way they draw power. The injected harmonics, reactive power burden,unbalance, and excessive neutral currents cause low system efficiency and poor power factor. Harmoniccontamination has become a major concern for power system specialists due to its effects on sensitive loads andon the power distribution system. Harmonic current components :• increase power system losses,• cause excessive heating in rotating machinery,• can create significant interference with communication circuits that share common right-of-ways with ACpower circuits,• and can generate noise on regulating and control circuits causing erroneous operation of such equipment.

The term nonlinear load is commonly used to describe the switch mode power supply found inpersonal computers. In fact, this type of power supply is used commonly in a myriad of applications. Microwaveovens, laser printers, medical instrumentation, stereos, televisions, and electronic lighting are among a fewdevices using switch mode power supplies. Other types of nonlinear loads include light dimmers, 6-pulserectified supplies, 6-pulse phase-angle controlled loads, and 12-pulse rectified supplies. Variable speed drivescommonly use six-pulse rectified and phase-angle controlled power supplies.

Power electronic equipment can be designed to provide harmonics-free performance. But inmost applications, the economic incentives have not been sufficient to bring about design improvements. Powersystem engineers have turned to regulation to force the use of lower-harmonic power supply design. Theircommon objective is to preserve the sinusoidal nature of the power system voltage while protecting componentsfrom added harmonic loading. The electrical utilities are quickly adopting the philosophy and constraintsproposed in IEEE 519-1992 [14], a Recommended Practice (one level short of a mandatory Standard), limitingboth utility voltage and end-user current distortions.

In order to maintain good power quality, various international agencies recommended limitsof harmonic current injection into the utility. According to IEEE-519 standards the limits on the magnitudes ofharmonic currents and harmonic voltage distortion at various harmonics frequencies are specified, as given inTables1 and 2.The amount of distortion in the voltage or current waveform is quantified by means of an indexcalled the total harmonic distortion(THD). The THD in current is defined as

Table 1. Harmonic Current Limits for non- - linear Loads

sc/I1 <11 1≤ h ≤17 1< h< 23 3 ≤ h<35 HD

20 .5 .6

0-50 .5 .5

0-100 0 .5 .5 2

00-1000 2 .5 5

Isc is the maximum short circuit current at the point of common coupling (PCC) , I1is the maximum fundamental-frequency load current.

Table 2 Harmonic Voltage Limits for power producers

2.3 - 69 kV 69 - 138 kVMax. for

individual harmonies3.0 1.5

Totalharmonic distortion (THD)

5.0 2.5

∑≠

×=

1n

2

s1IsnI

100%THD

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The Table 2 lists the quality of the voltage that the power producer is required to furnish auser. It is based on the voltage level at which the user is supplied.1. PASSIVE FILTERS:

Conventionally, passive LC filters have been used to eliminate line current harmonics and toincrease the load power factor. However, in applications these passive second order filters present the followingdisadvantages :a) The source impedance strongly affects filtering characteristics.b) As both the harmonic and the fundamental current components flow into the filter, the filter must be rated

by taking into account both currents.c) When the harmonic current components increase, the filter can be overloaded.d) Parallel resonance between the power system and the passive filter causes amplification of harmonic

currents on the source side at a specific frequency.e) The passive filter may fall into series resonance with the power system so that voltage distortion produces

excessive harmonic currents flowing into the passive filter.The increased severity of harmonic pollution in power networks has attracted the attention of

power electronics and power system engineers to develop dynamic and adjustable solutions to the power qualityproblems. Such equipment, generally known as Active Filters (AF's), are also called Active Power LineConditioners (APLC's), Instantaneous Reactive Power Compensators (IRPC's), Active Power Filters (APF's),and Active Power Quality Conditioners (APQC's).2. ACTIVE POWER FILTERS

Parallel (or shunt) active filters have been recognized as a valid solution to current harmonicand reactive power compensation of non-linear loads. The principle of operation of active filters is based on theinjection of the current harmonics required by the load. Thus the basic principle of Shunt Active Power filter isthat it generates a current equal and opposite in polarity to the harmonic current drawn by the load and injects itto the point of coupling thereby forcing the source current to be pure sinusoidal. As a consequence, thecharacteristics of the harmonic compensation are strongly dependent on the filtering algorithm employed for thecalculation of load current harmonics.

3. CLASSIFICATION OF ACTIVE POWER FILTERSActive filters are basically categorized into three types, namely, two-wire (single phase), three-wire, and four-wire three-phase configurations to meet the requirements of the three types of nonlinear loads on supplysystems[1].AF's can be classified based on converter type, topology, and the number of phases. The converter type can beeither Current Source Inverter ( CSI ) or Voltage Source Inverter ( VSI ) bridge structure. The topology can beShunt, Series or a combination of both. The third classification is based on the number of phases, such as two-wire (single phase) and three- or four-wire three phase systems.

Converter Based ClassificationThere are two types of converters used in the development of AF's. Fig.1a shows the current-

fed pulse width modulation (PWM) inverter bridge structure. It behaves as a nonsinusoidal current source tomeet the harmonic current requirment of the nonlinear load. A diode is used in series with the self commutatingdevice (IGBT) for reverse voltage blocking.

The other converter used as an AF is a voltage-fed PWM inverter structure, as shown in Fig.1bIt has a self - supporting dc voltage bus with a large dc capacitor. It has become more dominant, since it islighter, cheaper, and expandable to multistep versions, to enhance the performance with lower switchingfrequencies . It is more popular in UPS-based applications, because in the presence of mains, the same inverterbridge can be used as an AF to eliminate harmonics of critical nonlinear loads.

Topology -Based ClassificationAF's can be classified based on the topology used as series or shunt filters, and unified power

quality conditioners use a combination of both. Combinations of active series and passive shunt filtering areknown as Hybrid filters. Fig.1b is an example of an active shunt filter, which is most widely used to eliminatecurrent harmonics, reactive power compensation and balancing unbalanced currents. It injects equalcompensating currents, opposite in phase, to cancel harmonics and /or reactive components at the point ofcommon coupling (PCC). It can also be used as a static VAR generator (STATCON) in the power systemnetwork for stabilizing and improving the voltage profile.

Fig.1c shows the basic block of a stand-alone active series filter. It is connected before theload in series with the mains, using a matching transformer, to eliminate voltage harmonics, and to balance andregulate the terminal voltage of the load or line.

Fig.1d shows a unified power quality conditioner (also known as Universal AF), which is acombination of active shunt and active series filters. The dc-link storage element (either inductor or capacitor) is

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shared between two current- source or voltage-source bridges operating as active series and active shuntcompensators.

Fig.1e shows the hybrid filter, which is a combination of an active series filter and passiveshunt filter. It is quite popular because of the solid state devices used in the active series part can be of reducedsize and cost, and a major part of the hybrid filter is made of the passive shunt L-C filter used to eliminate lowerorder harmonics.

Supply-System Based ConfigurationThis classification of AF's is based on the supply and/or the load system having single-phase

(two-wire) and three-phase (three wire or four wire) systems.1) Two-wire AF's: Two wire (single phase) AF's are used in all three modes as active series, active shunt, and acombination of both as unified line conditioners. Both converter configurations, current-source PWM bridgewith inductive energy storage element and voltage-source PWM bridge with capacitive dc-bus energy storageelements are used to form two-wire AF circuits.2) Three-wire AF's: Three-phase three-wire nonlinear loads, such as Adjustable Speed Drives (ASD's), aremajor applications of solid-state power converters. All the configurations Figs 2.1-2.5 are developed, in threewire AF's, with three wires on the ac side and two wires on the dc side. Active shunt AF's are also can bedesigned with three single-phase AF's with isolation transformers for proper voltage matching, independentphase control, and reliable compensation with unbalanced systems.3) Four-wire AF's: A large number of single-phase loads may be supplied from three-phase mains with neutralconductor. They cause excessive neutral current, harmonic and reactive power burden, and unbalance. Toreduce these problems, four-wire AF's have been developed

Compensated Variable Based Classification[2]

A) Harmonic compensation:This is the most important system parameter requiring compensation in power systems and it

is subdivided into voltage- and current-harmonic compensation as follows.Compensation of voltage harmonics: The subject of compensating voltage harmonics is not

widely addressed because power supplies usually have low impedance. The terminal voltage at the consumerpoint of common coupling (PCC) is normally maintained within the standard limits for voltage sag and totalharmonic distortion and does not normally vary much with loading. Note that the compensation of voltage andcurrent harmonics is interrelated. The reduction of voltage harmonics at the PCC helps a great deal to reducecurrent harmonics, especially for the particular cases of nonlinear loads with resonance at the harmonicfrequencies. However, the compensation of the voltage harmonics at the PCC does not eliminate the need forcurrent-harmonic compensation for the nonlinear loads.

Compensation of current harmonics: Compensation of current harmonics is very important inlow and medium-power applications. As mentioned above, the compensation of current harmonics reduces to agreat extent the amount of distortion in the voltage at the PCC. The imposition of harmonic standards[14] willsoon oblige factories and establishments to control the harmonics they inject into the power system.B) Multiple compensation:

Different combinations of the above systems can be used to improve the effectiveness offilters. The following are the most frequently used combinations.

Harmonic currents with Reactive power compensation: The most common and popular filtersare those which compensate for both the reactive power and the harmonic currents in order to maintain thesupply current completely free of harmonics and in phase with the supply voltage. The techniques employed forthis have several advantages over other alternatives, as only one filter is needed to compensate for everything,which is much more attractive than using many different types of compensators. However, because of the limitsimposed by the ratings of power switches, one can only use this application for low powers. The resultingswitching frequency would need to be lower for higher-power applications, which restricts the filter underconsideration to small powers.

Harmonic voltages with Reactive power compensation: This combination, however rare, takesplace in certain configurations for controlling the voltage harmonics, which would normally affect indirectly(using feedback) the reactive-power compensation. This compensation system is only suitable for low-powerapplications.

Harmonic currents and voltages: The problem of addressing harmonic currents and voltagessimultaneously can only be treated by using the series/parallel combination of active-filter configurations. This,ofcourse, is very important and very beneficial in making both the supply and the load free from harmoniceffects. However, this complex type is normally used only for very sensitive devices such as power-system-protection equipment and superconducting magnetic-energy storage systems.

Harmonic currents and voltages with reactive-power compensation: This scheme is theultimate in sophistication since it controls harmonics and reactive power [2]. This technique requires the use of

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the parallel/series active-filter combination. It is not employed very often because its control is rather difficultand the information available on it in the literature is very limited.

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4. THE THREE PHASE ACTIVE FILTERING SYSTEMThe active filtering system is based on a philosophy that addresses the load current distortion

from a time domain rather than a frequency domain approach. The most effective way to improve the distortivepower factor in a non-sinusoidal situation is to use a nonlinear active device that directly compensates for theload current distortion.

The performance of these active filters is based on three basic design criteria.1) The design of the power inverter ( semiconductor switches, inductances, capacitors, dc voltage)2) PWM control method (hysteresis, triangular carrier, periodical sampling)3) Method used to obtain the current reference or the control strategy used to generate the referencetemplate.

The active filter concept uses power electronics to produce harmonic current components thatcancel the harmonic current components from the non-linear loads[9]. The active filter configurationinvestigated in this lecture is based on apulse-width modulated (PWM) voltagesource inverter that interfaces to thesystem through a system interface filter asshown in Figure 3.1. In this configuration,the filter is connected in parallel with theload being compensated. Therefore, theconfiguration is often referred to as anactive parallel or shunt filter. Figure 1illustrates the concept of the harmoniccurrent cancellation so that the currentbeing supplied from the source issinusoidal. The voltage source inverterused in the active filter makes theharmonic control possible. This inverteruses dc capacitors as the supply and canswitch at a high frequency to generate asignal that will cancel the harmonics fromthe non-linear load.

The active filter does not need to provide any real power to cancel harmonic currents from theload. The harmonic currents to be cancelled show up as reactive power. Reduction in the harmonic voltagedistortion occurs because the harmonic currents flowing through the source impedance are reduced. Therefore,the dc capacitors and the filter components must be rated based on the reactive power associated with theharmonics to be cancelled and on the actual current waveform (rms and peak current magnitude) that must begenerated to achieve the cancellation.

The current waveform for canceling harmonics is achieved with the voltage source inverter inthe current controlled mode and an interfacing filter. The filter provides smoothing and isolation for highfrequency components. The desired current waveform is obtained by accurately controlling the switching of theinsulated gate bipolar transistors (IGBTs) in the inverter. Control of the current waveshape is limited by theswitching frequency of the inverter and by the available driving voltage across the interfacing inductance.

The driving voltage across the interfacing inductance determines the maximum di/dt that canbe achieved by the filter[9]. This is important because relatively high values of di/dt may be needed to cancelhigher order harmonic components. Therefore, there is a trade-off involved in sizing the interface inductor. Alarger inductor is better for isolation from the power system and protection from transient disturbances.However, the larger inductor limits the ability of the active filter to cancel higher order harmonics.

The Inverter (three-phase unit or single-phase unit as the case may be) in the Shunt ActivePower Filter is a bilateral converter and it is controlled in the Current Regulated mode i.e. the switching of theInverter is done in such a way that it delivers a current which is equal to the set value of current in the currentcontrol loop. Thus the basic principle of Shunt Active Power Filter is that it generates a current equal andopposite in polarity to the harmonic current drawn by the load and injects it to the point of coupling therebyforcing the source current to be pure sinusoidal. This type of Shunt Active Power Filter is called the CurrentInjection Type APF [9].

Configuration Of Three Phase Shunt Active Power FilterThe basic configuration of a three-phase three-wire active power filter is shown in fig 3.2. The

diode bridge rectifier is used as an ideal harmonic generator to study the performance of the Active filter. Thecurrent-controlled voltage-source inverter (VSI) is shown connected at the load end. This PWM inverter consistsof six switches with antiparallel diode across each switch. The voltage which must be supported by one switchis unipolar and limited by the DC voltage Vdc. The peak value of the current which is bi-directional is imposedby the active filter current. Thus the appropriate semiconductor device may be an IGBT with an antiparallel

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diode and must be protected against overcurrent. The capacitor is designed in order to provide DC voltage withacceptable ripples. In order to assure the filter current at any instant, the DC voltage Vdc must be atleast equal to3/2 of the peak value of the line AC mains voltage[11].

Fig.3 Configuration of the Three phase, Three wire Active Filtering system

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THREE PHASE SHUNT ACTIVE POWER FILTERSPART II – CONTROL STRATEGIES

Suresh Kumar K.SAP,EED,NIT Calicut

1. Introduction To Control StrategiesMost conventional methods of harmonics/current reference can be classified either as time-

domain or frequency-domain. Other modern techniques do exist.1.1 Time-domain approaches: The following seven subdivisions of time-domain approaches are mainly usedfor three-phase systems except for the fictitious-power-compensation technique which can be adopted forsingle- or three-phase systems[2].(i) Instantaneous-reactive-power algorithm[3,4]: In this technique, suitable only for three-phase systems, theinstantaneous power of the load is calculated. It consists of a DC component and an oscillating component. Theoscillating component is separated over a certain interval of time (an integral number of cycles). The referencesignals are then calculated by distributing the total current equally to each of the three phases. This operationtakes place only under the assumption that the three-phase system is balanced and that the voltage waveformsare purely sinusoidal.(ii) Synchronous-detection algorithm[7]: This technique, which is very similar to the previous one, relies in thefact that the three phase currents are balanced. The average power is calculated and divided equally between thethree phases. The signal is then synchronised relative to the mains voltage for each phase.(iii) constant-active power algorithm[5]: The instantaneous and average powers of the load are calculated. Theactive power component of the system is controlled to keep the instantaneous real power constant, whilemaintaining the imaginary power to zero.(iv) unity power factor algorithm [5]: This is another technique, which is very similar to that in (iii) above,except the fact that it forces the instantaneous current signal to track the voltage reference waveform. Thisimplies that the power factor would be fixed to unity and the system would only be suitable for the combinedsystem of VAR and current-harmonic compensation.(v) Fictitious-power-compensation algorithm: This technique relies on the principle of fictitious powercompensation. The system controller is designed to minimise the undesired component of power. In this aspect,it is similar to the instantaneous-reactive-power algorithm but with a different definition of power. Thisapproach is suitable for both single- and three-phase systems. However it involves a large amount ofcomputation.(vi) Synchronous-frame-based algorithm[6]: This algorithm relies on the Park transformations to transform thethree phase system from a stationary reference frame into synchronously rotating direct, quadrature and zero-sequence components. These can easily be analysed since the fundamental-frequency component is transformedinto DC quantities. The active and reactive components of the system are represented by the direct andquadrature components, respectively. The high-order harmonics still remain in the signal; however they aremodulated at different frequencies. These are the undesired components to be eliminated from the system andthey represent the reference harmonic current. The system is very stable since the controller deals mainly withDC quantities. The computation is instantaneous but incurs time delays in filtering the DC quantities. Thismethod is applicable to only three-phase systems.(vii) Synchronous-flux-detection algorithm: This technique is similar to that in (vi) above, in applying Parktransformations to transfer the system into synchronously rotating direct, quadrature and zero-sequence framesof reference. However, it applies the transformation on the flux linkage of the filter inductance, which is thencontrolled using the output voltages and currents in separate integral loops. The presence of these integral loopsincorporates time delays, which depend on the frequency response of the special feedforward and feedbackintegrators.1.2.Frequency-domain approaches[2]: Frequency-domain approaches are suitable for both single- and three-phase systems. They mainly derived from the conventional Fourier analysis and include the following threesubdivisions.(i) Conventional Fourier and FFT algorithms.(ii) Sine-multiplication technique.(iii) Modified-Fourier-series techniques.1.3. Other algorithms: There are numerous optimization and estimation techniques, and all the utilities andlibraries for estimation can be used to perform this task. However some new methods arise, such as the Neuralnetwork and adaptive-estimation techniques. Unfortunately, presently available control hardware is not suitablefor implementation of these techniques.

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2.Control Strategies Covered in This LectureControl strategy is the heart of the AF and is implemented in three stages. In the first stage, the

essential voltage and current signals are sensed using potential transformers (PT's), CT's. In the second stage,compensating commands in terms of current or voltage levels are derived based on control methods. In the thirdstage of control, the gating signals for the solid-state devices of the AF are generated using Constant FrequencyPWM , hysteresis modulation or Space Vector Modulation techniques. In this lecture, the performance of thefour control methods for the three-phase three wire Active Power Filter control are considered. The controlstrategies are discussed here.

2.1. Instantaneous Reactive Power Algorithm or Instantaneous Active and Reactive Power (p-q) method

As shown in fig.1, the control circuit of the active power filter consists of the current controlcircuit for the PWM converter, the calculation circuit for the compensating current references within the block.These circuits are designed on the basis of the instantaneous reactive power theory, which can be explained asfollows.

eu ,ev ,ew are the phase voltages of the three phase system,iLu , iLv , iLw are the load currentsiCu , iCv , iCw are the compensating currents

The phase voltages eu ,ev ,ew , and the load currents iLu , iLv , iLw are transformed into the αβorthogonal coordinates according to the following expressions, respectively:

From (1) and (2), the instantaneous real power pL and the instantaneous reactive power qLflowing into the load side are expressed by

Fig.1. Block diagram of the Instantaneous Reactive Power algorithm

Calculation of p* and q*

Current Control Circuit

Calculation of pL and qL

Calculation of i*Cu, i*Cv, and i*Cw

VoltageControl

iLu iLv iLw eu ev ew

p*+pavq*qL

pL Vdc

VRef

p* pav+

the inverter switching signals

( )1 e

2/3- 2/3 0

1/2- 1/2- 1 3/2

u

=

w

v

ee

ee

β

α

( )2 i

2/3- 2/3 0

1/2- 1/2- 1 3/2

Lu

=

Lw

LvL

L

ii

ii

β

α

( )3 i

e

e L

−=

β

α

αβ

βα

LL

L

iee

qp

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The calculation circuit for the compensating current references (i*Cu, i*Cv, i*Cw ) performsinversion of (3) and (2) to give

The calculation circuit for the compensating current references (i*Cu, i*Cv, i*Cw ) performsinversion of (3) and (2) to give

Here, pav is the instantaneous real power necessary to adjust the voltage of the dc capacitor toits reference value, and p* and q* are given by the calculation circuit for p* and q*, which should be theharmonic components of pL and qL, i.e.,

Apart from the calculation circuit for p* and q* , and the control circuit for the dc capacitorvoltage, all the above-mentioned calculation circuits consists of analog multipliers, dividers and operationalamplifiers without any time-constant elements.

The calculation circuit for p* is composed of High-pass filters(HPF) to extract the harmoniccomponent in the load power pL (eq.7). This filtering technique is considered to be equivalent to differentiation,which makes this technique vulnerable to noise [6]. In real filtering , a Butterworth type filter is chosen. Thisparticular filter type was chosen, in order to obtain magnitude and phase characteristics as close as possible to anideal filter since its magnitude response is maximally flat in the passband and is monotonic in both passband andstopbands.

To minimize the influence of the HPF’s phase responses, an alternative HPF (AHPF) isobtained by mean of a Low-pass filter (LPF) of the same order and cutoff frequency, simply by the differencebetween the input signal and the filtered one, which is equivalent to performing HAHPF (s) = 1-HLPF (s), which isshown in Fig 2.

The transfer function, H(s), for an analog n-order Butterworth type HPF is

Fig.2. Alternative High Pass Filter ( AHPF-Butterworth)

The design of the low-pass filter is the most important in the control circuit, because variouscompensation characteristics are obtained in accordance with the cutoff frequency and the order of the low passfilter [3]. In this lecture a butterworth filter of fifth-order with cutoff frequency ,150Hz was chosen.

(8) es , )s

sw(

1HPF(s) 2n12j

21jπ

jn

1j jc

−+

=

=−

=∏

Low-Pass Filter (Butterworth)

pL +

_

p*

so ly,respectivep ofcomponent harmonic theand source), theofhat lessthan t is p offrequency (the load ofn fluctuatio

by the causedcomponent frequency low component, dc thebe p~ and ,p ,pLet

L

L

LLL

(4) p~ppp LLLL ++=

(5) q~qqq LLLL ++=

(6) *q p*p

e e

ee

/23- 1/2

/23 1/2-

0 1

2/3*i*i*i

av

1

αβ

β α

Cw

Cv

Cu

+

−

−

=

−

(7) qq* , p~p* LL ==

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Control circuit of the dc capacitor: The dc capacitor voltage can be controlled by trimming the instantaneous real power pav ,

which corresponds to the loss of the APF, while the instantaneous imaginary power q* does not have any effecton the dc capacitor voltage. The control circuit has the negative feedback loop to trim pav automatically. Notethat the APF is considered as a harmonic generator rather than a harmonic suppressor when pav is fluctuating. Infig.1, the average voltage across the dc capacitor is controlled so as to coincide with the reference voltage VRef.

2.2. Synchronous Detection Algorithm(SDA):In this algorithm [7], the three-phase mains currents are assumed to be balanced after

compensating. Thus , Imu= Imv =Imw (9)Where Imu, Imv and Imw are the amplitudes of the three-phase mains currents after

compensating, respectively. The real power consumed by the load can be represented as The real power p is sent to a lowpass filter to obtain its average value Pdc. The real power is

then split into the three phases of the mains supply:

Pu = (Pdc Eu)/Etot (11) Pv = (Pdc Ev)/Etot (12) Pw = (Pdc Ew)/Etot (13)Where Eu, Ev and Ew are the amplitude of the mains voltages, and Etot is the sum of Eu, Ev

and Ew. The desired mains currents can be calculated as

The reference compensation currents can then be calculated and represented as i*cu = iLu –imu (17) i*cv = iLv –imv (18) i*cw = iLw –imw (19)

[ ] (10) iii

e e e

Lw

Lv

Lu

wvu

=p

6)(1 E

P2ei

(15) E

P2ei

(14) E

P2ei

2w

wwmw

2v

vvmv

2u

uumu

=

=

=

2ew/Ew2

Σ L.P.F Powerdistributor

eu

ev

ew

iLu

iLv

iLw

iLu

iLv

iLw

icu

icv

icw

2ev/Ev2

2eu/Eu2

Fig.3 Block diagram for implementing synchronous detection algorithm

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Control circuit of the dc capacitor:The dc capacitor voltage regulation is achieved in the same manner as in the p-q method, the

instantaneous active power consumed in the power converter losses are compensated by an active componentdrawn from the supply. Thus the dc voltage regulation of the capacitor is achieved. This is achieved in one cycleof the supply voltage waveform.

2.3. An Instantaneous Active and Reactive Current Component id-iq Method (D-Q Method):

In this method the currents ici , are obtained from instantaneous active and reactive currentcomponents ild and ilq of the nonlinear load. The mains voltages and load currents are to be transformed into αβcoordinates as given by equations below.

The instantaneous active and reactive load powers are defined as

However, the dq load current components are derived from a synchronous reference framebased on the Park’s transformation, where ‘θ’ represents the instantaneous voltage vector angle, given in eq.(4)

Under balanced andsinusoidal mains voltage conditionsangle ‘θ’ is a uniformly increasingfunction of time. This transformationangle is sensitive to voltage harmonicsand unbalance, therefore dθ/dt maynot be constant over a mains period.

With transformation (4) the direct voltage component is given by

β

α

d

q

ilq

ild

uβ

uα

θ

0

2β

2ααβdqd ee|e||e|e +===

(5) ii

e ee e

ee1

ii

lβ

lα

αβ

βα

2β

2αlq

ld

−+=

( )1 e

2/3- 2/3 0

1/2- 1/2- 1 3/2

u

=

w

v

ee

ee

β

α

( )2 i

2/3- 2/3 0

1/2- 1/2- 1 3/2

Lu

=

Lw

LvL

L

ii

ii

β

α

( )3 i

e

e L

−=

β

α

αβ

βα

LL

L

iee

qp

(4) ee

tanθ , ii

cosθ sinθ-sinθ cosθ

ii

α

β1-

lβ

lα

lq

ld

=

=

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And the quadrature voltage component is always null, eq =0, so due to geometric relations (4)becomes Instantaneous active and reactive load currents ild and ilq can also be decomposed into oscillatoryand average terms.

The first harmonic current of positive sequence is transformed to dc quantities, il+dq1h , i.e.,

this constitutes the average current components. All higher order current harmonics including the first harmoniccurrent of negative sequence, il+-

dqnh+il-dq1h , are transformed to non-dc quantities and undergo a frequency shift

in the spectra, and so, constitute the oscillatory current components. These assumptions are valid under balancedand sinusoidal mains voltage conditions. Eliminating the average current components by HPF's the currents thatshould be compensated are obtained, icd = -i~ld and icq = -i~lq .

Finally, the compensating currents can be calculated by the following equations

One of the characteristics of the Instantaneous Reactive Power algorithm and InstantaneousActive and Reactive Current Component method [6]is that the compensating currents are calculated directlyfrom the mains voltages, enabling the methods to be frequency-independent. Avoiding the use of a PLL a largefrequency operating range can be achieved limited chiefly by the cutoff frequency of the current control system(VSC and current controller ). Furthermore, under unbalanced and nonsinusoidal mains voltage conditions, alarge number of synchronization problems are avoided especially if a PLL is synthesized with a fast dynamicresponse.

A butterworth filter is chosen for the filtering of harmonics. This particular filter type waschosen, in order to obtain magnitude and phase characteristics as close as possible to an ideal filter since itsmagnitude response is maximally flat in the passband and is monotonic in both passband and stopbands. Thefilter here considered is a fourth-order filter with cutoff frequency fc = f/2 (f =50 hz) which assures theelimination of dc components in the nonlinear load powers and currents.To minimize the influence of the HPF'sphase responses, an alternative HPF (AHPF) is obtained as shown in fig.2, by mean of a low-pass filter (LPF)of the same order and cutoff frequency, simply by the difference between the input signal and the filtered one.

A) dc voltage regulation: A proportional-integral (PI) controller with anti-windup performsthe voltage regulation on the VSC dc side. Its input is the capacitor voltage error e*dc-edc . Through regulation ofthe first harmonic direct current of positive sequence i+

d1h it is possible to control the active power flow in theVSC and thus the capacitor voltage edc. The reactive power flow may be controlled by the first harmonicquadrature current of positive sequence i+

q1h . However, considering that the primary end of the AF is simply the

lqIlqi~lqi and ld,Ildi~ldi +=+=

(6) ii

e ee- e

ee

1 ii

cq

cd

αβ

βα

2β

2αcβ

cα

+=

(7) ii

/23- /23 0

1/2- 1/2- 1 2/3

iii

cβ

cαT

c3

c2

c1

=

ilq

ild LPF

LPF

PIe*dc

edc

id1h+

ildnhild1h+

ilq1h+ilqnh

i*cd

i*cq

+

+

+

+-

- -

-

iq1h+=0

Fig.5 dc voltage regulation and harmonic current generation system

+

-

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elimination of current harmonics caused by nonlinear loads, the current i+q1h is set to zero.

2.4 Modified Synchronous Detection Method[15]

The synchronous detection algorithm described in section 2.2 is an attempt to balance the linecurrents after compensation and to make them sinusoidal.But the algorithm assumes a balanced source voltageand uses the source voltage itself (possibly after a little filtering) as the reference templates.Thereby it avoids thePLL based synchronisation hardware.And it calculates the total active power and redistributes this total poweramong three phases in proportion to amplitudes of respective phase voltages.This will result in equal amplitudecurrents in three phases and currents will be sinusoidal i.e the line currents will be at upf on a phase by phasebasis.This much will be true in the case of unbalanced mains too.But this implies that the currents in the mainsneed not be balanced after compensation because the phase angles between voltages in an unbalanced systemneed not be 120 degrees.Thus “Synchronous Detection Algorithm” produces equal amplitude currents which donot necessarily make a balanced set after compensation.So it is either upf operation phase by phase or balancedpositive sequence currents after compensation and Synchronous Detection favours upf operation to positivesequence currents in the case of supply voltage unbalance.The “Modified Synchronous Detection Method”discussed here settles for positive sequence currents –which are at upf with respect to positive sequencecomponent of supply voltage - after compensation. In this method too the total reactive power from mains willbe zero but individual phases may not operate at upf under unbalanced voltage conditions.

In this method all pass filters designed to contribute 90 degree phase shifts are used to extractthe amplitude of positive sequence component in the supply voltage.The diagram below makes this clear.

Using similar all pass filters and the calculated positive sequence amplitude a system of threephase positive sequence unit voltages are synthesised.The total active power is calculated as in the case ofSynchronous Detection.The positive sequence voltage amplitude information is used to calculate the amplitudeof current for 1/3rd of this power and the positive sequence templates are used to convert this into desired mainscurrent reference.

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THREE PHASE SHUNT ACTIVE POWER FILTERSPART III – SIMULATION OF CONTROL STRATEGIES

Suresh Kumar K.SAP,EED,NIT Calicut

All the four control strategies described in Part II had been converted into Matlab SimulinkSimulation files and these files are available in the CDROM accompanying this Course Notes.All those fileswill run under Matlab 5.3 and up.Space limitation does not allow a detailed exposition on the simulation of allthe four strategies.One is chosen for detailed study in this lecture.All the control strategies perform more or lessthe same under balanced sinusoidal supply voltage and balanced (but distorted) load current currentconditions.Differences emerge only when the load current is unbalanced and/or supply voltage is non-ideal (i.eunbalanced and/or distorted). D-Q method is taken up for detailed discussion here and simulation results arecompared with those of Modified Synchronous Detection Method.1. Simulink Simulation Diagram for D-Q Method

The top layer of Simulation Diagram for this method is shown in the next page.The important subsystems are described below.(a) General Three Phase Source – is a masked subsystem which lets the user set the amplitude of positive and

negative sequence of the fundamental and two harmonic components (only one sequence) the 5th and 7th andthereby create a balanced or unbalanced or unbalanced and distorted three phase source.

(b) Uvw to xy Block – this block converts a set of three phase quantities into two phase quantities (zerosequence component is not there since only three wire system is being considered)

(c) Sine Cos Template Block – Generates unit vectors in the two phase coordinate system.

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(d) Two Phase to Synchronously Rotating Reference Frame Transformation

(e) Filtering in d-q – Extracts the dc component in d and q axis quantities and removes the dc from originalquantities in order to find out the reference signals for shunt Inverter in the d-q plane.

(f) d-q to two phase and two phase to three phase transformations

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(g) VSI Inverter Subsystem

(h) Load Current Subsystem – is a masked block giving a choice between 24kVA balanced Thyristor Load,50kVA Balanced Rectifier Load, 50kVA Sinusoidal Load and 15kVA Unbalanced Rectifier Load.When theSinusoidal load is chosen the values entered in the frequency box and phase (in radians) box will be used.

2. Simulation Results and Discussion on D-Q Method

Four cases have been simulated to bring out the salient aspects of D-Q Method of Shunt Active FilterControl.They are –(a) Balanced Three Phase Supply (360V amplitude phase voltage) with zero distortion feeding a load of

50kVA at 0.7 Lag.The load current waveform is balanced and sinusoidal.(b) Same load (it is a sinusoidal current source load , not RL load) but the supply has 10% negative sequence.(c) Same load , but supply has 5% each fifth and seventh harmonic and no negative sequence amplitude.(d) Balanced , Undistorted supply with 24kVA balanced thyristor converter load (23.5% THD).The important waveforms for these four cases appear in the pages at the end of this lecture note.

Analysis of Case (a) Waveforms

The waveforms of d-q components of load current are constants in steady state. This is expected since aset of positive sequence three phase pure sinusoidal quantities will appear as dc quantities in the synchronouslyrevolving frame.However under transient conditions the 4th order butterworth low pass filter of 25Hz cutoff usedin the d-q filtering block will delay the rise of these dc quantities thereby forcing the APF to deliver or take(deliver when load is switched on , take when the load is thrown off) active power from its DC Sidecapacitor.This explains the dip in capacitor voltage.Increasing the bandwidth of the low pass filters will reducethe dip , but will result in mains current distortion.

The inverter in the simulation is lossless and hence will not demand any active current flow intoit.However a large reactive current flows into it and this should have resulted in 2nd harmonic power pulsationsat the DC Capacitor node leading to second harmonic ripple in Capacitor Voltage.But then the reactive currentthat goes into the inverter in this case is a balanced current and the power pulsations due to three phases cancelout .Thus the Capacitor is virtually untouched in this case.

Thus as expected under steady state no harmonic components can appear at inverter reference currents(they can appear only via d-q components of load current leaking through filters or from DC Side ripples) andhence the line currents will remain pure sinusoidal as they should (after all load current in this case is puresinusoidal).

Analysis of Case (b) Waveforms

Here in this case the d-q components of load current show second harmonic component in addition tothe expected dc components.This is due to the fact that a set of negative sequence three phase quatities willappear as second harmonic quantities when translated into a synchronously revoloving reference frame (theywill appear dc if the frame rotates in the opposite direction, but then a reference frame can not be rotating inboth directions at the same time !).This second harmonic shouldn’t have come through the filter , but then thelow pass filter is not ideal, so a little will come through anyway.This second harmonic leaks into inverter currentreference in d-q plane and becomes third harmonic (and fundamental,creating unbalance in fundamentalfrequency currents) when it is translated into three phase quantities.Unbalanced mains currents with balancedload currents imply unbalanced inverter currents.Unbalanced inverter currents imply second harmonic ripple inDC Side Capacitor and that in turn means further third harmonic current in the lines due to DC Voltage control

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loop.The simulation results confirm that almost the entire THD of 8.3% reported for this case came from thirdharmonic in the line currents.Obviously the third harmonic in the line currents are not co-phasal and the linecurrents are not balanced.Thus d-q method succeeds in creating harmonics and unbalance in mains currentswhen the load itself is pure balanced currents.The solution lies in sensing the dc values of load current d-qcomponents avoiding all other ripple components in them and generating unit templates from a PLL systemwhich locks on to the positive sequence component of voltage.

Analysis of Case (c) Waveforms

In this case the supply voltages have harmonic content and these voltages are used to generate the sineand cos templates needed to move back and forth between static reference frame and rotating referenceframe.Obviously all the harmonics in the supply get carried into inverter current reference signals with noattenuation whatsoever.Thus the line currents will get distorted.The ripples in the capacitor voltage adds to theproblem and this explains why the mains current has a THD of 7.4% which is more than the 7% THD of mainsvoltage. No system which does not use a PLL based Synchronisation w.r.t to positive sequence component ofmains can be immune to supply voltage harmonics working its way into supply currents through an active shuntfilter.

Analysis of Case (d) Waveforms

This case returns a mains current with 6.1% THD when the load is a balanced thyristor converter loadof 24kVA and 23.5% THD with a balanced undistorted supply.An active filter should be able to do better thanthis. Analysis of these waveforms reveal another problem with the d-q domain low pass filtering.The idea of thefiltering in d-q domain was to get the dc component of d-component of load current (and that of q-component ifno reactive compensation is desired) and subtract it from the total d-component to get the component to becancelled by the inverter.But the low pass filter used to get the dc component will also pass a little of 4th,6th

etc.(5th and 7th harmonics in load current become 4th,6th and 8th in d-q domain).Thus after subtraction whatcomes out is different (usually lesser than actual, but phase relations are also to be considered) from what isexpected.Thus it is not the inverter’s fault – it is generating what it is being asked to , but it is not being askedenough ! this results in incomplete cancellation of harmonic currents. And, harmonic currents flowing ininverter results in ripple voltage in DC Side Capacitor which puts them back into the line through the DCVoltage Control Loop.

3. Simulation Results and Discussion on Modified Synchronous Detection Method

Three cases were simulated with this method.They are(e) 10% Negative Sequence in Supply and 50kVA Sinusoidal Load at 0.7 Lag(f) 24kVA Balanaced Thyristor Load with Balanced Undistorted Supply(g) 15kVA Unbalanced Rectifier Load with Balanced Undistorted SupplyThe excellent immunity of this method against supply unbalance is evinced by 1.15% THD in the mainscurrents in case (e).Case(f) returns a much better THD than the D-Q method for similar conditions.Finally theunbalanced rectifier load case (g) is further proof for the excellent performance of this method.The negativesequence component in line current is negligible.This method, like any method which does not use PLL basedsynchronisation, will suffer from bad performance under distorted line conditions.A PLL based system lockingonto fundamental component of U Phase voltage and an EPROM table-readout to construct the templatewaveform will improve this method in this respect.

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REFERENCES

[1] Bhimsingh, Kamal Al-Haddad, and Ambrish Chandra, “A Review of Active Filters forPower Quality improvement”, IEEE Trans.Ind.Electron., Vol.46, no.5, pp .960, 1999[2] M.El-Habrouk, M.K.Darwish and P.Mehta, "Active power filters: A review", IEE Proc.-Electr. Power Appl., Vol.147, no.5, pp.404, 2000[3] H.Akagi, A. Nabae, and S. Atoh, “Control strategy of active power filters using multiplevoltage-source PWM converters,” IEEE Trans. Ind. Appl.,vol. IA-22, no.3, pp. 460, 1986.[4] H.Akagi, F.Z. Peng, A.Nabae, “A Study of active power filters using quad-seriesVoltage-Source PWM Converters for Harmonic Compensation ,” IEEE Trans. PowerElectron., vol.5, no.1, pp.9, 1990.[5] A.Cavallini, G.C.Carlo, “Compensation Strategies for Shunt Active filter control”, IEEETrans. Power Electron.,vol. 9, no. 6, pp. 587, 1994.[6] Vasco Soares, P.Verdelho, and G.D.Marques, "An Instantaneous Active and ReactiveCurrent Component Method for Active Filters", IEEE Trans. Power Electron.,vol.15,no.4,pp.660, 2000[7] H.-L.Jou, “Performance comparison of the three-phase active power–filter algorithms”,IEE Proc.Gen. Trans. Distrib.,vol. 142, no.6,1995.[8] S-J Huang, J-C wu, "A Control Algorithm for Three-Phase Three-wired Active PowerFilters Under Nonideal Mains Voltages", IEEE Trans. Power Electron.,vol.14, no.4, pp.753,1999.[9] Suresh Kumar.K.S., "Simulation of an Active Power Filter Using Microsim Design Lab8.0", AICTE-ISTE Summer school on Recent trends in computer simulation of Electricalmachines and Control systems, pp.133, 2000.[10] L.A.Moran, Juan W. Dixon, R.R.Wallace, "A Three-Phase Active Power FilterOperating with Fixed Switching Frequency for Reactive Power and Current HarmonicCompensation", IEEE Trans. Ind. Electron., vol.42, no.4, pp.402, 1995[11] L.Benchatia, S.Saadate and A.Salem nia. "A Comparison of Voltage Source and CurrentSource Shunt Active Filter by Simulation and Experimentation", IEEE Trans. PowerSystems, vol. 14, no. 2. pp.642 , 1999.[12] Juan W.Dixon, J.J.Garcia, and Luis Moran, "Control System for Three-Phase ActivePower Filter Which Simultaneously Compensates Power Factor and Unbalanced Loads",IEEE Trans.Ind. Electron.,vol.42, no.6, pp.636, 1995[13] J.Sebastian Tepper, Juan W.Dixon, G.Venegas, and Luis Moran, "A Simple Frequency-Independent Method for Calculating the Reactive and Harmonic Current in a NonlinearLoad", IEEE Trans. Ind. Electron., vol.43.,no.6, 1996[14] C.K.Duffey, Ray P. Stratford, "Update of Harmonic Standard IEEE-519: IEEERecommended Practices and Requirements for Harmonic Control in Electric PowerSystems", IEEE Trans. Ind.Appli.,vol.25, no.6,nov/dec., 1989[15] M.Tarafdar Haque,T.Ise,S.H.Hosseini, “A Novel Control Strategy for Unified PowerQuality Conditioner (UPQC)”, 2002,IEEE

SK6 1

DYNAMIC VOLTAGE RESTORERS (DVR) AND THEIR CONTROLSuresh Kumar K.S

AP,EED,N.I.T Calicut

1. Introduction

Power quality has a significant influence on high-technology equipments related to communication,advanced control, automation, precise manufacturing technique and on-line service. For example, voltage sagcan have a bad influence on the products of semiconductor fabrication with considerable financial losses. Powerquality problems include transients, sags, interruptions and other distortions to the sinusoidal waveform. One ofthe most important power quality issues is voltage sag that is a sudden short duration reduction in voltagemagnitude between 10 and 90% compared to nominal voltage. Voltage sag is deemed as a momentary decreasein the rms voltage, with duration ranging from half a cycle up to one minute. Deep voltage sags, even ofrelatively short duration, can have significant costs because of the proliferation of voltage-sensitive computer-based and variable speed drive loads. The fraction of load that is sensitive to low voltage is expected to growrapidly in the coming decades. Studies have shown that transmission faults, while relatively rare, can causewidespread sags that may constitute a major source of process interruptions for very long distances from thefaulted point. Distribution faults are considerably more common but the resulting sags are more limited ingeographic extent. The majority of voltage sags are within 40%of the nominal voltage. Therefore, by designingdrives and other critical loads capable of riding through sags with magnitude of up to 40%, interruption ofprocesses can be reduced significantly. The DVR can correct sags resulting from faults in either the transmissionor the distribution system.

2. Basic Principle of DVR

To quantify voltage sag in radial distribution system, the voltage divider model, shown in Fig. 1, can beused on the assumption that the fault current is much larger than the load current during faults. The point ofcommon coupling (PCC) is the point from which both the fault and the load are fed. Voltage sag is mostlyunbalanced and accompanied by phase angle jump.

From Fig. 1, the voltage at the PCC and phase angle jump can be obtained by

The DVR is able to compensate the voltage sag especially at sensitive loads by injecting an appropriatevoltage through an injection transformer. Figure 2 shows a block diagram of the DVR power circuit. Whenexamining the DVR it can be divided into four component blocks:1) Energy storage device,2) DC to DC power controller,3) A three-phase voltage converter,4) Three single-phase series injection transformers.

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The design of the DVR allows real and reactive power to be either supplied or absorbed whenoperating. If a small fault occurs on the protected system, then the DVR can correct it using only reactive powergenerated internally. For correction of larger faults, the DVR may be required to develop real power. To enablethe development of real power an energy storage device must be used; currently the DVR design uses acapacitor bank. Once the fault has been corrected and the supply is operating under normal conditions, the DVRreplenishes the energy expended from the healthy system. The rating (in terms of energy storage capabilities) ofthe capacitor bank is dependent upon system factors such as the rating of the load that protects and the durationand depth of anticipated sags. When correcting large sag (using real power), the power electronics are fed fromthe capacitor bank via a DC-DC voltage conversion circuit.

The core element in DVR design is the three-phase voltage converter. This inverter utilizes solid-statepower electronics (insulated gate bipolar transistors, IGBTs) to convert DC to AC and back again duringoperation. The DVR connects in series with the distribution line through an injection transformer, actually threesingle-phase transformers. The primary side (connected into the line) must be sized to carry the full linecurrent.The primary voltage rating is the maximum voltage the DVR can inject into the line for a givenapplication.The DVR rating (per phase), is the maximum injection voltage times the primary current.The bridgeoutputs on the secondary are filtered before being applied to the injection transformer. The bridges areindependently controllable to allow each phase to be compensated separately. The output voltage wave shapesare generated by pulse-width modulated switching. When voltage sag reaches a value below the limit forcorrection using zero energy, the energy storage system within the DVR has to be used to aid voltage correction.

The ideal restoration is to make load voltages unchanged. When DVR restores large voltagedisturbances, active power or energy should be injected from DVR to distribution system. If the capability ofenergy storage of DVR were infinite, DVR could maintain load voltage unchanged ideally during any kind offaults. However, the stored energy in DVR is limited practically by the limit of DC link capacity of DVR.Namely, DVR cannot restore the load voltage constantly when the voltage across the DC link has gone downand stored energy has run out eventually during deep voltage sag with long duration. Therefore, it is necessaryto minimize energy injection from DVR.

There are several methods how to inject DVR mitigating voltage to distribution system: pre-sagcompensation, in-phase compensation, and phase advance

3. Conventional DVR voltage injection methods

The possibility of compensating voltage sag can be limited by a number of factors including finiteDVR power rating, different load conditions, and different types of voltage sag. Some loads are very sensitive tophase angle jump and others are tolerant to phase angle jump. Therefore, the control strategy depends on thetype of load character-istics . There are three distinguishing methods to inject DVR compensating voltage, thatis, pre-sag compensation method, in-phase compensation method, and phase advance method.

Pre-sag compensation methods is to track supply voltage continuously and compensate load voltageduring fault to pre-fault condition. Fig. 3 shows the single-phase vector diagram of the pre-sag compensation. In

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this method, the load voltage can be restored ideally, but injected active power cannot be controlled and isdetermined by external conditions such as the type of faults and load condition.

In in-phase compensation shown in Fig. 4, the injected DVR voltage is in phase with measured supplyvoltage regardless of the load current and the pre-fault voltage. The advantage of this method is that magnitudeof injected DVR voltage is minimized for constant load voltage magnitude.

Pre-sag compensation and in-phase compensation must inject active power to loads almost all the time.However, the amount of possible injection active power is confined to the stored energy in DC link, which isone of the most expensive components in DVR. Due to the limit of energy storage capacity of DC link, the DVRrestoration time and performance are confined in these methods. For the sake of controlling injection energy,phase advance method was proposed .

The injection active power is made zero by means of having the injection voltage phasor perpendicularto the load current phasor. This method can reduce the consumption of energy stored in DC link by injectingreactive power instead of active power. Reducing energy consumption means that ride-through ability isincreased when the energy storage capacity is fixed. On the other hand, the injection voltage magnitude of phaseadvance method is larger than those of pre-sag or in-phase method and the voltage phase shift can cause voltagewaveform discontinuity, inaccurate zero crossing, and load power swing. Therefore, phase advance methodshould be adjusted to the load that is tolerant to phase angle jump, or transition period should be taken whilephase angle is moved from pre-fault angle to advance angle:

4. A Three Phase DVR and its Control

A sample three phase DVR capable of maintaining the load voltage balanced and of constant amplitudeagainst flicker, harmonics, sags, swells and unbalance in supply and unbalance in load is discussed in theremaining part of this lecture.

The three phase inverter is made by three single phase inverters connected to star connected primary ofinterface transformer. The secondaries are connected in series in the lines.The three phase inverter rating is10kVA and the transformer has a turns ratio of 1:5.This means that the inverter can inject upto 20% of ratedvoltage in series with the supply.Inverter modulator will saturate after that and clip the injected voltage ataround 65V peak (assuming 320V peak phase voltage). The maximum load in the supply line is assumed to bearound 50kVA. The inverter uses sinusoidal PWM (unipolar switching) at 20kHz switching frequency. Thecontrol strategy is explained with reference to the diagram that follows.

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The load voltage is stepped down using PTs and a PLL is locked onto R phase.The pure sinewavephase synchronised to R phase goes into a Positive Sequence Constructor circuit (all pass filter based) whichgenerates unit amplitude positive sequence waves.These templates are multiplied by the desired amplitude(320V) to form the desired load voltage.The actual load voltage from the sensing circuit is subtracted from thisto form the reference signals into Inverter Modulator.The inverter injects the required voltage.The controlstrategy is feed-forward and hence is fast, but suffers from the disadvantage of not having any feedback.The DcSide is assumed to be a power source like a battery or a AC-DC converter running from same bus.Correctionstrategy is inphase and hence active power flow is involved.

The Simulink Simulation diagram for this system is given in the next page.

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The saturation block in this subsystem is set at ± 65 Volts to reflect the overmodulation limit of inverter. Thesimulation results are not included here due to space limitations. However the following comments are in order.i. Three simulation files (Simulink files) are included in the accompanying CDROM for this DVR. They are

“dvr_simple.mdl”, “dvr_filt.mdl” and “dvr_full.mdl”. The first one models the inverter as an ideal voltagecontrolled voltage source and can be used only to illustrate the concepts involved. The second one modelsthe inverter as an ideal voltage controlled voltage source but includes the filter at the output of theinverter.The third one includes the PWM switching also , but does not take care of the inverter losses.

ii. The first model will give very optimistic results under dynamic conditions – for example it will show thatthe output voltage is not even aware of a sudden phase change at input. This will not be true in practice. Thevarious unmodelled delays along with the inverter filter response time will really pass the sudden changesin the input voltages at least partially to the output side.

iii. The first model will yield a performance, which simply does not depend on the load current, since thismodel has no impedance anywhere. But in practice the output voltage will get affected by load harmonicsdue to two reasons – the inverter output filter will call for harmonic drops when harmonic load currentsflow through it and in the absence of feedback control the system does not correct anything to the right ofinverter. Secondly the finite bandwidth of inverter (due to a finite switching frequency) will make it fail ingenerating high frequency content produced at the source bus by high frequency component of loadcurrents flowing in source impedance (which is taken as zero in the first simulink model).

iv. When the amount of sag, swell or flicker or harmonic content is excessive the inverter will saturate and clipits output. This will lead to distortion in output voltage. But simulation runs reveal that this distortionremains under 10% even for sags which take source voltage to 100V peak. All three models include thisclipping effect.

v. The control of DVR is not a very complex problem and in fact field experience justifies feedforwardcontrol. However providing a suitable DC Side energy source to handle long periods of sag or swell orflicker throughout the day (like arc furnace) will be a problem. If it is a Battery it requires a charger. Someresearchers have proposed drawing charging power from the line using the same inverter during periodswhich sag or swell is little and can be handled by 90-degree voltage injection. But that makes the controlpretty complex. If it is a AC-DC Diode Rectifier the DVR can handle only sags and not swells since duringswells the inverter will absorb power (in the ‘inphase injection strategy’ considered here) and dump it onthe DC Side.So, then it has to be a Bilaterlal Converter based AC-DC Converter and then we get very closeto what they call a ‘Unified Power Quality Conditioner’ – then it is no more a DVR alone, but can easilybecome a UPQC.

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SIMULATION OF A SINGLE-PHASE ACTIVE POWER LINE CONDITIONER USING MICROSIM DESIGN LAB 8.0

Suresh Kumar.K.S.,Asst.Prof.,Dept. of Elect. Engg.,

N.I.T.,Calicut

1. Introduction

Deterioration of Power Quality due to the connection of a large number of non-linear loads inthe power system network has become a major concern world over in the recent years. Whenever a large load isswitched into or switched off from the network, a sag or swell of the supply voltage for 2 to 5 cycles is verycommon. Also, a sustained dip or rise in voltage level around 230V is common. To protect the voltage sensitivedevices from this kind of hazards, a voltage stabilizer is required which will not let the variation in supplyvoltage to affect the device by keeping the voltage across the device fixed.

The other way to look at the use of power quality conditioner is that due to increasing use ofelectronic devices, the quality of power is getting corrupted. This is because harmonics are injected into thesupply by the electronic/industrial electronic loads which are mostly non-linear in nature.

A single phase PWM Inverter based Active Power Quality Conditioner (APQC, sometimescalled Active Power Line Conditioner too) which can deliver clean, stable and regulated AC voltage to a criticalload working from an AC line which suffers from poor power quality including sags, swells, transients andharmonics is discussed in this lecture. This device takes care of the sags, swells as well as sustained voltagedip/rise in the supply. It also takes care of the power quality of the system by preventing the harmonics producedby the loads being injected into the supply and isolates the load from voltage harmonics that may be present inthe line.

2. Synchronous Link in Active Power Quality Conditioners (APQC)

2.1 Basic Principle Of a Synchronous LinkA PQC is essentially a synchronous link. Various topologies differ only in control strategies.

Consider two synchronous AC sources connected through a reactor i.e., a synchronous link.

Fig. 2.1 Synchronous Link

Assuming the reactor to be lossless, the active and reactive power equations can be found out as follows:

( )

( )

( )

−

∠−∠−∠=+∴

−∠−∠=

−∠=+

jX1V02V

1VjQP

*

jX1V02V*IBut,

*I1VjQP

αα

α

α

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Separating into real and imaginary parts,

The following factors can be observed from this :1) Real power flow P takes place from the leading bus to the lagging bus. It is proportional to sin α and it does

not depend much on the voltage difference |V1 – V2|.2) Reactive power flow takes place from the bus with higher voltage to the bus with lower voltage. It is

proportional to |V1 – V2| and does not depend much on α.

Fig. 2.2 Block diagram of the APQC

Thus, the inverter output voltage can be made constant even for varying source voltages bycontrolling the reactive power flow through the link reactor. This is the basic principle of the proposed PQC.When the supply voltage is low, a leading reactive power is drawn from the supply by the inverter in order tomake the inverter output voltage 230V. Similarly, when supply voltage is high, a lagging reactive power isdrawn.

The link reactor serves another purpose also. When any harmonic current is required for theload, most of it comes from the inverter side because the link reactor presents high impedance to harmonics. Thesupply current remains essentially sinusoidal even for non-linear loads.

Fig. 2.3 Equivalent circuit for current harmonics

In steady state, when the supply is present, the inverter supplies only reactive power. However,during the transient period (i.e., when load is switched on), the active power must also come from the inverter. Ifthe PQC is without backup, this drawing of active power will result in an appreciable dip in the capacitor voltagethat should be corrected immediately by drawing more active power from the source. So, the control of the PQCwithout backup should be very fast.

( ). smallfor

X2V1V1V

cos X

2V1V

X

21V

Q

sinX

2V1VP

αα

α

−=−=

=

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But if the PQC is having a backup, the DC side voltage will not dip even if the active power istaken from the inverter. This eases the control strategy. Even if the control is a bit slow, the buffering action ofthe battery will prevent the system from going haywire.

The PQC without backup can function only when the supply is present because it needs todraw active power from the supply to maintain its DC side voltage. But the PQC with backup can function evenwhen the supply is absent.

3. A Single Phase APQC without Battery Backup

3.1 Basic principle of Power Quality Conditioner The Active Power Quality Conditioner is expected to provide a constant amplitude sinusoidalvoltage to the load against a varying line input; all the while drawing a sinusoidal current even when the load isnon-linear. The principle of synchronous link power flow is used in the system.

Active power flows from leading bus to lagging bus in a synchronous link and it isproportional to lead angle (in radians) for small variations of current. Reactive power flows from higher voltagemagnitude bus to lower voltage magnitude bus and is roughly proportional to difference in voltage magnitudes.

In the APQC without Battery backup, one of the two AC sources is the AC mains voltagewhereas the other one is the output of the PWM sine wave inverter running from a DC voltage assumed to beavailable from a charged DC side capacitor. A link inductance L links them up and the load is connected acrossinverter output.

Fig. 3.1 Basic system

The line voltage (or its fundamental component if it is a distorted one) is the reference wave inthe system. The output synthesized by the inverter is adjustable in phase with respect to this reference wave byproper inverter gating control. Thus the power flow from mains to the load plus inverter combination can becontrolled by making the phase angle of the inverter output lagging with respect to line by varying amounts tosuit the requirement. Also, by suitable control of gating, it is possible to control the amplitude of the inverteroutput (and hence the load voltage). The reactive power flow in the link will adjust according to the line voltageconditions. For example, if the line has a low voltage and inverter output is maintained at a lower value, theinverter will automatically deliver the required amount of lagging reactive power to the line as per thesynchronous link power flow equation.

If the inverter is a loss-free one, the active power flow from the line into the inverter will gettranslated as an even increasing voltage in the DC side capacitor. Similarly, an active power flow out of theinverter will eventually take the DC side to zero voltage condition. It is necessary that the DC side capacitorvoltage be maintained at a fixed value (at least within a band around the nominal value) in order to synthesize arated amplitude sinusoidal output at the inverter for all load conditions. Practical constraints on the maximummodulation index achievable in a Sinusoidal pulse Width Modulated (SPWM) inverter will put the desired DCbus voltage in the range of 350 V to 370 V DC. Thus, in a loss-free inverter, the active power flow from the linemust be exactly equal to the active power required by the load and no active power must flow into or out of theinverter under steady state and the inverter must be able to draw/deliver active power when the DC side capacitorvoltage is to be corrected. This calls for a continuous adjustment of phase angle of inverter output conditionedupon the value of the DC side capacitor.

Usually the switches in the inverter will have diodes connected across them. At the time ofstartup, the DC side capacitor will charge up to the line voltage peak through the line inductor and these diodeslike in any ordinary rectifier circuit. After that the active power flow control will maintain the DC side voltage atthe desired value. If the inverter has losses, the active power flow control will maintain the power flow into theinverter at the right value such that the losses are met and there is no extra power left to upset the capacitorvoltage.

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A non-linear load draws a non-sinusoidal current. This current can come from two paths –from inverter and from line. The active fundamental component will come from line side as per the above logic.The reactive component may come from line or inverter or both depending upon the line voltage conditions. Andthe harmonic components of the load current will come from both line and inverter. If the inverter outputimpedance had been zero all the harmonic currents would have come from the inverter and hence line currentwould have been a pure sine wave. But the inverter output impedance will not be zero; hence part of theharmonic current flows in the mains line too and this will result in line current distortion as well as outputvoltage distortion. However, inverter impedance is small compared to link impedance and hence only a verysmall portion of total harmonic current generated by the load will flow through the line. It is possible to bringdown the distortion in both the line current and output voltage to less than 5% by proper control of inverteroutput filter impedance.

3.2 Control of PQC Essentially three types of control strategies are applicable to a PQC.The first is the phase angle control scheme. Here the controlled variable is DC side capacitor

voltage and the variable used for control is phase lag of inverter output with respect to line. A synchronous butphase shifted sine wave is synthesized from line and given as the reference input for inverter. Inverter is gated asper sinusoidal PWM logic or delta modulating logic to produce a constant amplitude sine wave output. Thephase of this output is controlled in such a way that DC side voltage is maintained constant. A PI control systemis used for this purpose and a voltage to phase angle converter implements the control finally. A secondarycontrol loop that senses the amplitude of inverter output and adjusts the amplitude against load variations may beneeded if tight control of regulation is required. But if regulation within ±5% is sufficient, such a loop can bedispensed with. The most important disadvantage of this control scheme is its slow response and prominentovershoots and undershoots in the DC side voltage and corresponding swells and sags in line current duringtransient conditions.

The second control strategy is direct current control of inverter i.e. it converts the voltagesource inverter into a current regulated PWM inverter. Two sinusoidal templates – one sinusoidal and in phasewith a.c. line and second sinusoidal and 900 leading w.r.t a.c. line i.e cosine – are generated from the a.c. lineusing a PLL based system. DC side voltage is sensed and compared with a set reference value. The resultanterror is used to amplitude modulate the sine wave template and the result will be the desired active component ofcurrent that the inverter has to draw from the line. Similarly, the inverter output voltage amplitude is sensed andcompared with a set reference value. The resultant error is used to amplitude modulate the cosine template. Theresult is the desired reactive current that the inverter has to draw. These two current references are added to formthe reference current for the inverter. The actual current in the inverter is fed back into a current control loop andthe inverter switches are gated in order to bridge the gap between the reference and the actual current byhysteresis control or unipolar switching scheme.

Considerable improvement in speed and accuracy results in this control scheme. However, thecurrent control loop can be difficult to compensate due to sharp changes in phase lag of inverter filter at about itsresonance frequency. Also this kind of feedback current control tends to be sensitive to noise pickup in thecurrent sensing process.

An indirect current control is used in the third control scheme. Assume that all impedancesbetween the AC line and DC side capacitor are precisely known. These include link inductance value, itsresistance, inverter filter impedance and inverter equivalent resistance. The reference current i.e., the current thatthe inverter must draw in order to maintain the DC side voltage and output voltage constant is calculated in thesame way as in the case of the second control scheme described above. If all impedances are known and the lineside voltage is known, the inverter internal output voltage required to make this current flow in the link can becalculated by adding the impedance drop to the line voltage. This calculation is done in real time in analogOpAmp circuits and the inverter voltage reference is created thereby. If all impedances are accurately known, theactual current will be equal to the reference current. However, due to error in parameter measurement/estimation,a current feedback loop will be needed in practice in this scheme too. But this feedback loop needs to have only asmall gain and need not be compensated at all. Also, if PI control is employed on capacitor voltage and outputvoltage, this minor current loop can be removed. Even if only proportional control is used everywhere, theallowed tolerances in regulation will make the current feedback unnecessary. Similarly, if link impedance is thedominant impedance, other impedances may be ignored in calculation at the expense of slight degradation ofoutput voltage regulation. This is the control scheme that is considered further in the sections that follow.

With the fundamental component of current flow in the AC side of the inverter, the DC sidecapacitor will have second harmonic current flow and resulting second harmonic ripple in the voltage across it.Size of this capacitor is selected to reduce this ripple. But when this capacitor voltage is sensed and comparedwith a set value, considerable filtering will be needed to avoid injection of third harmonic into the active currentreference. Such filtering makes a system sluggish and gain/phase margins also come down resulting inimpermissible overshoots and undershoots in the capacitor voltage. Hence, a sampling scheme with samplingperiod of 10ms is generally used to derive the capacitor voltage signal needed for control purpose. A similar

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sampling scheme senses the AC source voltage at peak and avoids filtering in that sensing path too. These twosampling processes make it possible to implement corrections in one half cycle, thereby permitting the use of alower value of capacitor than what would have been necessary otherwise. Further, the control schemecompensation is simpler with this sampling scheme.

3.2.1 Indirect Current Control Based APQC Control

From the block diagram (Fig. 3.2), it can be seen that, Inverter output voltage = AC supply voltage +Inductor drop =

dtdiL acV + where, “i” consists of active and reactive components.

To realize this, the supply voltage is peak sampled and compared with 230V reference. Thiserror is multiplied by the cosine template to give the reactive current reference. Likewise, the capacitor voltage issampled and compared with 350V reference. This error is multiplied by sine template through an analogmultiplier to give the active current reference. Adding these two currents, the current reference is obtained. Thiscurrent is differentiated with a gain of L so that L( di/dt) is obtained. This is added to the supply voltage to getthe output voltage.

In this scheme, there arises the need for DC offset control. The input AC source will notcontain any DC component but the synthesized AC provided by the inverter may contain DC. This may be due tothe fact that the switches are not identical and switching times are not similar. This DC will appear as a 50 Hzcurrent on the capacitor side. This 50 Hz current should ideally create a cosine ripple in the capacitor voltage thatwill give only a second harmonic in the inverter output. But because of the non linear relationship betweenvoltage and energy ( E = ½ CV2 ), an upper excursion of voltage of voltage ripple will be of lower magnitude

than the lower excursion. This will result in a 50 Hz sine content in capacitor voltage. The fundamental cosinecontent in capacitor voltage results in pure second harmonic in the output. But fundamental sine content incapacitor voltage results in further generation of DC content at the inverter output which will eventually belimited only by the total resistance present on the AC side. The DC current can be eliminated by giving a DCoffset to the inverter control voltage. The offset given is controlled by the magnitude of the DC current present inthe AC side. A low pass filter on the sensed inverter current measures this magnitude.

The inverter control voltage is obtained by adding this offset control voltage to the inverteroutput voltage. This control voltage is compared with the high frequency triangular wave to be used in SPWMscheme to provide gating signal to the MOSFETs/IGBTs.

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3.3 Simulation Model Of The Scheme3.3.1 Simulation of Control Dynamics

The model used for simulating the scheme is shown in the Fig.3.3. The supply line isrepresented by a 230V, 50Hz sine wave source. On the other side of the link inductor (which is represented by Land its related resistance R), the inverter is represented using an ABM block. The various hierarchical blocks andother elements used in the model are explained below.(a) Reactive Current Control Block

This hierarchical block is used to obtain the reactive current reference from the supply voltage.In this block, the scaled down supply voltage is peak sampled using a transistor that is switched at 10ms intervalsby a square wave generator (VPULSE) of 10us pulse width. This signal is held by a capacitor, inverted andadded with a 1V-amplitude reference voltage (which represents the 230V supply). The error is multiplied by theinductor impedance using an E-device. This is passed through a limiter and multiplied with the cosine template.The output of the multiplier is the required reactive current reference.

(b) Active Current Control Block

This hierarchical block is used to obtain the active current reference from the scaled down DCcapacitor voltage. The conversion scheme followed is same as in the previous case. However, the referencevoltage is 1.0937V (representing 350V DC). Also, after the limiter, the error signal is multiplied with the sinetemplate. The resultant signal is the active current reference.

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Fig. 3.4 Reactive Current Control Block

Fig. 3.5 Active Current Control Block

(c) Inverter Control Voltage Block

This hierarchical block is used to obtain the inverter modulation voltage from the active andreactive current references and the supply voltage. Here, the current references are added together anddifferentiated in a differentiator. This is added to the scaled down supply voltage and passed through a limiter.The output obtained is the inverter modulation voltage.

(d) PWM-Converter Model

This hierarchical block is used to calculate the output voltage of the inverter after filtering aswell as the capacitor current. The DC offset control is also calculated in this block and is added to the invertercontrol voltage. The top ABM block is used to calculate the inverter output voltage. Here, the inverter controlvoltage is multiplied with the DC capacitor voltage (referred to a 320V scale). The output is the required voltage.The bottom ABM block is used to calculate the DC side capacitor current. In this, the inverter output voltage(obtained from the first ABM block) is multiplied with the inverter output current (obtained from the H-device)and this is divided with the capacitor voltage. The resulting current is the capacitor current. The implied principleis one of instantaneous power balance between DC side power and output side power in the inverter, neglectingthe losses in the inverter and changes in energy storage in the inverter output filter components.

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Fig.3.6 Inverter Control Voltage Block

Fig.3.7 PWM Converter Model

(e) Load

A non-linear load consisting of a rectifier and an R-L load connected in parallel is contained inthis hierarchical block. Either the R-L load or the rectifier load was made active at various instants for differentsimulation runs using switch models available in PSpice.

(f) Perturbation AC

The perturbations in the supply are introduced by multiplying two voltage sources (VSIN) andadding this to the original source voltage. Such an arrangement can produce different source disturbancesincluding an amplitude-modulated wave.

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Fig.3.8 Load Circuit Model

Fig. 3.9 Perturbation AC

3.4 Analysis Of Waveforms Obtained From SimulationA PQC based on the above models was simulated using Microsim Pspice (Design Lab 8.0)

package. The results of simulation studies are included in the sections that follow. The system simulated had thefollowing parameters.

Rating - 500VA, Input –Single Phase 170 t0 270 V, Output – 230 ±5% VInverter Loss Resistance – 3 ohms , Inverter Output Filter Inductance – 4mHOutput Filter Capacitances – 1uF in parallel with series combination of 1uF & 100 ohmsLink Inductor – 96mH with 2 ohms resistanceInverter Details – Single Phase Full Bridge MOSFET Inverter using IRFP450 MOSFETsInverter Modulation Scheme – Unipolar Sinusoidal Modulation at 20kHz

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3.4.1 Simulation of control dynamics for various load conditions

Case 1 : Rms. line voltage 230V with 500VA R-L load of 0.6 p.f switched on at 100 msFigure 3.4.1 show the source voltage, output voltage, source current, load current, inverter

current and capacitor voltage. Before the load is switched on, a very small source current is drawn in order tosupply the inverter losses. The load gets switched on immediately after the sampling of the capacitor voltage hasbeen done. So for the next 10ms, the active current reference cannot change. The capacitor has to supply thepower during this time. This explains the dip in capacitor voltage at 100ms. At 110ms, the capacitor voltage issampled and the active current reference changes accordingly. This change in active current reference causesphase shift in the inverter output voltage resulting in current flowing through the link inductor.

At the time of sensing (110ms), the capacitor voltage was at the lowest point. So active currentreference is made somewhat larger resulting in a high source current than required. The next cycle of loadcurrent will be then somewhat lower. These oscillations in source current and capacitor voltage will be dampedout in a few cycles.

The capacitor voltage has a 100 Hz ripple that occurs because of the 100 Hz ripple in thepower on the AC side. A steady state error in the capacitor voltage can also be seen. This happens because onlyproportional control has been used.

In steady state, the inverter is supplying all the reactive power. This is evident from the factthat the inverter output voltage and output current are at a phase shift of 90 degrees.

Fig. 3.4.1 Waveforms for Case 1

Case 2 : Rms line voltage changes from 230 V to 170 V at 200ms with R-L load switched on at 40ms.Figure 3.4.2 shows the source voltage, output voltage, source current, load current and inverter

current. The waveforms similar behaviour as in the previous case when the load is switched on. Source voltagedecreases to 170V at 200ms. But this dip in source voltage is not recognized instantaneously by the reactivecurrent reference block because the next sampling of source voltage will take place only at 205ms. So thereactive current will continue to be the same resulting in the inverter output voltage following the source. At205ms, the reactive current reference will change which results in a sudden rise in the inverter output voltage.This sudden rise will appear as a step input to the LC filter resulting in some oscillations in the output.

The link inductor current will change at 205ms reflecting the change in the reactive currentreference.

The inverter output current, after 205ms, shows that the inverter is supplying both the laggingreactive power needed by the load and the lagging reactive power required for making the output voltageconstant. For power balance, as voltage decreases, the inverter and link current increase.

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Fig. 3.4.2 Waveforms for Case 2

Case 3 : Rms line voltage changes from 230V to 270V at 200ms with R-L load switched on at 40ms.

Fig. 3.4.3 Waveforms for Case 3Figure 3.4.3 shows the source voltage, output voltage, source current, load current and inverter current.

This is similar to the previous case except in the inverter current after 205ms. The leading reactive powerrequirement for making the output voltage constant cancels out the lagging reactive power requirement of theload. Hence the inverter output current is almost zero.

SK7 12

The source current after 205ms is leading the inverter output voltage keeping the outputvoltage at 230V.

Case 4 : Rms line voltage = 230V with 300W rectifier load switched on at 40ms.Figure 3.4.4 shows the output voltage, link current, the load current and the inverter current.

The waveforms are shown from 100ms to 160ms. Output voltage shows clipping at its peak because at thismoment, the diodes conduct and the output voltage is the same as the capacitor voltage which cannot changeinstantaneously. Small filter oscillations can be observed in the output waveform when the diodes of therectifier stop conducting. For damping the oscillations, a coupling capacitor with a resistor is used.

The input current waveform remains appreciably sinusoidal even with the load current being ofpulse nature. The THD of the input current was calculated and it was found to be well within the accepted limitof 5%. See Table 1

Fig. 3.4.4 Waveforms for Case 4

Table. 1Harmonic Analysis of Currents and Voltages – Case 4

50 Hz 150 Hz 250 Hz 350 Hz 450 Hz THD(%)Source Current(A) 1.71 .0471 - - - 2.75Load Current(A) 1.6 1.39 0.986 0.586 0.240 113.6Inverter Current(A) 0.17 1.36 0.983 0.576 0.237 1068.6Output Voltage(V) 312.6 3.0 2.9 - - 1.3

The inverter supplies both the reactive power and the current harmonics. This ismanifested in the output current waveform of the inverter. The small oscillations seen are filter oscillations.Case 5 : Rms line voltage changes from 230V to 170V at 200ms with rectifier load switched on at 40ms.

Figure 3.4.5 shows source voltage, output voltage, link current, load current and invertercurrent. After 40ms, the output voltage shows some clipping at the peak which was already explained. When theline voltage changes at 200ms, the corresponding adjustment in the output voltage takes place only at 205ms aswas previously explained.

SK7 13

Till 40ms, the inverter output current was almost zero. From 40ms to 50ms, the invertersupplies the active power to the load. From 50ms to 205ms the inverter supplies the harmonic current as well asthe reactive power required by the load. From 205ms onwards, the decrease in the source voltage causes theinverter to supply the extra reactive power required to make the output voltage 230V.This explains the invertercurrent waveform.

The source current waveform remains more or less sinusoidal in this case also. The THD hasbeen calculated and was found to be less than 5% (Table 2). The capacitor voltage waveform shows the fact thatthe reactive and harmonic currents are supplied from the inverter.

Fig. 3.4.5 Waveforms for Case 5 and the details in the figure below

Table. 2Harmonic Analysis of Voltages and Currents – Case 5

50 Hz 150 Hz 250 Hz 350 Hz THD(%)SourceCurrent(A) 2.0 0.036 0.0325 - 2.43LoadCurrent(A) 1.56 1.29 0.88 0.489 104.89

SK7 14

InverterCurrent(A) 1.03 1.24 .897 0.483 155.81OutputVoltage(V) 320 2.53 - - 0.79

Case 6 : Rms line voltage changes from 230V to 270V at 200ms with rectifier load switched on at 40ms.Figure 3.4.6 shows the source voltage, output voltage, and link current, load current and the

inverter current. Up to 200ms, the waveforms are similar to those in case 5. After 200ms, the inverter willsupply leading reactive power in order to make the output voltage 230V. This explains the source current andinverter current waveforms. An expanded view of the above waveforms after the change in voltage is shown inFigure 3.4.6 (Details).

Fig. 3.4.6 Waveforms for Case 6Table. 3

Harmonic Analysis of Voltages and Currents – Case 6

50 Hz 150 Hz 250 Hz 350 Hz THD(%)Source Current 1.6 0.05 - - 3.125Load Current 1.47 1.24 0.844 0.489 107.32Inverter Current 0.617 1.24 0.84 0.483 255.05Output Voltage 320.0 3.86 - - 1.2

SK7 15

Fig. 3.4.6(Details)

Case 7 : Rms line voltage changes from 170Vto 270V continuously (Amplitude Modulated wave) with R-L load.Figure 3.4.7 shows the source voltage, output voltage and link current. Link current is lagging

when source voltage is high and leading when the source voltage is low.One interesting observation is made here. The maximum value of the inverter output voltage

occurs when the supply voltage is minimum. Similarly, the minimum value of the inverter output voltage occurswhen the source voltage is maximum. In other words, the system is over-compensated. This over-compensationcomes from the DC offset control mechanism. The low pass filter used to extract the DC current will pass someamount of the 50 Hz component also (around 2%). This will result in the inverter control voltage beingsomewhat over-compensated.

Fig. 3.4.7 Waveforms for Case 7

===============

SDP 1

VARIABLE IMPEDANCE TYPE STATIC SERIES COMPENSATORS

Subha D. PuthankattilLecturer, EEDNITC

SERIES COMPENSATIONAt a particular transmission voltage, the

transmission of power is determined by the series lineimpedance and the angle between the end voltages ofline i.e., power flow is limited by the series reactiveimpedance of the line. To increase the transmittablepower, series capacitive compensation was introducedto cancel a portion of the reactive line impedance. Butwith the upcoming of FACTS, it is seen that variableseries compensation is effective in controlling thepower flow in the line and improving the stability.Hence controllable series line compensation helps incontrolling the power flow in the lines, prevent theloop flows and also minimises the effect of systemdisturbances. The effect of series compensation onvoltage stability, transient stability power oscillationdamping and sub synchronous oscillation damping isbeing analysed.

Series Capacitive Compensation

Series capacitive compensation is providedto decrease the overall effective series transmissionimpedance from the sending end to the receiving end.Consider a simple two-machine model with a seriescapacitor compensated line, assumed to be composedof two identical segments.

Refer fig.1

The magnitude of the total voltage across the seriesline inductance is increased by the magnitude of theopposite voltage, Vc developed across the seriescapacitor.The effective transmission impedance Xeff with theseries capacitive compensation is given by

Xeff = X - Xc

Xeff = (1-k) X

Where k is the degree of series compensation,

i.e., K = Xc/X 0 ≤ k < 1

Assuming Vs = Vr = V, the current in thecompensated line and the corresponding real powertransmitted is,

( ) 2sin

12 δXk

VI−

=

δsin)1(

2

Xk

VVmIP

−==

The reactive power supplied by the series capacitor is,

( ) ( )δcos11

22

22 −

−==

kk

XVXIQc c

Refer fig. 2.

It is observed that the transmittable power rapidlyincreases with the degree of series compensation k.Similarly, reactive power supplied by the seriescapacitor also increases sharply with k and varieswith angle δ in a similar manner as the line reactivepower.

Voltage stability

Series capacitive compensation can be usedto reduce the series reactive impedance to minimisethe receiving-end voltage variation and the possibilityof voltage collapse. A simple radial system withfeeder line reactance X, series compensatingreactance Xc and load impedance Z is shown.

Refer Fig. 3

The normalised terminal voltage Vr versus power Pplots with unity power factor load at 0, 50, 75% seriescapacitive compensation are shown.

Refer Fig.4

Both shunt and series capacitive compensation caneffectively increase the voltage stability limit. Shuntcompensation does it by supplying the reactive loaddemand and regulating the terminal voltage. Seriescapacitive compensation does it by cancelling aportion of the line reactance. For increasing thevoltage stability limit of overhead transmission, series

SDP 2

compensation is much more effective than shuntcompensation.

Improvement of transient stability

Series line compensation can be utilizedmore effectively to increase the transient stabilitylimit and to provide power oscillation damping.

Consider the system with the seriescompensated line in Fig 1 for the analysis. The prefault and post fault systems are assumed to be thesame for the series compensated case. It transmits thesame power with and without series compensation.Assume that both the uncompensated and the seriescompensated systems are subjected to the same faultfor the same period of time. Prior to the fault both ofthen transmit power Pm at angles δ1 and δs1respectively.

Refer Fig.5

During the fault, the transmitted electric powerbecomes zero while the mechanical input power tothe generators remains constant, Pm. Therefore, thesending-end generator accelerates from the steadystate angle δ1 and δs1 to angles δ2 and δs2 respectively,when the fault clears. The accelerating energies arerepresented by areas A1 and As1. After fault clearing,the transmitted electric power exceeds the mechanicalinput power and therefore the sending-end machinedecelerates. However, the accumulated kineticenergy further increases until a balance between theaccelerating and decelerating energies, represented byareas A1, As1, and A2, As2, respectively, is reached atthe maximum angular swings, δ3 and δs3 ,respectively. The areas between the P versus δ curveand the constant Pm line over the intervals defined byangles δ3 and δcrit, and δs3 and δscrit, respectively,determine the margin of transient stability,represented by areas Amargin and Asmargin. The increaseof transient stability margin is proportional to thedegree of series compensation.

Power oscillation damping

Controlled series compensation can be appliedeffectively to damp power oscillations. It isnecessary to vary the applied compensation for poweroscillation damping so as to counteract theaccelerating and decelerating swings of the disturbedmachines. That is, when the rotationally oscillatinggenerator accelerates and angle δ increases

> 0dtdδ

, the electric power transmitted must be

increased to compensate for the excess mechanicalinput power. Conversely, when the generator

decelerates and angle δ decreases

< 0dtdδ

, the

electric power must be decreased to balance theinsufficient mechanical input power.

Subsynchronous Oscillation Damping

The interactions between a series capacitorcompensated transmission line oscillating at thenatural resonant frequency, and the mechanicalsystem of a turbine-generator set in torsionalmechanical oscillation results in negative dampingwith the consequent mutual reinforcement of theelectrical and mechanical oscillations. A capacitor inseries with the total circuit inductance of thetransmission line forms a series resonant circuit with

the natural frequency of XXf

LCf cc ==

π21

Where Xc is the reactance of the series capacitor andX is the total reactance of the line at the fundamentalpower system frequency f. Since the degree of series

compensation XXck = is usually in the 25 to 75 %

range, the electrical resonant frequency fe is less thanthe power frequency f. If the electrical circuit isbrought into oscillation then the subharmoniccomponent of the line current results in acorresponding subharmonic field in the machinewhich, as it rotates backwards relative to the mainfield (since fe < f), produces an alternating torque onthe rotor at the difference frequency of f – fc. Ifthis difference frequency coincides with one of thetorsional resonances of the turbine generator sets,mechanical torsional oscillation is excited, which,inturn, further excites the electrical resonance. Largegenerators with multistage steam turbines, whichhave multiple torsional modes with frequencies belowthe power frequency, are more susceptible tosubsynchronous resonance with series capacitorcompensated transmission lines.

Hence it is seen that the series compensator is mainlyrequired to solve the power flow problems. Theproblems may be either due to the electric length ofthe line or the structure of the transmission network.The power transmission requirements due to theelectric length of the line can be solved by fixed

SDP 3

compensation of the line. Network structure relatedproblems as well as parallel and loop power flowsresulting in power flow unbalance require controlledseries compensation. Both fixed and controlled seriescapacitive compensation can be used to minimize theend voltage variation of radial lines and preventvoltage collapse. Series compensation also helps inimproving transient stability for post fault systemsand is also highly effective in power oscillationdamping. The functional requirement to be met bycontrolled series compensation can be achieved byboth thyristor controlled impedance type andconverter based voltage source type compensators.

Different Approaches To ControllableSeries Compensation

The series compensator is a reciprocal of the shuntcompensator. The basic reference parameter in shuntcompensation is the transmission voltage and it is theline current in case of series compensation. Theshunt compensator is functionally a controlledreactive current source which is connected in parallelwith the transmission line to control its voltage. Theseries compensator is functionally a controlledvoltage source which is connected in series with thetransmission line to control its current. The seriescompensator can be implemented either as a variablereactive impedance or as a controlled voltage sourcein series with the line.

Variable Impedance Type SeriesCompensators

The two schemes involved are1. Thyristor-switched / controlled-

capacitors2. Thyristor-controlled reactors with fixed

capacitors

They are1. GTO Thyristor-Controlled Series

Capacitor (GCSC)2. Thyristor-Switched Series Capacitor

(TSSC)3. Thyristor-Controlled Series Capacitor

(TCSC)

1. GTO Thyristor Controlled SeriesCapacitor (GCSC)

An elementary GTO Thyristor-Controlled SeriesCapacitor consists of a fixed capacitor in parallel with

a GTO Thyristor Valve that has the capability to turnon and off upon command.

Refer Fig. 6

The objective of the GCSC scheme is to control theac voltage vc across the capacitor at a given linecurrent i. When the GTO valve, sw, is closed, thevoltage across the capacitor = o, and when the valveis opened, it is maximum. For controlling thecapacitor voltage, the closing and opening of thevalve is carried out in each half cycle in synchronismwith the ac system frequency. The GTO valve isstipulated to lose automatically whenever thecapacitor voltage crosses zero. However, the turn-offinstant of the valve in each half cycle is controlled bya delay angle γ (0 ≤ γ ≤ π / 2), with respect to the peakof the line current.

Refer Figure 7

When the valve sw is opened at the crest of the linecurrent, the resultant capacitor voltage vc will be thesame is that obtained in steady state with apermanently open switch. When the opening of thevalve is delayed by the angle γ with respect to thecrest of the line current, the capacitor voltage can beexpressed with the defined line current, i(t) = I cos ωt,as follows:

)sin(sin)(1)( γωω

ωγ −== ∫ t

CIdtti

Ctv t

c

Since the valve opens at γ and stipulated to close atthe first voltage 0, is valid for the integral γ ≤ ωt ≤π -γ. For subsequent positive half cycle intervals thesame expressions remains valid. For subsequentnegative half cycle intervals, the sign of theterms in the above equations becomesopposite.

It is evident that the magnitude of the capacitorvoltage can be varied continuously by the method ofturn off delay angle control from maximum (γ = 0) to

0

=

2πγ . The adjustment of the capacitor

voltage is discrete and can take place onlyonce in each half cycle.

Refer Fig. 8

The GCSC is stipulated to close at voltage zero. TheGCSC is controlled by a turnoff delay with respect tothe peak of the line current, which defines the

SDP 4

blocking interval of the valve. The GCSC controlsthe voltage developed by a constant current sourceacross a fixed capacitor, thereby presenting a variablereactive impedance to the source. The amplitude VCF

(γ) of the fundamental capacitor voltage vCF(γ) can beexpressed as a function of angle γ.

−−= γ

πγ

πωγ 2sin1211)(

CVCF

where I is the amplitude of the line current, c is thecapacitance of the GTO Thyristor ControlledCapacitor and ω is the angular frequency of the acsystem.

The variation of the amplitude VCF(γ) normalized tothe maximum voltage is shown plotted against delayangle γ.

Refer Fig. 9

On the basis of the figure, varying the fundamentalcapacitor voltage at a fixed line current, could beconsidered as a variable capacitive impedance. Aneffective capacitive impedance Xc can be found for agiven value of angle γ . That is,

−−= γ

πγ

πωγ 2sin1211)(

CXc

The admittance Xc(γ) varies with γ in the samemanner as the fundamental capacitor voltage VCF (γ).In practical application the GCSC can be operatedeither to control the compensating voltage, VCF(γ), orthe compensating reactance, Xc(γ).

The turn-off delay angle control of the GCSCgenerates harmonics. For identical positive andnegative voltage half cycles, only odd harmonics aregenerated. The magnitudes of the harmonicsgenerated by GCSC can be attenuated effectively bythe complementary application of the method ofsequential control. It requires the use of m-seriesconnected GCSCs each with 1/m of the total ratingrequired. All but one of m capacitors are sequentiallycontrolled to be inserted or bypassed.

Refer Fig. 10

2. Thyristor-Switched SeriesCapacitor (TSSC)

TSSC consists of a number of capacitors eachshunted by an appropriately rated bypass valvecomposed of a string of reverse parallel connectedthyristors in series.

Refer Fig. 11

The degree of series compensation in TSSC iscontrolled in a step like manner by increasing ordecreasing the number of series capacitors inserted.A capacitor is inserted by turning of and it isbypassed by turning on the corresponding thyristorvalve.

A thyristor valve commutates naturally. A capacitorcan be inserted into the line by the thyristor valveonly at the zero crossings of the line current. Sincethe insertion takes place at line current zero, a fullhalf cycle of the line current will charge the capacitorfrom zero to maximum and the successive, oppositepolarity half cycle of the line current will discharge itfrom this maximum to zero.

Refer Fig. 12

The capacitor insertion at line current zero results in adc offset voltage which is equal to the amplitude ofthe ac capacitor voltage. In order to minimize theinitial surge current in the valve, and thecorresponding circuit transient, the thyristor valveshould be turned on for by pass only when thecapacitor voltage is zero. With the prevailing dcoffset, this requirement can cause a delay of upto onefull cycle, which would set the theoretical limit forthe response time of the TSSC. The TSSC cancontrol the degree of series compensation by eitherinserting or bypassing series capacitors but it cannotchange the natural characteristic of the classical seriescapacitor compensated line. That is a sufficientlyhigh degree of TSSC compensation could causesubsynchronous resonance just as well as an ordinarycapacitor. In principle the TSSC switching could bemodulated to counteracts subsynchronousoscillations. The TSSC could be applied for powerflow control and for damping power oscillation wherethe required speed of response is moderate.

3. Thyristor-Controlled SeriesCapacitor (TCSC)

TCSC consists of the series compensating capacitorshunted by a thyristor controlled reactor.

Refer Fig. 13

In a practical TCSC implementation several suchbasic compensators may be connected in series toobtain the desired voltage rating and operatingcharacteristics. The TCSC scheme provides a

SDP 5

continuously variable capacitor by means of partiallycanceling the effective compensating capacitance bythe TCR. The steady state impedance of the TCSC isthat of the parallel LC circuit, consisting of a fixedcapacitive impedance, Xc, and variable inductiveimpedance XL(α), that is,

CL

LCTCSC XX

XXX−

=)(

)()(α

αα

where from

.)(,sin2

)( ∞≤≤−−

= αααπ

πα LLLL XXXX

XL = ωL and α is the delay angle measured from thecrest of the capacitor voltage.

The TCSC, with partial conduction of the TCR,injects harmonic voltages into the line. Theseharmonic voltages are caused by the TCR harmoniccurrents which circulate through the seriescompensating capacitor. The harmonic voltagescorresponding to these currents in a TCSC circuit areclearly dependent on the impedence ratio of the TCRreactor to the series capacitor, XL/XC.

Subsynchronous Characteristics

Series capacitive line compensation can causesubsynchronous resonance when the series capacitorresonates with the total circuit inductance of thetransmission line at a subsynchronous frequency, fe =f – fm. An effective method for the damping ofsubsynchronous oscillations lead to NGH Damper.

The NGH Damper is basically a thyristor controlleddischarge resistor operated synchronously with thepower system frequency in the region near the end ofthe half cycle on the capacitor voltage.

Refer Fig. 14

The basic principle of the NGH Damper is to forcethe voltage of the series capacitor to zero at the end ofeach half period if it exceeds the value associatedwith the fundamental voltage component of thesynchronous power frequency. Thesimilarity between the NGH Damper and theTCSC circuit is, the former being composed of athyristor controlled resistor and the latter of athyristor controlled reactor both in parallel with theseries compensating capacitor. The TCSC circuitexhibits the impedance characteristic of an inductor atsubsynchronous frequencies whereas the NGHDamper with actual energy dissipation establishes

resistive characteristic for the series capacitor. TCSCis substantially neutral to subsynchronous resonanceand would not aggregate subsynhronous oscillations.

Basic operating control schemes forGCSC TSSC and TCSC

The function of the operating or internal control ofthe variable impedance type compensator is toprovide appropriate gate drive for the thyristor valveto produce the compensating voltage or impedancedefined by a reference. The internal control operatesthe power circuits of the series compensator, enablingit to function in a self sufficient manner as a variablereactive impedance. Thus the power circuit of theseries compensator together with the internal controlcan be viewed as an impedance amplifier, the outputof which can be varied from the input with a lowpower reference signal. The reference to the internalcontrol is provided by the external or system controlwhose function is to operate the controllable reactiveimpedance. The external control receives a lineimpedance, current, power or angle reference and,within measured system variables, derives theoperating reference for the internal control.

Structurally the internal controls for the three variableimpedance type compensators (GCSC, TCSC, TSSC)could be similar. Their function is simply to definethe conduction and / or the blocking intervals of thevalve in relation to the fundamental frequencycomponent of the line current. This requires theexecution of three basic functions: synchronization tothe line current, turn-on or turn-off delay anglecomputation and gate signal generation. Threepossible internal control schemes are discussed: onefor the GCSC and the other two for the TCSC powercircuit arrangements.

An internal control scheme for the GTO controlledseries capacitor scheme is shown.

Refer Fig. 15

It has four basic functions.

The first function is synchronous timing provided bya face-locked loop circuit that runs in synchronismwith the line current. The second function is thereactive voltage or impedance to turn-off delay angleconversion. The third function is the determination ofthe instant of valve turn-on when the capacitorvoltage becomes zero. The fourth function is thegeneration of suitable turn-off and turn-on pulses forthe GTO valve.

SDP 6

The operation of the GCSC power circuitand internal control is illustrated by the followingwave forms.

Refer Fig. 16

The main consideration for the structure ofthe internal control operating the power circuit of theTCSC is to ensure immunity to subsynchronousresonance. It follows two basic control philosophies.One is to operate the basic phase-locked-loop (PLL)from the fundamental component of the line-current.In order to achieve this it is necessary to providesubstantial filtering to remove the super and thesubsynchronous components from the line currentand at the same time maintain correct phaserelationship for proper synchronization. The internalcontrol scheme of this type is shown below.

Refer Fig. 17

In this arrangement the conventionaltechnique of converting the demanded TCR currentinto the corresponding delay angle, which ismeasured from the peak of the fundamental linecurrent, is used. The reference for the demandedTCR current is usually provided by regulation loop ofthe external control, which compares the actualcapacitive impedance or compensating voltage to thereference given for the desired system operation.

The second approach also employs a PLL,synchronize to the line current for the generation ofthe basic timing reference. In this method, the actualzero crossing of the capacitor voltage is estimatedfrom the prevailing capacitor voltage and line currentby an angle correction circuit. The delay angle isthen determined from the desired angle and theestimated correction angle so as to make the TCRconduction symmetrical with respect to the expectedzero crossing as shown below.

Refer Fig. 18

The desired delay angle in this scheme canbe adjusted by a closed loop control phase shift of thebasic time reference provided by the PLL circuit. Thedelay angle of the TCR and the compensatingcapacitive voltage is controlled over all by aregulation loop of the external control in order tomeet system operating requirements. The secondapproach is theoretically more likely to provide fasterresponse.

SDP 7

Fig. 1Two Machine power system with series capacitive compensation (a) Corresponding phasor diagram (b)

Fig. 2Real power and series capacitor reactive power vs. angle characteristics

SDP 8

Fig. 3Transmittable power and voltage stability limit of a radial transmission line as function of series capacitive

compensation

Fig. 4

SDP 9

Fig. 5Equal area criterion to illustrate the transient margin for a simple two-machine system (a) without compensation and

(b) with a series capacitor

Fig. 6Basic GTO -Controlled Series Capacitor

SDP 10

Fig. 7Principle of turn-off delay angle control

Fig. 8Attainable compensating voltage waveform

SDP 11

Fig. 9Fundamental component of the series capacitor voltage Vs the turn off delay angle γ

Fig. 10Wave illustrating method of controlling four series -connected GCSC banks "sequentially "to achieve harmonic

reduction

SDP 12

Fig. 11Basic Thyristor -Switched Series Capacitor scheme

Fig. 12Illustration of capacitor offset voltage resulting from the restriction of inserting at zero line current.

Fig. 13Basic Thyristor- Controlled Series Capacitor scheme

SDP 13

Fig. 14Basic NGH SSR Damper

Fig. 15Functional internal control scheme for the GCSC

Fig. 16Associated waveforms illustrating the basic operating principle

SDP 14

Fig. 17A functional internal control scheme for the TCSC based on the synchronization

to the fundamental component of the line current

Fig.18A functional internal control scheme for the TCSC based on the

prediction of the capacitor voltage zero crossings

EPC2 1

Variable Impedance Type Static Shunt Var CompensatorsElizabeth P Cheriyan Lecturer, EED NITC

Objectives Of Shunt CompensationThe ultimate objective of applying reactive shunt

compensation in a transmission system is to increasethe transmittable power. This may be required toimprove the steady-state transmission characteristics aswell as the stability of the system. It has long beenrecognized that the steady-state transmittable power canbe increased and the voltage profile along the linecontrolled by appropriate reactive shunt compensation.The purpose of this reactive compensation is tochange the natural electrical characteristics of thetransmission line to make it more compatible with theprevailing load demand. Thus, shunt connected, fixedor mechanically switched reactors are applied tominimize line over voltage under light load conditions,and shunt connected, fixed or mechanically switchedcapacitors are applied to maintain voltage levels underheavy load conditions. Var compensation is thus usedfor the following objectives:

• Midpoint Voltage Regulation for LineSegmentation

• End of Line Voltage Support to Prevent VoltageInstability

• Improvement of Transient Stability• Power Oscillation Damping

Controllable Var GenerationBy definition, capacitors generate and reactors

(inductors) absorb reactive power when connected to anac power source. Using appropriate switch control, thevar output can be controlled continuously frommaximum capacitive to maximum inductive output ata given bus voltage. More recently gate turn-offthyristors and other power semiconductors with internalturn-off capability have been used in switchingconverter circuits to generate and absorb reactivepower without the use of ac capacitors or reactors.These perform as ideal synchronous compensators(condensers), in which the magnitude of the internallygenerated ac voltage is varied to control the var output. Allof the different semiconductor power circuits, with theirinternal control enabling them to produce var outputproportional to an input reference, are collectivelytermed static var generators (SVG). Thus, a static varcompensator (SVC) is a static var generator whoseoutput is varied so as to maintain or control specificparameters (e.g., voltage, frequency) of the electric powersystem. a static var generator becomes a static varcompensator when it is equipped with special external(or system) controls which derive the necessary

reference for its input, from the operatingrequirements and prevailing variables of the powersystem, to execute the desired compensation of thetransmission line.

Modern static var generators are based on high-power semiconductor switching circuits. These switchingcircuits inherently determine some of the importantoperating characteristics, such as the applied voltageversus obtainable reactive output current, harmonicgeneration, loss versus var output, and attainableresponse time, setting limits for the achievableperformance of the var generator and, independent ofthe external controls used, ultimately also that of thestatic var compensator. The two types of static vargenerator presently used are: (i) those which employthyristor-controlled reactors with fixed and/or thyristor-switched capacitors to realize variable reactive impedanceand (ii) those, which employ a switching, power converterto realize a controllable synchronous voltage source.Here we will see the first case ie. Variable ImpedanceType Static Var Generators. The performance and operatingcharacteristics of the impedance type var generators aredetermined by their major thyristor-controlledconstituents: the thyristor-controlled reactor and thethyristor-switched capacitor. Based on this five suchdevices are discussed here.

The Thyristor-Controlled and Thyristor-SwitchedReactor (TCR and TSR)

An elementary single-phase thyristor-controlledreactor (TCR) is shown in Figure 1(a). It consists of afixed (usually air-core) reactor of inductance L, and abi-directional thyristor valve (or switch) sw. In apractical valve many thyristor (typically 10 to 20) areconnected in series to meet the required blocking voltagelevels at a given power rating. A thyristor valve can bebrought into conduction by simultaneous applicationof a gate pulse to all thyristors of the same polarity.The valve will automatically block immediately afterthe ac current crosses zero, unless the gate signal isreapplied.

The current in the reactor can be controlledfrom maximum (thyristor valve closed) to zero(thyristor valve open) by the method of firing delayangle control. That is, the closure of the thyristorvalve is delayed with respect to the peak of theapplied voltage in each half-cycle, and thus theduration of the current conduction intervals iscontrolled.

EPC2 2

Fig 1 (a) Basic thyristor -controlled reactor(b) Firing Delay angle Control (c) Operating waveforms.

This method of current control is illustratedseparately for the positive and negative current half-cycles in Figure 1(b), where the applied voltage v andthe reactor current iL(α), at zero delay angle (switchfully closed) and at an arbitrary α delay angle, areshown. When the gating of the valve is delayed by anangle π/2)αα(0 ≤≤ with respect to the crest of thevoltage, the current in the reactor can be expressed withv (t) = V cos tω as follows:

Since the valve automatically turns off at theinstant of current zero crossing (which, for a losslessreactor, is symmetrical on the time axis to the instant ofturn-on with respect to the peak of the current), thisprocess actually controls the conduction interval (or angle)of the thyristor valve. That is, the delay angle α defines theprevailing conduction angle σ: σ = π — 2α. Thus, as thedelay angle a increases, the correspondingly increasingoffset results in the reduction of the conduction angle a ofthe valve, and the consequent reduction of the reactorcurrent. At the maximum delay of α = π /2, the offsetalso reaches its maximum of V/ωL, at which both theconduction angle and the reactor current become zero. It isevident that the magnitude of the current in thereactor can be varied continuously by this method ofdelay angle control from maximum (α = 0) to zero (α =π /2), as illustrated in Figure 1(c), where the reactorcurrent iL(α), together with its fundamental componentILF(α), are shown at various delay angles, α.

The amplitude ILF(α) of the fundamentalreactorcurrent iLF(α)can be expressed as a function ofangle α:

:

where V is the amplitude of the applied acvoltage, L is the inductance of the thyristor-controlledreactor, and ω is the angular frequency of the appliedvoltage. The variation of the amplitude ILf(α), normalizedto the maximum current ILFmax, (ILFmax

= V/ωL), is shownplotted against delay angle a in Figure 2.

Fig 2

It is clear from Figure 2 that the TCR cancontrol the fundamental current continuously from zero(valve open) to a maximum (valve closed) as if it was avariable reactive admittance. Thus, an effective reactiveadmittance, BL(α), for the TCR can be defined. Thisadmittance, as a function of angle a, can be writtendirectly from (2), i.e.,

Evidently, the admittance BL(α) varies with αin the same manner as the fundamental current ILF(α).The meaning of (3) is that at each delay angle α aneffective admittance BL(α) can be denned whichdetermines the magnitude of the fundamental current,ILF(α), in the TCR at a given applied voltage V.

If the TCR switching is restricted to a fixeddelay angle, usually α = 0, then it becomes a thyristor-switched reactor (TSR). The TSR provides a fixedinductive admittance and thus, when connected to theac system, the reactive current in it will be proportionalto the applied voltage. Several TSRs can provide areactive admittance controllable in a step-likemanner. If the TSRs are operated at α = 0, theresultant steady-state current will be sinusoidal.Inspection of Figure 1(b) shows that the conduction anglecontrol, characterizing the operation of the TCR,results in a non-sinusoidal current waveform in thereactor. In other words, the thyristor-controlledreactor, in addition to the wanted fundamentalcurrent, also generates harmonics.For identical positive

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and negative current half-cycles, only odd harmonicsare generated. The amplitudes of these are a function ofangle α, as expressed by the following equation:

---(4)Where n = 2k + 1, k = 1, 2, 3...

The amplitude variation of the harmonics,expressed as percent of the maximum fundamentalcurrent, is shown plotted against α in Figure 3.

Fig 3In a three-phase system, three single-phase

thyristor-controlled reactors are used, usually in deltaconnection. Under balanced conditions, the triple-nharmonic currents (3rd, 9th, 15th, etc.) circulate in thedelta connected TCRs and do not enter the powersystem. The magnitudes of the other harmonicsgenerated by the thyristor-controlled reactors can bereduced by various methods.

The Thyristor-Switched Capacitor (TSC).

Fig 4 (a) Basic thyristor switched capacitor () andassociated waveform

A single-phase thyristor-switchedcapacitor (TSC) is shown in Figure 4(a). Itconsists of a capacitor, a bidirectionalthyristor valve, and a relatively small surgecurrent limiting reactor. This reactor is neededprimarily to limit the surge current in thethyristor valve under abnormal operatingconditions. It may also be used to avoidresonances with the ac system impedance atparticular frequencies.

Under steady-state conditions, when the thyristorvalve is closed and the TSC branch is connected to asinusoidal ac voltage source, v = V sin tω the current inthe branch is given by

XLXc

LCwn

tCn

nVti

==

−=

21

cos1

)( 2

2

ωωω ----(5)

The amplitude of the voltage across the capacitor is

Vn

nVc12

2

−= ----(6)

The TSC branch can be disconnected ("switched out") atany current zero by prior removal of the gate drive to thethyristor valve. At the current zero crossing, thecapacitor voltage is at its peak value, vC,I=0 = Vn2/(n2-1).The disconnected capacitor stays charged to this voltageand, consequently, the voltage across the non-conductingthyristor valve varies between zero and the peak-to-peakvalue of the applied ac voltage, as illustrated in Figure 4.

If the voltage across the disconnected capacitorremained unchanged, the TSC bank could be switched inagain, without any transient, at the appropriate peak ofthe applied ac voltage, as illustrated for a positively andnegatively charged capacitor in Figure 5(a) and (b),respectively. Normally, the capacitor bank is dischargedafter disconnection. Thus, the recormection of the capacitormay have to be executed at some residual capacitor voltagebetween zero and Vn2/(n2 — 1). This can be accomplishedwith the minimum possible transient disturbance if thethyristor valve is turned on at those instants at which thecapacitor residual voltage and the applied ac voltage areequal, that is, when the voltage across the thyristor valve iszero.

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Fig . 5The conditions for "transient-free" switching of a

capacitor are summarized in Figure 6. As seen, twosimple rules cover all possible cases: (1) if the residualcapacitor voltage is lower than the peak ac voltage (Vc <V), then the correct instant of switching is when theinstantaneous ac voltage becomes equal to the capacitorvoltage; and (2) if the residual capacitor voltage is equalto or higher than the peak ac voltage (Vc >= V), then thecorrect switching is at the peak of the ac voltage atwhich the thyristor valve voltage is minimum.

Fig. 6From the above, it follows that the maximum

possible delay in switching in a capacitor bank is one fullcycle of the applied ac voltage, that is, the interval from onepositive (negative) peak to the next positive (negative) peak. Italso follows that firing delay angle control is not applicable tocapacitors; the capacitor switching must take place at thatspecific instant in each cycle at which the conditions forminimum transients are satisfied, that is, when the voltageacross the thyristor valve is zero or minimum. For this reason,a TSC branch can provide only a step-like change in thereactive current it draws (maximum or zero). In other words,the TSC branch represents a single capacitive admittance,which is either connected to, or disconnected from the acsystem. The current in the TSC branch varies linearly with theapplied voltage according to the admittance of the capacitor.To approximate continuous current variation, several TSC

branches in parallel (which would increase in a step-likemanner the capacitive admittance) may be employed.

Fixed Capacitor, Thyristor-Controlled Reactor Type VarGenerator

A basic var generator arrangement using a fixed(permanently connected) capacitor with a thyristor-controlledreactor (FC-TCR) is shown functionally in Figure7. Thecurrent in the reactor is varied by the previously discussedmethod of firing delay angle control. The fixed capacitor,thyristor-controlled reactor type var generator may beconsidered essentially to consist of a variable reactor(controlled by delay angle a) and a fixed capacitor.

Fig.7The control of the thyristor-controlled reactor in the

FC-TCR type var generator needs to provide four basicfunctions, as shown in Figure 8 .One function is synchronoustiming. This function is usually provided by a phase-lockedloop circuit that runs in synchronism with the ac systemvoltage and generates appropriate timing pulses with respectto the peak of that voltage.

Fig .8 (a) Functional control scheme for the FC-TCR type static var generator (b) and associated waveformillustrating the basic operating principles.

The second function is the reactive current (oradmittance) to firing angle conversion.. This can be providedby a real time circuit implementation of the mathematicalrelationship between the amplitude of the fundamental TCRcurrent ILF(α) and the delay angle α given by (2). Severalcircuit approaches are possible. One is an analog function

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generator producing in each half-cycle a scaled electricalsignal that represents the ILF(α)versus α relationship. [Thisapproach is illustrated in Figure8 (b)].

Thyristor-Switched Capacitor, Thyristor-ControlledReactor Type Var Generator

The thyristor-switched capacitor, thyristor-controlled reactor (TSC- TCR) type compensator wasdeveloped primarily for dynamic compensation of powertransmission systems with the intention of minimizingstandby losses and providing increased operating flexibility.A basic single-phase TSC-TCR arrangement is shown inFigure 9. For a given capacitive output range, it typicallyconsists of n TSC branches and one TCR. The number ofbranches, n, is determined by practical considerations thatinclude the operating voltage level, maximum var output,current rating of the thyristor valves, bus work and installationcost, etc. Of course, the inductive range also can be expandedto any maximum rating by employing additional TCRbranches.

Fig.9 (a) Basic TSC-TCR type static var generator(b) var demand versus var output characteristic.

The operation of the basic TSC-TCR var generatorshown in Figure 9 (a) can be described as follows:

The total capacitive output range is divided into nintervals. In the first interval, the output of the var generator iscontrollable in the zero to Qcmax/n range, where Qcmax is thetotal rating provided by all TSC branches. In this interval, onecapacitor bank is switched in (by firing, for example, thyristorvalve SW1,) and, simultaneously, the current in the TCR is setby the appropriate firing delay angle so that the sum of the varoutput of the TSC (negative) and that of the TCR (positive)equals the capacitive output required.

In the second, third,..., and nth intervals, the outputis controllable in the Qcmax/n to 2Qcmax/n, 2 Qcmax/n to 3Qcmax/n,..., and (n - l) Qcmax/n to Qcmax/n range by switching inthe second, third, ..., and nth capacitor bank and using theTCR to absorb the surplus capacitive vars. By being able toswitch the capacitor banks in and out within one cycle of theapplied ac voltage, the maximum surplus capacitive var in thetotal output range can be restricted to that produced by onecapacitor bank, and thus, theoretically, the TCR should have

the same var rating as the TSC. However, to ensure that theswitching conditions at the endpoints of the intervals are notindeterminate, the var rating of the TCR has to be somewhatlarger in practice than that of one TSC in order to provideenough overlap (hysteresis) between the "switching in" and"switching out" var levels.

The var demand versus var output characteristicof the TSC-TCR type var generator is shown in Figure 9(b)..A functional control scheme for the TSC-TCR type vargenerator is shown in Figure10. It provides three majorfunctions:1. Determines the number of TSC branches needed to beswitched in to approxi-mate the required capacitive outputcurrent (with a positive surplus), and computes the amplitudeof the inductive current needed to cancel the surpluscapacitive current.2. Controls the switching of the TSC branches in a "transient-free" manner.3. Varies the current in the TCR by firing delay angle control.

Fig . 10The first function is relatively simple. The input

current reference IQRef representing the magnitude of therequested output current is divided by the (scaled) amplitudeIc of the current that a TSC branch would draw at the givenamplitude V of the ac voltage. The result, rounded to the nexthigher integer, gives the number of capacitor banks needed.The difference in magnitude between the sum of the activatedcapacitor currents, ΣICn, and the reference current, IQRef , givesthe amplitude, ILF, of the fundamental reactor current required.

The basic logic for the second function (switching ofthe TSC branches) is detailed in Figure 11.This follows thetwo simple rules for "transient-free" switching summarized inFigure 6. That is, either switches the capacitor bank when thevoltage across the thyristor valve becomes zero or when thethyristor valve voltage is at a minimum. The actual firingpulse generation for the thyristors in the TSC valve is similarto that used for the TCR with the exception that a continuousgate drive is usually provided to maintain continuity inconduction when the current is transferred from one thyristorstring carrying current of one polarity (e.g., positive) to theother string carrying current of opposite polarity (e.g.,negative).The third function (TCR firing delay angle control)is identical to that used in the fixed-capacitor, thyristor-

EPC2 6

Fig. 11

controlled reactor scheme (refer to Figure 8(a)).The TSC-TCR type var generator , similarly to its

FC-TCR counterpart, can be considered as a controllablereactive admittance, which, when connected to the ac system,faithfully follows an arbitrary input reference (reactiveadmittance or current) signal. An external observermonitoring the output current generally would not be able todetect (when the conditions for transient-free switching aresatisfied) the internal capacitor switching; indeed, would notbe able to tell whether the var generator employs fixed orthyristor-switched capacitors.

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STATIC SYNCHRONOUS COMPENSATORS (STATCOM)AT DISTRIBUTION AND TRANSMISSION LEVELS

Surersh Kumar.K.SAsst.Professor,Dept. of Elect.Engg

N.I.T,Calicut

1. Introduction

Shunt Connected Controllers at distribution and transmission levels usually fall under twocatogories - Static Synchronous Generators (SSG) and Static VAr Compensators (SVC).

A Static Synchronous Generator (SSG) is defined by IEEE as a self-commutated switchingpower converter supplied from from an appropriate electric energy source and operated to produce a set ofadjustable multiphase voltages , which may be coupled to an ac power system for the purpose of exchangingindependently controllable real and reactive power. When the active energy source (usually battery bank,Superconducting Magnetic Energy Storage etc) is dispensed with and replaced by a DC Capacitor which can notabsorb or deliver real power except for short durations the SVG becomes a Static Synchronous Compensator(STATCOM) . STATCOM has no long term energy support in the DC Side and can not exchange real powerwith the ac system ; however it can exchange reactive power. Also , in principle, it can exchange harmonicpower too. But when a STATCOM is designed to handle reactive power and harmonic currents together it gets anew name – Shunt Active Power Filter. So a STATCOM handles only fundamental reactive power exchangewith the ac system.

STATCOMs are employed at distribution and transmission levels – though for differentpurposes. When a STATCOM is employed at the distribution level or at the load end for power factorimprovement and voltage regulation alone it is called DSTATCOM. When it is used to do harmonic filtering inaddition or exclusively it is called Active Power Filter. In the transmission system STATCOMs handle onlyfundamental reactive power and provide voltage support to buses. In addition STATCOMs in transmissionsystem are also used to modulate bus voltages duting transient and dynamic disturbances in order to improvetransient stability margins and to damp dynamic oscillations.

IEEE defines the second kind of Shunt Connected Controller called Static VAr Compensator(SVC) as a shunt connected static var generator or absorber whose output is adjusted to exchange capacitive orinductive current so as to maintain or control specific parameters of the electrical power system (typically busvoltage).Thyristor-switched or thyristor-controlled capacitors/inductors and combinations of such equipmentwith fixed capacitors and inductors come under this.This has been covered in an earlier lecture and this lecturefocusses on STACOMs at distribution and transmission levels.

PWM Voltage Source Inverter based Static VAr Compensators (referred to as SVC hereonwards) began to be considered a viable alternative to the existing passive shunt compensators and ThyristorControlled Reactor (TCR ) based compensators from mid-eighties onwards. The disadvantages ofcapacitor/inductor compensation are well known. TCRs could overcome many of the disadvantages of passivecompensators. However they suffered from two major disadvantages ;namely slow response to a VAr commandand injection of considerable amount of harmonic currents into the power system which had to be cancelled byspecial transformers and filtered by heavy passive filters.

It became clear in the early eighties that apart from the mundane job of pumpinglagging/leading VArs into the power system at chosen points ,VAr generators can assist in enhancing stability ofthe power system during large signal and small signal disturbances if only they were faster in the time domain.Also ,they can provide reactive support against a fluctuating load to maintain the bus voltage regulation and toreduce flicker problems,provide reactive support to control bus voltages against sag and swell conditions andprovide reactive support to correct the voltage unbalance in the source – if only they were fast enough. PWMSTATCOMs covered in this lecture are capable of delivering lagging/leading VArs to a load or to a bus in thepower system in a rapidly controlled manner.

High Power STATCOMs of this type essentially consist of a three phase PWM Inverter usingGTOs,Thyristors or IGBTs, a D.C. side capacitor which provides the D.C. voltage required by the inverter,filtercomponents to filter out the high frequency components of inverter output voltage,a link inductor which links theinverter output to the a.c supply side,interface magnetics (if required) and the related control blocks. The Invertergenerates a three-phase voltage, which is synchronized with the a.c supply ,from the D.C. side capacitor and thelink inductance links up this voltage to the a.c source. The current drawn by the Inverter from the a.c supply iscontrolled to be mainly reactive(leading or lagging as per requirement) with a small active component needed tosupply the losses in the Inverter and Link Inductor (and in the magnetics,if any).The D.C. side capacitor voltageis maintained constant( or allowed to vary with a definite relationship maintained between its value and thereactive power to be delivered by the Inverter) by controlling this small active current component. The currentsare controlled indirectly by controlling the phase angle of Inverter output Voltage with respect to the a.c sidesource voltage in the "Synchronous Link Based Control Scheme" whereas they are controlled directly by current

SK9 2

feedback in the case of "Current Controlled Scheme".In the latter case the Inverter will be a Current Regulatedone ,i.e. its switches are controlled in such a way that the Inverter delivers a commanded current at its outputrather than a commanded voltage (the voltage required to see that the commanded current flows out of Inverterwill automatically be synthesized by the Inverter).Current Control Scheme results in a very fast STATCOMwhich can adjust its reactive output within tens of microseconds of a sudden change in the reactive demand.

However,current control schemes will require high frequency switching in the Inverter –switching frequencies which are so high that low frequency devices like thyristors and GTOs are ruled out.Hence they have to be based on MOSFETS or IGBTS.The latter seems to be the current choice with its highvoltage and high current rating availability with low conduction losses. However, at present, they are limited toapplications in the low voltage systems (400V,1.1kV etc) and at distribution power level rather than transmissionand sub-transmission power levels. This is because of the limited maximum voltage/current ratings available in asingle device/module. Thus DSTATCOMs use IGBTs and they usually employ the standard two-level 3 limb ,three phase inverter with voltage and current levels adjusted by ratio of transformation in the couplingtransformer At the most they may use series-parallel device structures to increase voltage and current rating ofthe switches.However multi-pulse or multi-level or cascaded inverters are rarely required in DistributionSTATCOMs. High frequency switching is possible due to the device being IGBT and ‘Current Regulated Modeof Operation” is employed to force the inverter to deliver set values of currents into the ac system.

When it comes to transmission/sub-transmission level GTOs are the preferred devices and theycan take switching frequencies below 1-3 kHz. Hence, at these levels, STATCOMs are made with theSynchronous Link Control Scheme which gates the Inverter to deliver a voltage output (rather than a regulatedcurrent).This kind of Inverter operation makes it possible to implement one of the many specialized PWMswitching schemes aimed at minimizing the switching frequency while keeping acceptable level of harmoniccontent in the Inverter output.The device used i.e GTO dictates a low switching frequency.But the invertershould not inject harmonics into the ac system. And the voltages and currents to be handled are large.These threefactors together make two-level three-limb three-phase inverter under SPWM impossible in STATCOM. Thesolution usually lies in Multi-Pulse Inverters , Muti-Level Inverters or Multi-Level Cascaded Inverters. Thesetypes are better controlled as voltage sources than current sources.Thus ‘Synchronous Link Phase Angle ControlScheme’ or ‘Predictive Indirect Current Control’ are the control choices.

Summing up, STATCOMs are fast responding generators of reactive power with leadingVAr/lagging VAr capability which can provide steady state reactive compensation as well as dynamiccompensation during power system transients,sags, swells,flicker etc. Thereby they can contribute significantlyto enhancement of Power Quality. High Power STATCOMs in the transmission system are usually made withdevices of low switching frequency capability (GTO’s) and hence need special PWM patterns to optimizeswitching behaviour. Such STATCOMs use Synchronous Link principle in the control blocks. DSTATCOMsuse high speed switching levels, simple inverter structures and high frequency PWM or Hysteresis Control tofunction as Current Regulated Sources whereas transmission system STATCOMs use multi-pulse or multi-levelinverters using GTO’s and function as controlled voltage sources with controllable phase and use SynchronousLink Control principle.

2. The Basic Principle of Synchronous Link Based STATCOM

In a synchronous link where two a.c sources of same frequency are connected together bymeans of a link inductor, active power flows from the leading bus to the lagging one and reactive power flowsfrom the source with higher voltage magnitude to the one with lower voltage magnitude. The active power flowis almost entirely decided by the lead angle whereas the reactive flow is almost entirely decided by the differencein voltage magnitudes provided the inductor is loss free ,the lead angle is small (less than 15 degrees) and thevoltage magnitude difference is small(less than 0.1 p.u) . The situation changes slightly if the link containsresistance. If two sources V1 with a phase angle of ∝ and V2 with a phase angle of 0 are connected together bymeans of an inductive link of impedance (R+jX) ohms and if the active power flowing into the source V2 isconstrained to be zero (because this represents the STATCOM situation) the power delivered by the source V1(which will not be zero and it will be equal to the power absorbed by the resistance in the link ) and the reactivepower delivered to the link by the source V2 will be given by the following relations (after a little algebra alongwith the assumptions that ∝ is small and R << X ).

Active Power Delivered by V1,P = (V12/R) ∝2 Watts ---------- (1)Reactive Power Delivered by V2,Q = (V1V2/R) ∝ VArs --------- (2)

Also , Q = V2(V2-V1)/X VArswhere the powers are for a phase and voltages have phase values. These relations can be used upto about 20degrees for ∝.Active Power drawn from the source V1 is independent of sign of phase angle (only V1 cansupply losses in R because of the zero active power constraint at V2) whereas the reactive power delivered byV2 is directly proportional to the phase angle. In the STATCOM context, the source V1 is the power systemvoltage at the bus where the STATCOM is connected,V2 is the a.c voltage generated by the Inverter in theSTATCOM, R is the total loss resistance in the link comprising the winding losses in the link inductor,interface

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magnetics and the inverter switches and snubbers etc. It is also possible to derive the following usefulrelationships in this context.

The Phase Angle of V1 w.r.t V2 ,∝ = (R/X) (V2-V1)/V1 --------- (3)This shows that the relative phase angle is linearly related to the voltage magnitude difference (for smalldifferences) and hence the reactive power delivered by V2 is proportional to the voltage magnitude difference.Thus Q is proportional to ∝ or equivalently to (V2-V1). Both points of view will be useful later to understand thetwo different ways in which this STATCOM can be controlled.In the STATCOM, the required a.c voltage source V2 is generated by inverting the D.C. voltage, which isassumed available across the capacitor in the D.C. side. But if the active power which goes into the inverter fromthe mains is kept zero, the initially charged capacitor will soon discharge down to zero due to active powerlosses in the Inverter which the D.C. side will have to supply. The D.C. side voltage will remain constant (or atleast controlled) if the power drawn from mains is just enough to supply all the losses which take placeeverywhere due to the flow of demanded reactive current. The following relation may be derived for the D.C.side ca voltage under this condition.

The D.C. side voltage ,Vd = (V1/k)(1-(X/R) ∝) volts --------- (4)Where V1 is the rms phase voltage of a.c mains,k is a constant, which also absorbs the modulation index ofPWM process in the Inverter.

From the relations cited above two control strategies emerge for the control of a SynchronousLink Based STATCOM.They are described below. The reference signal to the controller is assumed to be thedesired reactive power flow from the STATCOM.1. Keep the D.C. side voltage constant by controlling the value of ∝.And control the reactive power from

the inverter by directly changing (V2-V1) by controlling the modulation depth (i.e. the multiplicationfactor that comes between the D.C. voltage and the amplitude of a.c output in the Inverter).It should beobvious from the equations 1 to 4 that this strategy will result in an interacting control system.

2. Let the D.C. side voltage vary according to equation(4) and use ∝ control to control the reactive powerdelivered by the STATCOM.There is only one control variable and that is ∝.The modulation index ofthe Inverter is kept constant and D.C. voltage is allowed to vary. The D.C. voltage increases when theSTATCOM delivers increasing lagging VAr and it decreases when STATCOM delivers leadingVArs.Here the control of VAr is indirect. When the reactive power reference changes, it causes achange in ∝ value. The residual voltage across link inductor changes resulting in more active powerflow into/out of the Inverter.Increased active power flow into/out of the Inverter results inincrease/decrease in the energy storage in the D.C. side capacitor resulting in an increase/decrease in theD.C. side voltage. With a fixed modulation index ,the increase/decrease in the D.C. voltage is straightaway passed on to Inverter output voltage V2.Change in the Inverter output voltage results in thedesired reactive power change. Obviously the response time is decided by the link inductor and D.C.side capacitor and will be relatively slow.

In the constant D.C. voltage scheme, the D.C. voltage dynamics is going to be slow since thesame mechanism described above will be responsible for maintaining the D.C. voltage. However,thereactive power flow is controlled by controlling V2 directly by changing the modulation index of theInverter and this dynamics can be fast. The components which decide the dynamics will be the lossresistance,link inductor value,Inverter filter components and the feed back system parameters.

3. The Inverter and Programmed Harmonic Elimination PWM

A Three-Phase Inverterusing IGBTs is shown in Fig.1.In certaincases the neutral wire may not be present andthe D.C. side capacitor may be a single one.However, for the purpose of explanation, aneutral point may always be imagined. Withthis the three phase Inverter becomes threeseparate single-phase half bridge Inverterssharing the same D.C. source. Bipolar andunipolar PWM schemes using a triangularcarrier frequency was discussed in anotherlecture (page 70-72) in the context of single-phase full bridge converters. Much of thesame is applicable here too except that onlybipolar PWM is possible for a half bridgetopology since no combination of switchingpatterns for the upper and lower switches of ahalf bridge can apply zero potential at the load point. Bipolar PWM using a triangular carrier and sinusoidal

SK9 4

modulating voltage can be applied here with the modulating waves of the three half bridge sections forming abalanced three phase signal set.

However,the switching frequency required in Sinusoidal Pulse Width Modulation usingtriangular Carrier to achieve reduction in output harmonics is usually excessive as far as high power devices likeGTOs are concerned. Hence, programmed harmonic elimination techniques is preferred at high power levels.

Like in any other PWM scheme, +Vd/2 and –Vd/2 pulses are applied across the load in theprogrammed harmonic elimination technique also. But in this scheme the position and duration of these pulsesare pre-calculated off-line in such a way that (i) certain chosen harmonics are completely eliminated completelyin the output and (ii) the fundamental component of the output has a desired value. By a general formulation ofFourier series coefficients of a pulse wave it is possible to derive a set of equations involving angle positions ofthe positive and negative pulses to satisfy the conditions on elimination of chosen harmonics and on thefundamental amplitude. The maximum possible amplitude will be available when the output is a full squarewave(i.e. no harmonics are eliminated) and will be 1.275(Vd/2).But when harmonics are to be eliminated it isnot possible to reach this value of fundamental voltage. For every selection of harmonics to be eliminated thereexists a maximum value the fundamental component can have and it will be less than 1.275(Vd/2).For example,it is 1.188(Vd/2) for a scheme where fifth and seventh harmonics are eliminated.Fig.2 shows the normalizedpulse pattern which appears at A phase output when fifth and seventh harmonics are sought to be eliminated. Theswitching frequency of eachwill be 350Hz with thispattern.

The equations whichyield the angular positions fora chosen elimination formatand fundamental amplitude istranscendental algebraic innature and require numericaltechniques for solution.Moreover for the sameharmonic elimination formatthe switching angles will varywith the fundamentalamplitude desired;and thevariation can be highlynonlinear. See Fig.3.Thenature of equations make anon-line implementation ofpattern generation verydifficult. In addition, thenonlinear angular positionvariation with changes in the desired fundamental component makes it difficult to generate the PWM pattern inreal time by analog/digital logic. However, it is possible to implement this scheme using microprocessors/controllers and EPROMs.

A sinusoidal reference wave at frequency equal to the desired output frequency of the Inverteris frequency multiplied in a PLL system. The square wave from VCO of PLL is used to clock a UP/DOWNcounter. The counter output is used as address bytes of an EPROM which has the required switching pattern atthat instant written in it(by off-linecomputation and EPROM programming).TheEPROM has patternsstored for various quantised values offundamental amplitude. The control signalwhich sets the fundamental amplitude is A/Dconverted and the code is used to decide therange of EPROM memory locations to be readout by the counter output. Once in afundamental cycle the counter is forcibly reset(at zero crossing of reference sine waveusually), to avoid subharmonic components inthe output due to jitter in the PLL and othersimilar errors everywhere. Note that it ispossible to shift the phase of the fundamentalcomponent of Inverter output with respect toreference sine by shifting the counter resetpoint with respect to the zero crossing point of

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reference sine. A three-phase pattern can be similarly generated. However, large memory may be required forfine control of output voltage fundamental value.

4. Phase Angle Control of STATCOM

Fig.4. shows a DSTATCOM configured to keep the reactive power delivered by the Source ata zero value as long as the reactive demand from the load is within the DSTATCOM rating. Thus, the p.f of theSource will be maintained at unity under steady state conditions by the DSTATCOM.The control ofDSTATCOM reactive power is by pure ∝ control and the D.C. bus voltage is allowed to vary. This scheme,though somewhat slow, results in simplified control hardware.

The source side voltages and currents are sensed and the reactive power is calculated byanalog/pulse circuitry. This calculated value is compared with the desired value (usually zero) and the error isprocessed in a proportional-integral controller. The error output decides the phase shift needed in the inverteroutput in order to develop the required D.C. bus voltage such that the inverter output voltage magnitude will besufficient to make the Inverter deliver the VArs required by the load. The Inverter is gated by a fixed PWMpattern optimised for eliminating chosen harmonics (usually fifth, seventh, eleventh etc; triplen harmonics neednot be eliminated since they do not result in current flows in a three wire system). The needed PWM pattern isstored in an EPROM and is read out using the scheme described in the last section. This is by far the mostpopular scheme used in high power STATCOMs.

The open loop dynamics of the STATCOM features a third order transfer function (for smallsignals) between ∝ and Qc, the reactive power delivered by the Inverter.The transfer function has a pair ofcomplex zeros, a real pole and a pair complex poles. Various research workers have derived the followingtransfer function for the STATCOM.Qc(s)/∝(s) = N(s)/D(s) where N(s)=(Vs2/L)s2+(R/L)s+(k2/2LC) andD(s)=s3+(2R/L)s2+(R/L)2+(k2/2LC)+ω2s+(k2R/2L2C) where all the parameters have the already definedmeaning and ω is the system frequency.The step response usually features a rise time ranging from 3-7 cycles ofa.c.It is possible to employ a PI controller with suitable gain characteristics to compensate the closed loop systemand to obtain a step response rise/fall time between 1 to 3 a.c cycles.

It is not necessary to sense the reactive power in all three phases of the source in the case ofbalanced operation.However if the source or load is unbalanced all the three phases will have to be monitored tocalculate the total source reactive power.But the STATCOM will be configured to deliver this total demand bydividing it equally among three phases to ensure current balance in STATCOM.If exact cancellation of reactivepower in all the three phases is required under unbalanced conditions a three phase STATCOM made of threesingle phase units with entirely independent control will yield better results (i.e easier control ; it is possible todo the job using a three phase inverter too).

5. STATCOM with Constant D.C Bus Voltage

The above scheme suffers from the disadvantage of variable D.C. voltage across the Inverterinput and sluggish response to changes in reactive demand.The solution is to control the D.C. voltage by phase

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angle control and to control the reactive power flow by control of modulation index control.Two separate controlloops (which interact with each other ) are involved here.But by separating the time scale of dynamics it ispossible to decouple the interaction to a satisfactory degree.

Control of modulation index i.e. control of fundamental component of inverter output voltagewith a constant value of D.C. voltage can not be easily achieved without complex hardware with a large memoryrequirement as explained before.Hence this scheme of control is better suited for STATCOMs with SinusoidalPulse Width Modulation (SPWM) in the Inverter.While it is true that programmed harmonic elimination is betterthan SPWM in terms of switching frequency minimisation for a given level of harmonic reduction,SPWM with asynchronised triangle wave carrier at around 2 to 3kHz can be a viable alternative; especially when thefundamental amplitude is to be controlled.This is true even for GTO based inverters using state of the art GTOs.

Only bipolar PWM is possible for a three phase Inverter.Hence SPWM in bipolar format usinga triangular carrier in the frequency range of 1 to 3 kHz is assumed in this section.The carrier wave has to besynchronised to the modulating signal (i.e. sine wave) to eliminate subharmonic components in the output.Theprocess of SPWM produces a fundamental component equal to (Vd/2)(Vsm/Vt) at the inverter output terminalswhere Vsm is the amplitude of the modulating signal and Vt is the amplitude of the triangle wave.The harmonicsare sufficiently shifted in frequency by the PWM process to allow easy filtering.Now the inverter output voltagecan be controlled by controlling the amplitude of modulating signal .

Fig.5 shows the block diagram of the STATCOM with D.C. voltage control.The D.C. voltageis sensed,compared with reference level and the error is processed in a PI controller.The output of the PIcontroller is converted into a time marker pulse which is time shifted from zero crossing of phase voltage by anamount proportional to the output voltage of PI controller.This time marker pulse will reset the counter in thephase locked sine wave generator and thereby effect phase shift in the Inverter modulating signal .The VAr inthe line is calculated in the VAr calculator and this forms the actuating voltage on an analog multiplier whichscales up or down the fixed amplitude sine wave generated by PLL-Counter-EPROM-DAC system.The phaseshifted and amplitude adjusted sine wave becomes the modulating signal for a SPWM block and the Inverterreproduces the signal at its output after amplification by Vd/2.

The VAr control loop here is essentially of first order due to link inductor and system losses. Ahigh gain PI controller will accelerate the step response of this loop to a level where VAr commands arefollowed in less than a cycle. The slower voltage control loop will carry out the slow adjustment of phase angleneeded to maintain the D.C. voltage constant. A combination of large valued capacitor, low valued inductor, fastVAr control loop and slow D.C. voltage control loop will ensure rapid VAr control with much reduced currentamplitude oscillations in the link inductor. This scheme can very effectively provide reactive support during thepower system transient conditions and can compensate a highly fluctuating load like an arc furnace.

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6. The Reactive Demand Calculator

The speed of response of the STATCOM is decided by two time delays – the rise time ofSTATCOM when a step change is applied to its reactive power command input and the rise time behavior of thereactive demand calculator when the actual reactive flow in the source line changes suddenly. Hence, theReactive Power Calculator has to extract the reactive component of the source current rapidly.The reactivecommand was shown as a VAr flow till now. However, the reactive component of the line current is enough forcontrol purposes. A simple method to extract the reactive content in the current is explained here. Let the sourcecurrent in one phase be i(t) = I0+I1 Sin (ωt+θ1) +I5 Sin (5ωt+θ5) + I7 Sin (7ωt+θ7)+....... This covers thepossibility of a non-linear load which draws harmonic currents and D.C. offsets too. Form the product of thiscurrent with unit amplitude cosine wave which is at 90 degrees in phase with that phase voltage. This productsignal is called p(t).

P(t) = I0 Cosωt+I1 Cosωt Sin (ωt+θ1) +I5 Cosωt Sin (5ωt+θ5) + I7 Cosωt Sin (7ωt+θ7)+......The integral of this product over integral number of fundamental periods will have content only from

(I1Sinθ1)/2 since all other products have zero average over fundamental period.Thus, the strategy is to form thisproduct,integrate it for one period,sample the integrator output and hold the sample,reset the integrator aftersampling and allow it integrate the product for the next period.The sampled integrator output will be a quantityproportional to the reactive component of the current.This output can be used as the reactive power signal in theSTATCOM control block.The sampling and integrator reset are performed at zero crossing of sine wave and theproduct current is taken with the cosine wave.The cosine wave has to be pure,without harmonics.The requiredsinusoidal templates are obtained by PLL-Counter-EPROM-DAC technique already described.

7. STATCOMs at Transmission Level

The STATCOMs discussed until now were configured for compensating the reactive powertaken by a load and for maintaining the utility power factor at unity. Even in this configuration STATCOMresults in PQ enhancement since it can respond rapidly to a rapidly varying load like arc furnace; large hammermills, stone crushers, ball mills etc; large motors with frequent starts/stops etc. These are potentially troublesomeloads from Power Quality point of view. They can cause flicker and sag. Fast responding STATCOM renderssupport to bus voltage against these loads.

However, at transmission/subtransmission level the issue of providing voltage support at busesis addressed more directly and STATCOMs are connected to deliver/take as much reactive power to/from thebus as required to maintain the bus voltage within pre-decided limits. STATCOM does not try to maintain thepower factor at the bus at unity anymore. Rather, it tries to maintain the bus voltage by injecting leading orlagging VArs into the system. In this case there will be an outer control loop which senses the bus voltage,compares it with a set value and processes the error in a PI Controller and sets the reactive reference for the innercontrol loop. The effectiveness of a given STATCOM with a specified rating in providing voltage support at aparticular bus will depend on the short circuit capacity at that bus. Low value of S.C. capacity implies that theThevenin's impedance behind the bus voltage is large. In addition, the STATCOM there will be more effectivethan similarly rated STATCOM at another bus with a higher short circuit capacity. But then, a bus with a highervalue of short circuit capacity will have better immunity against sags/flickers/swells due to problems elsewhereand hence probably does not need a STATCOM at all.

In many transmission applications the STATCOM is not used as a perfect voltage regulator ,but rather the terminal voltage is allowed to vary in proportion with the compensating current.The useful linearrange of the equipment is extended if this kind of droop regulation is used.Moreover “droop” regulation allowsautomatic load sharing between various static compensators.

The control system block diagram is given in Figure 6. The terminal voltage is sensed and aPLL system is locked on to it. This is needed for controlling the inverter.The amplitude information is extractedfrom the sensed voltage and it is compared with the set reference value. The error decided the magnitude andpolarity of the reactive current to be drawn by the STATCOM inverter from the ac system.A PI controller is usedto speed up the response and reduce steady state error.The inner current loop on the sensed reactive currentmagnitude is used to pull down (in the case of capacitive compensation) the voltage reference value therebyeffecting a droop characteristiv in the voltage regulation. ‘X’ represents the system impedance at the point ofconnection.Auxiliary inputs refer to the additional inputs into the control loop to make the STATCOMcontribute to improvement of transient and dynamic stability.

The loop gain of the control system is a strong function of system impedance X. Increasing thedroop gain value reduces loop gain and increasing system impedance at the point of connection increases theloop gain.Hence the maximum system imedance condition must be identified and control system compensationmust be done for that condition.

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STATIC SYNCHRONOUS SERIES COMPENSATOR (SSSC) AND ITS CONTROL

Suresh Kumar K.SAP,EED,N.I.T Calicut

1. IntroductionA Static Synchronous Series Compensator (SSSC) is a Power Electronic Switched Converter operating

as a Voltage Source Inverter connected in series with a transmission line through interfacing transformers andcontrolled in such a way as to inject capacitive or inductive voltage drop in series with the line with the effectivevalue of reactance settable and controllable. Typically SSSC can inject voltages in quadrature and can nothandle real power exchange with the line for extended periods.

SSSC can be controlled to maintain a preset value of capacitive (or inductive) reactance in series withthe line thereby effecting the traditional series capacitor compensation (but the capacitive reactance value iscontrollable unlike in the fixed capacitor systems). It is also possible to control the SSSC such that it alwaysinjects a preset value of voltage in quadrature with current , but independent of current.In both modes of control, it is possible to put an outer control loop which can be designed to maintain the real power flow in the line at apreset value against bus voltage variations or bus angle variations.Similarly it is also possible to employ an outerloop to maintain the bus voltage to the right of SSSC constant.Also , by suitably modulating the referencesetting (whatever that be) according to some relevant information it is possible to make use of SSSC tointroduce damping in the system to improve dynamic stability and subsynchronous behaviour.Finally it is alsopossible to modulate the reference setting in such a way that the transient stability margins can be improvedwhen the system undergoes large disturbances.

There has to be a DC Source for a converter to produce ac – this DC Source in a SSSC is a large DCCapacitor. The Capacitor maintains a large enough voltage for the inverter to generate a 3 phase system ofvoltages as per the compensation requirements.The inverter ,as stated already, injects only quadrature voltageinto the line.This means that the real power flow into or out of inverter is zero.Well, not exactly. When theentire line current flows through the interface transformer and inverter passive and active components there willbe losses everywhere. If inverter has no real power coming in from line , then the DC Side Capacitor has todeliver these losses and soon it will discharge down to a level at which the SSSC has to trip. Hence there has tobe a control loop on the DC Side voltage , maintaining it constant by drawing or delivering active powersuitably.Of course, since this active power essentially takes care of losses in the system it can be expected to besmall.Thus the voltage injected by SSSC has to have a small component which is in phase with the line current.

The application is a transmission level application (otherwise , if it is distribution level, it will be calledactive series filter ; at transmission levels only fundamental reactive compensation is usually attempted) andassumption of balanced system voltages and negligible harmonics will be permitted. And it is unlikely thatSSSC will be expected to work when the system voltage (one or more phases) go down to such low levels wherePLLs will lose lock.In fact under severe fault conditions SSSCs are bypassed by fast acting static bypassswitches. Thus we have balanced, relatively distortion free voltage of sufficient amplitude at the bus to the leftof SSSC installation and it is possible to loack a PLL system with sufficient ease at this point.Moreover with abalanced , distortion free system the best way to control a three phase system is to jump over to ‘SynchronouslyRevolving Reference Frame’ or the so called d-q plane. This lectures deals with such a control strategy.

The voltage level is high and even with interface transformer, the voltage levels and current levels willusually be beyond the capability of IGBTs (though they are catching up rapidly) and GTOs and other similardevices rule. And when GTOs rule, switching frequency can only be low – and that brings in multi-pulse ormulti-level or cascade inverters. Typically multi-pulse inverter is used – in one installation a 48 Pulse threephase inverter comprising 8 three phase inverters of 6 pulse two-level type. The construction of 48 pulsewaveform was done in transformer magnetics in this case.

2. Control StrategyThe d-q domain control strategy for an SSSC is explained with respect to the following system.

The d-q domain equations of the system are given below.

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(V1d – V2d) = Rid + XC Iq - X iq(V1q – V2q) = Riq - XC Id - X id

Now , the line currents are sensed and transformed into d-q plane by using unit sine and cosinetemplate waveforms.These template waveforms are generated by a digital PLL system locking on to the systemvoltage at the left side bus. The purpose of control is to maintain XC ohms of compensating reactance in the line.For this purpose the required d and q component voltages can be calculated i.e XC Iq and - XC Id can becalculated from the set value for XC and calculated values of Id and Iq .These values are reconverted into threephase quantities and given as reference signal to PWM Gating Syatem of Inverter. However, this is not enough– because a small inphase voltage injection will be needed to meet the inverter losses. This is done with the helpof a PI Controller on DC Side Voltage.When the DC Side Voltage goes down the PI Controller output increasesand this error output is used to inject kId volts in the d-axis and kIq volts in the q-axis where k is the error output.Essentially we are putting a resistance (fictitious) in series with XC of value ‘k’. The power which goes into thatresistance is the power that meets the losses in the SSSC.

A Simulink simulation diagram to illustrate these concepts is given in the next page. The values for V1and V2 were 320 Volt peak Phase-Neutral. The line reactance was 3 ohms and line resistance was set at zero forsimulation runs.

The d-q method will calculate the current components instantaneously and there is no need for a filterin d-q domain on sensed currents if currents are balanced and distortion free. However in the presence of suchcorruptions d-q components will have high frequency contents like 100Hz and above and these should not besent into the inverter reference.Hence a 25Hz low pass filter is used in the d-q lines in the current sensing part.The Simulink Diagram essentially solves the following two equations for Id and Iq.(V1d – V2d) = Rid + XC Iq + (vc) id - X iq(V1q – V2q) = Riq - XC Id + (vc) iq - X id where (vc) is the output of PI Controller in the DC Side Voltage Controller Loop. The ac side of inverter ismodelled as an ideal voltage source which generates the commanded voltages without any distortion and delayand with zero output impedance.The DC side is modelled by using power balance to calculate the capacitorvoltage. The PLL system is not modelled.In fact exact phase lock is not so important.The PLL output has to bein synchronism with the system voltage, but it need not have same phase that of mains.

Typical simulation results for sudden switching on of XC value, sudden change of phase angle betweenthe buses, etc are given. The results given in figure 4 reveal the DC Voltage regulation dynamics.This dynamicscomes into picture whenever the phase relation between the injected voltage and line current undergo suddenchanges as in the case when the angle of one or both bus voltages change instantaneously (due to a fault in thesystem elsewhere etc.).This dynamics is dependent on the loading level in the line at the instant ofdisturbance.This is so since the loop gain of DC Voltage control loop is proportional to the line current.

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IMPROVEMENT OF POWER SYSTEM STABILITYUSING STATIC VAR COMPENSATORS

Dr. R. Sreeram KumarDepartment of Electrical Engineering

National Institute of Technology, Calicut

1. IntroductionThis notes gives an overview of the

application of static VAR compensators (SVCs) forthe improvement of power system stability. The termstability means essentially that the synchronousmachines in the system tend to run in synchronism.Stability considerations usually determine thetransmittable power in a given system. SVCs can beapplied very effectively to improve the transient anddynamic stability of power systems.2. Transient StabilityThe term transient stability means that a powersystem can recover normal operation – following amajor disturbance (fault, loss of generation, etc.).The transient stability improvement attainable by astatic VAR compensator is due to the fact that thepower transfer capability of a transmission systemcan be increased by controlled reactive shuntcompensation that maintains the voltage at specificpoints of the transmission line. Considering thesimple model of a generator being linked to aninfinite bus by a reactive line (Fig. 1a), thetransmitted power P is given by the following wellknown equation:

δsin2

XVP = (1)

where V is the magnitude of the generator andinfinite bus voltage, X is the total interconnectivereactance, and δ is the power angle between thesending end machine internal voltage and the infinitebus voltage. The relationship between the power Pand angle δ is shown in Fig. 1b.The theoretical maximum transmittable powerdefining the steady-state stability limit is obtained at

2/πδ = :

XVP

2

max = (2)

If an ideal synchronous condenser is connected at themidpoint of the transmission line (as shown in Fig.2a) and its excitation is controlled to keep themagnitude of the voltage at that point the same as thatat the sending and receiving ends, then equation (1)can be applied for each half of the line, that is,

2sin

2

2 δX

VP = (3)

The power transmission relationship expressed byequation (3) is illustrated in Fig. 2b where power P isplotted against angle δ. Evidently, the maximumtransmittable power obtained at δ / 2 is 2 V2/X twicethe steady state limit of the uncompensated case ingeneral, the transmission reactance X can be divideinto n equal sections with a perfect synchronouscondenser at the joining points of he sections. In thiscase, the power transmission is characterizedtheoretically by the following equation:

nsin

2 δ

nX

VP = (4)

This equation indicates that the maximumtransmittable power as nV2/X, that is, n times thesteady-state power limit of the uncompensated case.In the line compensation by “sectioning’ the power issent from the generator to the first synchronouscondenser via the first line section X/n, the firstsynchronous condenser sends the same power to thesecond one via the second line section, and so on,until the power gets from the (n-1) synchronouscondenser to the receiving end bus via the nth linesection. The total real power sent from the sendingend is consumed at the receiving end. Thesynchronous condensers have no real powerexchange; they regulate the magnitude of the voltageat each section of transmission line by providing thenecessary reactive power.

The improvement in transient stabilityachievable with controlled shunt compensation issimply due to the significant increase in the steady-state stability limit obtained. A greatly simplifiedexample is used here to illustrate the basic conceptsand help to establish the control requirements for thestatic VAR compensator. Consider the simple powersystem models shown in Figures 1a and 2a. Supposethat in both the compensated and uncompensatedsystems the transmitted power is the same. Assumethat both systems are subjected to the same fault forthe same period of time. The dynamic behaviour of

Srk-A1

the two systems is illustrated in Fig 3a and3b. Prior to the fault, each system transmits powerPM at angles δ and δc1, respectively (subscript c standsfor “compensated”). During the fault, the transmittedelectric power to the generators remains constant(PM). therefore, the generators accelerate from thesteady-state angles δ1 and δc1 to angles δ2 and δc2, atwhich the fault clears. The accelerating energies inthe two systems are represented by areas A1 and Ac1.After fault clearing, the transmitted electric powerexceeds the mechanical input power and themachines decelerate, but their angle further increasesdue to the kinetic energies accumulated in the rotors.The maximum rotor angles δ3 and δc3 are reachedwhen the decelerating energies defined by areas A2and Ac2 are equal to the accelerating energies definedby areas A1 and Ac1, respectively.

If for a given power level and post-faultsystem the maximum rotor angle (δ3 or δc3) reached isbelow the critical rotor angle (δcrit or δccrit), the systemwill remain transiently stable. The critical rotor anglerepresents the rotor angular swing and the criticalangle determines the margin of transient stability, thatis, the “unused” and still available deceleratingenergy represented by areas Amargin and Acmargin in Fig.3a and 3b.Comparison of Fig. 3a and 3b clearly shows thesubstantial increase in transient stability margin the(ideal) shunt compensation can provide.Alternatively, if the uncompensated system hassufficient transient stability margin, shuntcompensation can increase significantly thetransmittable power.

In the above stability considerations, theshunt compensator is assumed to be an idealsynchronous condenser. The adjective “ideal” herewould mean that the amplitude of the midpointvoltage remains constant all the time, except possibleduring the fault, and its phase angle would follow thegenerator (rotor) angle swings so that thesynchronous condenser would not be involved in realpower exchange. The basic characteristics of theideal synchronous condenser indicate that a staticVAR compensator regulating the midpoint terminalvoltage could fulfill the same function provided that(i) it can stay in synchronism with the terminalvoltage in face of major disturbances and (ii) it is ableto regulate the terminal voltage.

The requirement of staying in synchronismwith the ac terminal voltage is basic for all solid-statestatic VAR generators, and it can be met even underthe most severe disturbances by using modern phase-locked loop techniques. The requirement to regulatethe terminal voltage effectively requires fast responsefor the voltage control loop and, of course, sufficientVAR rating for the compensator. Presently used

static VAR compensators have a worst-case responsetime of 30 to 50 ms (2 to 3 cycles) for regulating theterminal voltage in a closed-loop manner.

The ideal synchronous condenser in theprevious elementary stability consideration isassumed to act essentially as a synchronized voltagesource providing reactive power as needed withoutlimitation. In the simple midpoint compensatingscheme shown in Fig. 2a, the reactive power demandat constant midpoint voltage increases rapidly withincreasing power transmission, reaching a maximumvalue equal to 4 Pmax at the maximum steady-statepower transmission limit of 2 Pmax (Pmax is themaximum transmittable power of the uncompensatedsystem). The relationships between real power P,midpoint reactive power Q, and angle δ is illustratedin Fig. 4. In most practical applications, foreconomic reasons, the rating of the staticcompensator is lower than that required for maximumattainable power transfer. For this reason, a practicalstatic VAR compensator approximates an idealsynchronized voltage source only as long as the(midpoint) VAR demand does not exceed its(capacitive) rating. If a static VAR compensator withlimited capacity is operated above its rating, it acts asa constant shunt susceptance (capacitive admittance),which means that the midpoint voltage can no longerbe kept at the constant end point voltage level,, V. Inthis region, the power system behaves in the sameway as if the compensation at the midpoint wereprovided by a fixed capacitor, as illustrated in Fig. 5.3. Dynamic StabilityThe term dynamic stability means that a powersystem can recover normal operation following aspecified minor disturbance. In other words, adynamically stable power system has positivedamping. Under some conditions, a power systemmay have very small positive or even negativedamping, which could result in sustained voltage andpower swings and even in eventual loss ofsynchronism between the main power generators.Since static VAR compensators can control thevoltage at given terminal of the transmission system,and thereby alter its power transmissioncharacteristic, it is expected that with appropriatecontrols they can provide damping for poweroscillation.

Consider the simple power system with anideal compensator, controlling the magnitude of themidpoint voltage vm, shown in Figure 5. Themechanical power applied to the generator is PM andthe electrical power transmitted to the infinite bus atthe receiving end is PE. if the mechanical angularmomentum is M and δ is the rotor angular position(with respect to a synchronously rotating axis), the

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dynamic behaviour of the system can be described bythe so-called “swing equation”:

EM PPdtdM −=2

2δ(5)

where the difference PM – PE is the acceleratingpower.For dynamic stability, it is enough to consider smallperturbations. Thus,

( )EM PP

dtdM ∆−∆=∆

2

2 δ(6)

Since the mechanical power PM is constant,∆ PM = 0 (7)since the electrical power, as per equation (3), is

2sin

2

δX

VVP mE = (8)

the change in the electrical power can be expressed inthe following form:

δδ

∆∂∂+∆

∂∂+∆

∂∂=∆ E

mm

EEE

PVVPV

VPP (9)

In equation (9) ∆V = 0, since the amplitude of thesending end voltage is constant. Therefore, thesubstitution of equations (7) and (8) with ∆V = 0, intoequation (6), results in the following expression:

0)(2

2

=∆∂∂+∆

∂∂+∆ δ

δδ E

mm

E PVVP

dtdM (10)

In equation (10), the middle term

mmE VVP ∆∂∂ )/( represents the effect of themidpoint compensator on the dynamic behaviour ofthe system. Recall that the function of thecompensator is to control the midpoint voltage (bysupplying appropriate amount of VARs). Considerfirst that the amplitude of the midpoint voltage is keptconstant, that is, the compensator is operated as avoltage regulator in the same way as is discussed inconnection with voltage support and transientstability improvement. Then, with Vm = const and ∆Vm = 0, equation (10) becomes,

0)(2

2

=∆∂∂+∆ δ

δδ EP

dtdM (11)

The corresponding characteristic equation

012 =∂∂+ o

EPM

sδ

(12)

indicates an undamped oscillation of angle δ (theroots being on the imaginary axis of the s-plane) withan angular frequency of

oE

oP

Mw

δ∂∂= 1

(13)

This means that, in general, a compensatormaintaining constant (midpoint) terminal voltage isnot effective in damping power oscillations.In order to make the power oscillations damped, themidpoint voltage in the system of Fig. 5 must bevaried as a function of d (∆δ)/dt, that is

dtdKVM

)( δ∆=∆ (14)

where K is a constant.With equation (14), equation (10) becomes

0)()(2

2

=∆∂∂+∆

∂∂+∆ δ

δδδ

oE

om

E Pdt

dKVP

dtdM

(15)which yields the following characteristic equation

02 20

2 =++ wss ς (16)where

om

E

VP

MK

∂∂=ς2 (17)

and wo is given by equation (13).The characteristic equation (16) clearly represents apositively damped system (the roots being on the lefthand side of the s-plane) meaning that the oscillationof angle δ decays with time.

The conclusion therefore can be made that,in contrast to the previous cases of compensation(voltage support and transient stability improvement),which required terminal voltage regulation in order toobtain oscillation damping, the VAR output of thecompensator must be controlled so as to vary theterminal voltage in proportion to the rate of change ofthe rotor angle or, since

fdt

d ∆−∆ )( δ(18)

according to the variation of the power systemfrequency.4. Subsynchronous Resonance DampingWhen series capacitors are used to compensate theseries inductance of long transmission lines, aphenomenon known as subsynchronous resonance(SSR) can occur. The phenomenon occurs when theseries capacitors resonate with the equivalentinductance of the generator and transmission line at afrequency lower than the system nominal frequency.Under such resonance conditions, the mechanicalimpedance of the generator shaft system may exhibitnegative damping for a particular torsional mode. Asa result, torsional oscillation will spontaneously ariseand continue to increase in amplitude until thegenerator shaft system is destroyed. The applicationof an SVC for damping sunsynchronous resonance byincorporating suitable controls is illustrated in Fig. 6.

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References1. IEEE Special Stability Working Group, “Static

VAR Compensator Models for Power Flow andDynamic Performance Simulation”, IEEE Trans. OnPower Systems, Vol.9, No.1, pp.229-240, Feb.1994.

2. P.Kundur, “Power System Stability andControl”, The EPRI Power System EngineeringSeries, Mc.Graw-Hill, Inc., New York, 1994.

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Optimal location of multifunctional FACTS devices for power transit control Elizabeth P Cheriyan Lecturer, EED NITC

Abstract Load flow control with multifunctionalFACT devices can maintain the reliable systemoperation in the event of additionally demandedpower transits. The problem of placing FACTSdevices in a power system has received renewedattention in recent years. The problem here is todetermine the optimal locations and sizes of FACTsdevices so as to facilitate greater control of power,such that it flows on the prescribed transmissionroutes and secure loading of transmission lines tolevels nearer their thermal limits is possible.Genetic Algorithms have been used to solve theabove problem. The Optimisations are performedon the location of the devices, their types and theirvalues. The system loadability is applied as themeasure of power system performance. Thesimulation results show the difference of efficiencyof three devices used in this context. It is alsoobserved that the simultaneous use of several kindsof controllers is the most efficient solution toincrease the loadability of the power system.

IntroductionThe present day trend of deregulation is gettingtranslated into separation of generation andtransmission. Every consumer will be able to buyhis own electricity from any source desired. (Thirdparty access). On the technical side, we mayobserve an increase of unplanned power exchangedue to the competition among utilities and tocontracts concluded directly between producers andconsumers. Problems could appear with the powerflow, which obey Kirchoff’s laws. If the exchangeswere not controlled, some lines located onparticular paths may become overloaded, leading topower congestion and thus the full capacity oftransmission inter connections could not beutilized. Parallel to deregulation, electrical loadgoes on increasing. Even though this growth hasbeen practically stabilized in developed nations,some transmission lines are already close to theirthermal limits. Political and environmentalconstraints make the building of new lines difficultand lead electrical utilities to a better use of theexisting network. Therefore it is attractive forelectrical utilities to have a way of permitting amore efficient use of the transmission lines bycontrolling the power flows. Until a year ago theonly means of carrying out this function wereelectromechanical devices such as switchedinductors or switched capacitor banks and phase

shifting transformers. However, specific problemsrelated to these devices make them not veryefficient in some situations. They are not onlyrelatively slow, but they also cannot be switchedfrequently, because they tend to wear out quickly.Appearance of FACS devices linked to theimprovements in semiconductor technologypermitted to suppress these drawbacks. It opens upup new opportunities for controlling power andenhancing the usable capacity of existingtransmission lines. Studies and realization havetheir capabilities in steady –state or dynamicstability. With their ability to change the apparentimpedance of a transmission line, FACTS devicesmay be used for active power control, as well asreactive power or voltage control. For a meshednetwork, an optimal location of FACTS devicesallows to control its power flows and thus toincrease the system loadability. Among the above-quoted benefits, only some of them can be providedby a given kind of FACTS device and it isimportant to choose the suitable type(s) of devicesin order to reach a defined goal.

In this paper a case study is made on thethe optimal location of multitype FACTS devices.Four different devices, with specific characteristics,have been selected and modelled for steady-stateanalysis. They are used in order to maximize thepower transmitted by the network by controllingthe power flows. The optimal location of a givennumber of FACTS is a problem of combinatorialanalysis. To solve such kind of problem, heuristicmethods can be used. Among them, geneticalgorithms (GA) is chosen.

FACTS devices in generalIn a power system, FACTS devices may be used toachieve different goals. In steady state, for ameshed network, they permit to operate thetransmission lines close to the thermal limits andreduce the loop flows. They achieve these bysupplying or absorbing reactive power, increasingor reducing voltage, and controlling seriesimpedance or phase angle. Their high-speedoperation gives them several qualities in dynamicstability. In particular, they are capable ofincreasing the synchronizing torque, damposcillations at various frequencies below the ratedfrequency (.2 to1.5Hz), support dynamic voltage orpower flow control. Moreover, FACTS devicesmay have benefits in case of short circuits, by

limiting short circuit current. Different types ofFACTS devices have been developed and one wayto classify them is on the basis of the type ofcompensation. Accordingly, three categories ofFACTS controllers are distinguished: (i) seriescontrollers (ii) shunt controllers (iii) combinedseries-shunt controllers. Within a category, severalFACTS devices exist and each one has its ownproperties and may be used in specific contexts.The choice of the appropriate device is importantsince it depends on the goal to be reached.

Selection of FACTS devicesIn an interconnected electrical network, powerflows obey Kirchoff’s laws. Usually, the value ofthe transverse conductance is zero and for mosttransmission lines, the resistance is small comparedto reactance. By neglecting the transversecapacitance, active and reactive power transmittedby a line between two buses 1 and 2 may beapproximated by the following relationships:

,sin 1212

2112 θ

XVVP = (1)

,)cos(11221

21

1212 θVVV

XQ −= (2)

WhereV1 and V2 :voltages at buses 1 and 2 ;X12 :reactance of the line ;θ12 :angle between V1 and V2 (underlinesvariable denotes a phasor).

Under normal operating conditions forhigh voltage lines V1≈ V2 and θ12 is typically small.In that case there is a decoupling between thecontrols of the flows of active versus reactivepower. Active power flow is coupled with θ12 andreactive power flow is linked to the difference V1-V2.The control of the value of X12 acts on both andmodify active and reactive power.

Four different types of devices have beenchosen to be optimally located in order to controlpower flows (fig. 1). Each of them is able tochange only one of the above-mentionedparameters. The first one is the TCSC (Thyristorcontrolled series capacitor), which permits tomodify the reactance of the line X12. To control thephase-angle θ12, the TCPST (thyristor- ControlledPhase Shifting Transformer) has been selected. TheTCVR (Thyristor- Controlled Voltage Regulator) ispicked up to act principally on V1-V2. Finally, theSVC (static Var Compensator) is used to absorb orinject reactive power at the midpoint of the line.

Fig.1

Modelling of FACTS DevicesThe models of the FACTS devices are developed tobe suitably for steady state. Each device may take afixed number of discrete values.The TCSC mayhave one of the two possible characteristics:capacitive or inductive, respectively to decrease orincrease the reactance of the line XL. It is modelledwith three ideal switched elements in parallel: acapacitance, an inductance and a simple wire,which permits the TCSC to have the value zero.The capacitance and the inductance are variableand their values are functions of the reactance ofthe line in which the device is located. In order toavoid resonance, only one of the three elements canbe switched at a time. Moreover, to notovercompensate the line, the maximum value of thecapacitance is fixed at –0.8XL.For the inductance,the maximum is 0.2XL.The TCPST acts by adding a quadrature component tothe prevailing bus devicevoltage in order to increase or decrease its angle.The model used for this is an ideal phase shifterwith series impedance equal to zero. It is insertedin series and may take values of angles comprisedin the range of –5 deg to +5deg. Zero is also apossible value for the TCPST.

The TCVR operates by inserting an in-phase voltage to the main bus voltage so as tochange its magnitude. An ideal tap changertransformer without series impedance is used tomodel for this controller. The value of the turn’sratio is given by the ratio V1/V2. It determines theadditional transformation and its values range from0.9 to 1.1 (1.0 corresponds to no additionaltransformation).

The SVC may have two characters:inductive or capacitive. In the first case it absorbs

reactive power while in the second one the reactivepower is injected. The SVC is modelled with twoideal switched elements in parallel: a capacitanceand inductance. It may take values characterized bythe reactive power injected or absorbed at thevoltage of 1 p. u.The values are between –100Mvarand 100 Mvar.

A graphical representation of the above-described model is shown in Fig. 2.Only oneFACTS device per line may be allowed. For theTCSC, TCPST, and TCVR, the devices are directlyintegrated to the model of the line. They areinserted in series with reactance and the reactanceof the line. For the SVC, the line is split into twoequal parts and the device is inserted in the middle.

Fig.2

Optimisation AlgorithmHeuristic methods may be used to solve

combinatorial optimisation problems. Thesemethods are called “intelligent,” because the movefrom one place to another is done using rules closeto the human reasoning. The heuristic algorithmssearch for a solution inside a subspace of the totalsearch space. Thus they are able to give a goodsolution of a certain problem in a reasonablecomputation time but they do not assure to reachthe global optimum. The most important advantageof heuristic methods lies in the fact that they arenot limited by restrictive assumptions about thesearch space like continuity, existence of derivativeof objective function, etc.

In this case study, Geneticalgorithms are chosen as the optimisation tool.Genetic algorithms are based on the mechanisms ofnatural selection. They always produce high qualitysolutions because they are independent of thechoice of initial configurations. Moreover, they arecomputationally simple and easy to implement.One of the drawbacks is their possibility toconverge prematurely to a suboptimal solution.

The optimal solution is sought after from apopulation of solutions using random process. Anew generation is created by applying to the

current population the three following operators:reproduction, crossover and mutation. Thereproduction is a process dependant of an objectivefunction to maximise or minimize according to thecases.

Description of the Used Genetic AlgorithmThe goal of the optimisation is to find the

best location of a given number of FACTS devicesin accordance with a defined criterion. Aconfiguration of nf Facts devices is defined withthree parameters: the location of the devices, theirtypes and their values. In order to take into accountthe three aforementioned parameters in theoptimisation, a particular coding is developed. Anindividual is represented with three strings oflength nF , where nF is the number of the devices tolocate optimally.

The first string corresponds to the locationof the devices. It contains the numbers of the lineswhere the FACTS are to be located. Each linecould appear at maximum once in the string. Theorder of the lines in the string is not important for agiven configuration, but could have its importancewhen applying the operator of crossover. Note thatthe number of the lines is related with the order ofthe branches in the description file of the powersystem. The second string is related to the types ofthe devices. A value is assigned to each type ofmodelled FACTS device: 1 for TCSC; 2 forTCPST; 3 for TCVR, and 4 for SVC at the midpoint of the line. By this way other new types ofFACTS may be easily added.

The last string of the individual representsthe value of the devices. It can take nv discretevalues contained between 0 and1; 0 correspondingto the minimum value that the device can take and1 to the maximum. According to the model of theFACTS, the real value of the device vrealF iscalculated with relation:vrealF = vminF + (vmaxF –vminF) vF,

where vminF and vmaxF are respectively theminimum and the maximum setting value of thedevice, and vF is the its normalised value.

Fig. 3 gives an example of configurationof five FACTS devices on a 7- bus, 11-branchnetwork and the corresponding three coded strings.A TCSC is located on branch 1. Its value is acapacitance of –0.5XL1, where XL is the reactanceof the line. A TCPST, producing a phase shifting of–40 on the voltage, is present on branch 5. TwoTCVR are located on lines 6 and 8. Their voltagetransformations are respectively 1.0 and 1.1.Finally, a SVC is situated in the middle of the linenumber 10. It is inductive and absorbs a reactivepower of 20 Mvar at V=1.0 p.u.

Fig.3For a given power system of nb branches, the

initial population is generated from the followingparameters:

• nf the number of FACTS devices to belocated optimally

• The different types of devices to belocated

• nv the number of possible discrete settingsfor aq device

• ni the number of individuals of thepopulation.

The creation of an individual is done in threestages. First, a set of nf branches of the network arerandomly drawn and is put in the first string. Aspreviously mentioned, the order of the branches isnot important and different individuals mayrepresent the same configuration of FACTSdevices .After drawing the branches where theFACTS devices will be located, the next two stepsconsists in the attribution of of the characteristicsof the devices. The second string, referred to thetypes of the devices, is obtained by randomlydrawing numbers among the selected device. Thusif it is decided to optimally locate only one type ofdevice, this string will contain the same character.Setting values of the devices are finally randomlydrawn among the nv possible. To obtain the entireinitial population, these operations are repeated nitimes.

Then, the objective function is computedfor every individuals of the population. Itrepresents a mathematical, translation of theoptimisation to realise and does not have to becontinuous or derivable. It has to be elaborated soas to favour the reproduction of interesting others.In our case, the objective function is defined inorder to quantify the impact of the FACTS deviceson the state of the power system. The move to a

new generation is done from the results obtainedfor the old generation. A biased roulette wheel iscreated from the obtained values of the objectivefunction of the current population as represented inFig. 4. After that, the operators of reproduction,crossover and mutation are applied successively togenerate the offspring.

In turn, two individuals are randomlydrawn from the population and reproduced. Theprobability of drawing an individual is proportionalto its part on the biased roulette wheel. Fig.5 showsthe process of reproduction.

Fig 4

Fig.5The crossover may occur with a

probability pc; generally close to 1. A doublecrosser is applied. Two crossing sites are picked upuniformly at random along the individuals.Elements outside these two points are kept to bepart of the offspring. Then, from the first positionof the crossover to the second one, elements of thethree strings of both parents are exchanged. Aspreviously mentioned, only one FACTS device perbranch is authorized. Therefore, if the crossoverleads to place a second device on a branch, acorrection has to be applied. In the case where anelement of the first string already occupies aposition in the kept part of the parent, it is replacedby the element corresponding to the same positionin the other parent. This algorithm is repeated untilan element not already present in the string isreached. Fig. 6 illustrates a crossover between twoindividuals. A correction has to be applied on thesecond offspring. The element 8 is already presentat the fourth position of the string. Therefore, theelement 8 at the third position is replaced by the

fourth element of the first parent, whichcorresponds to the element 5.

Fig.6

Mutations are possible independently on allelements of the three strings of an individual. Aspecific probability is applied for each string: pmLfor the first string, pmT for the second and PmV forthe last. These probabilities change with thegenerations. When a mutation occurs on the firststring, the one related to the location, a new lineamong the set of branches having no FACTSisrandomly drawn. In the case of mutation on thetwo other strings, a new value is drawn among theset of possible ones. Examples of mutations areshown in Fig. 7.

Fig.7Operations of selection, crossover and

mutation are repeated until the number of desiredoffsprings is created. The objective function is thencalculated for every offsprings and the ni bestindividuals among the entire pool, comprisingparents and their offsprings, are kept to constitutethe new generation. By this way, the objectivefunction of the best individual of the newgeneration will be the same or higher than theobjective function of the best individual of theprevious generation. Similarly, the average fitnessof the population will be the same or higher thanthe average fitness of the previous generation.Thus the fitness of the entire population and thefitness of the best individual are increasing for eachgeneration.

Objectives of the optimizationThe goal of the optimization is to perform a bestutilization of the existing transmission lines. In this

respect, the FACTS devices are located in order tomaximize the system load ability while observingthermal and voltage constraints. In other words, itis looked for increasing as much as possible thepower transmitted by the network to theconsumers, keeping the power system in a securestate in terms of branch loading and voltagelevels.The objective function is built in order topenalize the configurations of FACTS leading tooverloaded transmission lines and over- or under-voltages at buses. Only the technical benefits of theFACTS controllers, in terms of loadability, aretaken into account. Other criteria such as costs ofinstalling and maintaining devices are not takeninto consideration presently.

As commonly done for multi-criteriaconstrained optimization, the problem istransformed into a single objective optimizationproblem. The objective function is defined as asum of two terms with individual criteria. The firstone is related to the branch loading and penalizesoverloads in the lines. This term, called OVl , iscomputed for every line of the network. While thebranch loading is less than 100%, its value is equalto 1; then it decreases exponentially with theoverload. To accelerate the convergence, theproduct of all objective function is taken. Thesecond part of the objective function concernsvoltage levels. It favours buses voltages close to 1p.u. The function is calculated for all buses of thepower system. For voltage levels comprisedbetween 0.95 p.u. and 1.05 p.u., the value of theobjective function Vtg is equal to 1. Outside thisrange, the value decreases exponentially with thevoltage deviation. Therefore, for a configuration ofFACTS devices, the objective function Cfg is givenby: ∏∏ +=

busbus

lineline VtgOvlgfC , (4)

where functions Ovl and Vtg arerepresented in Fig. 8. λOvl and λVtg are respectivelytwo coefficients used to adjust the slope of theexponentials.

Fig .8-(a)

Fig. 8-(b)Optimizations are carried out with a tool

developed in Matlab® language. Power flows aresolved with a modified version of the free Matlab®power simulation package Matpower 2.0.Simulations are performed on a 118-bus, 187 linestest power system. Generators are modelled as PV-node and loads as PQ-node. The line is modeledusing the classical -scheme, valid for electricallyshort lines.Optimization StrategyAs explained previously, the aim is to find themaximum amount of power that the power systemis able to supply without overloaded line and withan acceptable voltage level. We look for locating agiven number of FACTS devices to increase asmuch as possible the capacity of the network. Forseveral number of FACTS devices, the bestlocation with the best values of the mostappropriate controllers is sought. When thenumber of devices is increased, the results obtainedpreviously are not taken into account. In otherswords, FACTS devices may disappear fromspecific lines to reappear on others when theirnumber is increased.

For a given number of devices, the strategy consistsof adding to the power supplied as long as aconfiguration of FACTS permits to keep the powersystem in a secure state. Starting from an initialload, the GA described in previous section isapplied recursively. The stop criterion is either themaximum number of generations or a solution withan objective function equal to 1. In the first case thealgorithm is stopped, otherwise the load is raisedand a new optimization starts again. All loads areincreased in the same proportion and real power ofgenerators as well. Additional losses due to theincreasing of the power transmitted are shared outamong all the generators proportionally to theirpower. The whole optimization strategy issummarized in Fig. 9. To compare the benefit ofmulti-type FACTS devices, simulations are alsoperformed only for a single-type of device, namelyTCSC, TCPST, TCVR and SVC.

Fig .9Observed Results from the case studyFor all the types of FACTS devices, the optimallocation allows to increase the system loadability.There are a maximum number of devices beyondwhich the efficiency of the network cannot befurther improved. According to the usedoptimization criterion and for the considered powersystem, the results show that the limit is about 30devices.

For a single-type optimization, thesimulations show that the TCSC are the mostefficient, before TCPST and TCVR. SVC permit toincrease the system loadability too, but less thanwith the other devices as expected. Simultaneoususe of all the types of devices is the most efficient.In this case, each type of device is located to satisfyspecific purpose. Until 5 devices the difference ofbenefit is not valuable, then it increases to reach alimit of 5% with 30 devices.

The obtained results are shown in Fig. 10.Values are related to the maximum power that canbe supplied without FACTS devices while keepingthe power system in secure state. It corresponds toan active power of 3651(MW) and a reactive powerof 1438(MVar).

Fig.10.

ConclusionA case study has been done on the application ofgenetic algorithm to optimally locate multi-typeFACTS devices in a power system. Four types ofcontrollers were chosen and modeled for steady-state studies. Optimizations were performed onthree parameters: the locations of the devices, theirtypes, and their values. The system loadability wasemployed as measure of power systemperformance. A difference of efficiency on theloadability of the used devices has been quantified.Moreover, results have shown that thesimultaneous use of several kinds of FACTS wasthe most efficient solution to increase the systemloadability. For all the types of device, even withmulti-type devices, it is observed that there is amaximum number of FACTS devices beyondwhich this loadability cannot be improved.

REFERENCES[1]Stéphane Gerbex,Rachid Cherkaoui, and AlainJ. Germond,“Optimal Location of Multi-TypeFACTS Devices in a Power System by Means ofGenetic Algorithms”,IEEE Transactions On PowerSystems, Vol. 16, No. 3, August 2001.

[2] N. G. Hingorani and L. Gyugyi, UnderstandingFACTS Concepts andTechnology of Flexible AC Transmission Systems.Piscataway: IEEE Press, 1999

[3] F. D. Galiana, K. Almeida, M. Toussaint, J.Griffin, and D. Atanackovic,“Assessment andcontrol of the impact of FACTS devices on powersystem performance,” IEEE Trans. Power Systems,vol. 11, no. 4, Nov.1996.

[4] D. E. Goldberg, Genetic Algorithms in SearchOptimization and Machine Learning: Addison-Wesley Publishing Company, Inc., 1989

[5] S.Gerbes R.Cherkaoui and A.J Germond"Optimal location of FACTS devices in a powersystem using genetic algorithms", In proceedingsof the 13 power systems computationconference,1999, pp 1252-1259

APPLICATION OF STATCOM AND TCSC FOR IMPROVEMENT OFSYSTEM DYNAMIC PERFORMANCE

Dr R. Sreeram KumarDepartment of Electrical Engineering

National Institute Technology, Calicut

1. Application of STATCOM for TransientStability Improvement

The ability of the STATCOM to maintainfull capacitive output current at low system voltagealso makes it more effective than the SVC inimproving the transient (first swing) stability. Theeffectiveness of the STATCOM in increasing thetransmittable power is illustrated in Figure 1, wherethe transmitted power P is shown against thetransmission angle δ for the usual two-machinemodel at various capacitive ratings defined by themaximum capacitive output current ICmax. Forcomparison, an equivalent P versus δ relationship isshown for an SVC, behaves like an ideal midpointshunt compensator with P versus δ relationshipdefined by P = (2 V2/X) sin (δ/2) until themaximum capacitive output current ICmax is reached.From this point, the STATCOM keeps providing thismaximum capacitive output current (instead of afixed capacitive admittance like the SVC),independent of the further increasing angle δ and theconsequent variation of the midpoint voltage. As aresult, the sharp decrease of transmitted power P inthe πδπ <<2/ region, characterizing the powertransmission of an SVC supported system, is avoided

and the obtainable ∫ δPd area representing the

improvement in stability margin is significantlyincreased. That the transmittable power can beincreased if the shunt compensation is provided by aSTATCOM rather than by an SVC, or, for the samestability margin, the rating of the STATCOM can bedecreased below that of the SVC.2. Application of TCSC for StabilityImprovement2.1 Improvement of Transient Stability

As discussed in the previous notes, transientstability improvement by controlled shuntcompensation is achieved by increasing the powertransmission via increasing (or maintaining) the(midpoint) transmission line voltage during theaccelerating swing of the disturbed machine(s). Thepowerful capability of series line compensation tocontrol the transmitted power can be utilized muchmore effectively to increase the transient stabilitylimit and to provide power oscillation damping.Consider the simple system with the seriescompensated line shown in Figure 2a. Suppose thatthis system with and without series capacitivecompensation, transmits the same power Pm. Assume

that both the uncompensated and the seriescompensated systems are subjected to the same faultfor the same period of time. The dynamic behaviourof these systems is illustrated in Figures 3 (a) and (b).As seen, prior to the fault both of them transmitpower Pm at angles δ1 and δs1, respectively. Duringthe fault, the transmitted electric power becomes zerowhile the mechanical input power to the generatorsremains constant, Pm. Therefore, the sending-endgenerator accelerates from the steady-state angles δ1and δs1 to angles δ2 and δs2 , respectively, when thefault clears. The accelerating energies arerepresented by areas A1 and As1. After fault clearing,the transmitted electric power exceeds the mechanicalinput power and therefore the sending-end machinedecelerates. However, the accumulated kineticenergy further increases until a balance between theaccelerating and decelerating energies, represented byareas A1, As1, and As2, respectively, is reached at themaximum angular swings, δ3 and δs3, respectively.The areas between the P versus δ curve and theconstant Pm line over the intervals defined by anglesδ3 and δcrit, and δs3 and δscrit, respectively, determinethe margin of transient stability, represented by areasAmargin and Asmargin.

Comparison of Figures 3 (a) and (b) clearlyshows a substantial increase in the transient stabilitymargin the series capacitive compensation canprovide by partial cancellation of the seriesimpedance of the transmission line. The increase oftransient stability margin is proportional to the degreeof series compensation. Theoretically this increasebecomes unlimited for an ideal reactive line as thecompensation approaches 100%. However, practicalseries capacitive compensation does not usuallyexceed 75% for a number of reasons, including loadbalancing with parallel paths, high fault current, andthe possible difficulties of power flow control. Oftenthe compensation is limited to less than 30% due tosubsynchronous concerns.

It is emphasized here again that underpractical fault scenarios the pre-fault and post-faultsystems are generally different. From the standpointof transient stability, and of overall system security,the post-fault system is the one that matters. That is,power systems are normally designed to betransiently stable, with defined pre-fault contingencyscenarios and post-fault system degradation, whensubjected to a major disturbance. For this reason, inmost practical systems, the actual capacity of

SRK-C1

transmission networks is considerably higher thanthat at which they are normally used. The powerfulcapability of series compensation, with sufficientlyfast controls, to handle dynamic disturbances andincrease the transmission capability of post fault orotherwise degraded systems, can be effectively usedto reduce the “by-design” underutilization of manypower systems.2.2 Power Oscillation Damping

Controlled series compensation can beapplied effectively to damp power oscillations. Forpower oscillation damping it is necessary to vary theapplied compensation so as to counteract theaccelerating and decelerating swings of the disturbedmachine(s). That is, when the rotationally oscillatinggenerator accelerates and angle δ increases (dδ/dt>0),the electric power transmitted must be increased tocompensate for the excess mechanical input power.Conversely, when the generator decelerates and angleδ decreases (dδ/dt<0), the electric power must bedecreased to balance the insufficient mechanicalinput power.

The required variation of the degree of seriescompensation, together with the correspondingvariation of the transmission angle δ and transmittedpower P versus time of an under-damped oscillatingsystem are shown for an illustrative hypothetical casein Figure 4. Waveforms in Figure 4(a) show theundamped and damped oscillations of angle δ aroundthe steady-state value δ0. Waveforms in Figure 4(b)show the corresponding undamped and dampedoscillations of the electric power P around the steady-state value P0, following an assumed fault (suddendrop in P) that initiated the oscillation. Waveform cshows the applied variation of the degree of seriescapacitive compensation, k, applied. As seen, k ismaximum when dδ/dt>0, and it is zero when dδ/dt<0.With maximum k, the effective line impedance isminimum (or, alternatively, the voltage across theactual line impedance is maximum) andconsequently, the electric power transmitted over theline is maximum. When k is zero, the effective lineimpedance is maximum (or, alternatively, the voltageacross the actual line impedance is minimum) and thepower transmitted is minimum.2.3 Subsynchronous Oscillation Damping

Large generators with multistage steamturbines, which have multiple torsional modes withfrequencies below the power frequency, are mostsusceptible to subsynchronous resonance with seriescapacitor compensated transmission lines. In order tobe able to fully exploit the functional capabilities ofcontrolled series capacitive compensation for powerflow control, transient stability improvement andpower oscillation damping, it is imperative that theseries compensator, as a minimal requirement,remains passive (nonparticipating) to, or, preferably,actively mitigates subsynchronous resonance. Powerelectronics-based series compensators can meet this

requirement either by their non-capacitivecharacteristic in the subharmonic frequency range ofinterest or by active, control-initiated damping action.ReferenceN.Hingorani, “Flexible AC Transmission Systems”,(Book)

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UNIFIED POWER FLOW CONTROLLER (UPFC) – AN INTRODUCTIONSuresh Kumar K.S

AP,EED,NIT Calicut1. Introduction

Gyugyi proposed the Unified Power Flow Controller (UPFC) concept in 1991[3]. The UPFCwas devised for the real time control and dynamic compensation of ac transmission systems,providing multifunctional flexibility required to solve many of the problems facing the deliveryindustry[1-3] . Within the framework of traditional power transmission concepts, the UPFC is ableto control, simultaneously or selectively, all the parameters affecting power flow in the transmissionline (i.e., voltage, impedance and phase angle), and this unique capability is signified by theadjective “unified” in its name. Alternatively, it can independently control both the real and reactivepower flows in the line.2. Circuit Arrangement:

In the presently used practical implementation, the UPFC consists of two switchingconverters, which in the implementations considered are voltage source inverters using gate turn-off (GTO) thyristor valves, as illustrated in the Fig 2.1.These back to back converters labeled “Inverter 1” and “ Inverter 2” in the figure, are operated from a common dc link provided by a dcstorage capacitor. This arrangement functions as an ac to ac power converter in which the realpower can freely flow in either direction between the ac terminals of the two inverters and each

inverter can independently generate (or absorb) reactive power at its own ac output terminal. Fig 2.1. Basic circuit arrangement of unified power flow controller

3. Operation of UPFCInverter 2 provides the main function of the UPFC by injecting an ac voltage Vpq with

controllable magnitude Vpq (0≤ Vpq ≤ Vpqmax) and phase angle ρ(0 ≤ ρ ≤ 360), at the powerfrequency, in series with the line via an insertion transformer. The injected voltage is consideredessentially as a synchronous voltage source. The transmission line current flows through thisvoltage source resulting in real and reactive power exchange between it and the ac system. Thereal power exchanged at the ac terminal (i.e.,at the terminal of insertion transformer) is convertedby the inverter into dc power that appears at the dc link as positive or negative real powerdemanded. The reactive power exchanged at the ac terminal is generated internally by theinverter.

The basic function of Inverter 1 is to supply or absorb the real power demanded by Inverter2 at the common dc link. This dc link power is converted back to ac and coupled to thetransmission line via a shunt-connected transformer. Inverter 1 can also generate or absorbcontrollable reactive power, if it is desired, and there by it can provide independent shunt reactivecompensation for the line. It is important to note that where as there is a closed “direct” path forthe real power negotiated by the action of series voltage injection through Inverters 1 and 2 back tothe line, the corresponding reactive power exchanged is supplied or absorbed locally by inverter 2and therefore it does not flow through the line. Thus, inverter 1 can be operated at a unity power

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factor or be controlled to have a reactive power exchange with the line independently of thereactive power exchanged by the by the Inverter 2. This means there is no continuous reactivepower flow through UPFC.4. Basic Control Functions

Operation of the UPFC from the standpoint of conventional power transmission based onreactive shunt compensation, series compensation, and phase shifting, the UPFC can fulfill thesefunctions and thereby meet multiple control objectives by adding the injected voltage Vpq, withappropriate amplitude

and phase angle, to the terminal voltage Vo. Using phasor representation, the basic UPFC powerflow control functions are illustrated in Fig. 2.

Terminal Voltage Regulation, similar to that obtainable with a transformer tap- changerhaving infinitely small steps, as shown at (a) where Vpq =∆V (boldface letters represent phasors) isinjected in-phase (or anti-phase) with Vo.

Series Capacitor Compensation is shown at (b) where Vpq =Vc is in quadrature with theline current I.

Transmission Angle Regulation (phase shifting) is shown at (c) where Vpq=Vo is injectedwith angular relationship with respect to Vo that achieves the desired s phase shift (advance orretard) with out any change in magnitude.

Vo

Vo+∆VoVc

Vo+VcVo

(a) voltage regulation

(c) Phase angle Regulation

Vσ

Vo+VσVo σ

Fig. 2 - Basic UPFC control functions: (a) Voltage regulation, (b) Series compensation, (c) Angleregulation, and (d) Multifunction power flow control

VpqVo

Vc Vc

(d) Multi-function Power flow control

∆Vo

Vo+∆V0+Vc+Vσ

(b) series compensation

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Multifunctional Power Flow Control, executed by simultaneous terminal voltageregulation, series capacitive compensation, and phase shifting, is shown at (d) where Vpq =∆V+Vc+Vo

5. Basic Principles of P and Q Control [1,3]Consider Fig 3. At (a) a simple two machine (or two bus ac inter-tie) system with sending

end voltage Vs, receiving-end voltage Vr, and line (or tie) impedance X (assumed, for simplicity,inductive) is shown. At (b) the voltages of the system in the form of a phasor diagram are shownwith transmission angle δ and |Vs|=|Vr|=V. At (c) the transmitted power P (P=V2/X sinδ) and thereactive power Q=Qs=Qr (Q= V2/X (1-cosδ)) supplied at the ends of the line are shown plottedagainst angle δ. At (d) the reactive power Q=Qs=Qr is shown plotted against the transmitted powerP corresponding to “stable values of δ (i.e., 0≤δ≤90°).

The basic power system of Fig 3 with the well known transmission characteristics isintroduced for the purpose of providing a vehicle to establish the capability of the UPFC to controlthe transmitted real power P and the reactive power demands, Qs and Qr, at the sending end,respectively, the receiving end of the line.

Consider Fig 4.The simple power system of Fig 2.3 is expanded to include the UPFC. TheUPFC is represented by a controllable voltage source in series with the line which, as explained inthe previous section, can generate or absorb reactive power that it negotiates with the line, but thereal power it exchanges must be supplied to it, or absorbed from it, bye the sending end generator.The UPFC in series with the line is represented by the phasor Vpq having magnitude Vpq (0≤ Vpq ≤

Fig 3. -Simple two machine system (a), related voltage phasors (b), real and reactive power verses transmission angle (c), and sending-end/ receiving- end reactive power verses transmitted real power(d).

X

Vs V

Qs QP

(a

δ |Vs|=|Vr|

Vs

Vx

Vr

P=V2/X sinδ

2

(b)

QsQr

(d)

0P 1

1

QsQrP

Qs,Qr

P

90

22

0 δ(c)

δ=90

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Vpqmax) and angle ρ(0 ≤ ρ ≤ 360) measured from the given phase position of phasor Vs, asillustrated in the figure. The line current represented by the phasor I, flows through the seriesvoltage source, Vpq, and generally results in both reactive and real power exchanges.

In order to represent UPFC properly, the series voltage source is stipulated to generateonly the reactive power Qpq it exchanges with the line. Thus the real power P pq it negotiates withthe line is assumed to be transferred to the sending-end generators if a perfect coupling for realpower flow between it and the sending-end generator excited. This is in arrangement with theUPFC circuit structure in which the dc link between the two constituent inverters establishes a bi-directional coupling for real power flow between the injected series voltage source and the sendingend bus.

As Fig 4 implies, in the present discussion it is further assumed for clarity that the shuntreactive compensation capability of the UPFC not utilized. This is the UPFC shunt inverter isassumed to be operated at unity power factor, its sole function being to transfer the real powerdemand of the series inverter to the sending-end generator. With these assumptions, the seriesvoltage source, together with the real power coupling to the sending end generator as shown in fig4, is an accurate representation of the basic UPFC.

It can be readily observed in Fig 4 shows that the transmission line “sees” Vs+Vpq as theeffective sending end voltage. Thus it is clear that the UPFC effects the voltage (both its magnitudeand angle) across the transmission line and therefore it is reasonable to expect that it is able tocontrol, by varying the magnitude and angle of Vpq, the transmittable real power as well as thereactive power demand of the line at any given transmission angle between the sending-end andreceiving-end voltages.6. Independent Real And Reactive Power Flow Control

In Fig 5(a) through 5(d) the reactive power Qs supplied by thesending end generator, and Qr supplied by the receiving-end generator, are shown plottedseparately against the transmitted power P as a function of the magnitude Vpq and angle ρ of theinjected voltage phasor Vpq at four transmission lines: δ=0, 30°, 60°, and 90°. At Vpq=0, each of theseplots becomes a discrete point on the basic Q-P curve as shown in Fig 3 (d), which is included ineach of the above figures for reference. The curves showing the relationships between Qs and P,and Qr and P, for the transmission angle range of 0≤δ≤90°, when the UPFC is operated to providethe maximum transmittable power with no reactive power control (Vpq=Vpqmax and ρ=ρP=Pmax), are

VrVs

Vpq Vx

Vr

ρ

δ

Ppq

Vs

P VxQs QrVpq

Fig 4.Two machine system with the unified power flow controller

SK11 9

also shown by a broken-line with the label “P(δ)=MAX” at the “sending end” and, respectively ,“receiving-end” plots of the figures.

Fig 5(a)&5(b). Attainable sending-end reactive power vs.transmitted power (left hand side plots)and receiving-end reactive power Vs transmitted power(right hand side plots) values with the UPFC at δ=0° and δ=30°.

SK11 10

Fig 5(c)&5(d). Attainable sending-end reactive power vs.transmitted power (left-hand side plots) and receiving-end reactive power Vs transmitted power (right hand side plots) values with the UPFC at δ=60°and δ=90°.

Consider the first Fig. 5(a), which illustrates the case when the transmission angle is zero(δ=0). With Vpq=0, P, Qs, and Qr are all zero, i.e., the system is standstill at the origins of the Qs, P,and Qr, P coordinates. The circles around the origin of the Qs, P and Qr, P planes show thevariation of Qs and P, and Qr and P, respectively. As the voltage phasor Vpq, with its maximummagnitude Vpqmax is rotated a full revolution (0≤ρ≤360°). The area with in these circles define all Pand Q values obtainable by controlling the magnitude Vpq and ρ of the phasor Vpq.

In other words, the circle in the Qs, P and Qr, p planes define all P and Qs and,respectively, P and Qr values attainable with the UPFC of a given rating. It can be observed, forexample, that the UPFC with the stipulated voltage rating of 0.5 p.u. is able to establish 0.5 p.upower flow, in either direction, without imposing any reactive power demand on either the sending-end or the receiving-end generator. Of course, the UPFC, as seen, can force the generator at oneend to supply reactive power for the generator at the other end. (In case of intertie, one system canbe forced to supply reactive power of the line.)

In general at any given transmission angle δ, the transmitted real power P, and the reactivepower demands at the transmission line ends, Qs and Qr, can be controlled freely by the UPFC

SK11 11

within the boundaries obtained in the Qs, P and Qr, P planes by rotating the injected voltagephasor Vpq with its maximum magnitude a full revolution. The boundary in each plane is centeredaround the point defined by the transmission angle on the Q verses P curve that characterizes thebasic power transmission at Vpq=0.

Consider the next case of δ=30°(Fig. 5(b)), it is seen that the receiving-end control regionboundary in the Qs, P plane become an ellipse. As the transmission angle δ is further increased,for example, to 60° (Fig.5(c)), the ellipse defining the control region for P and Qs in the Qs, Pplane becomes narrower and finally 90° (Fig.5 (d)) it degenerates into a straight line. By contrast,the control region boundary for p and Qr in the Qr, P) plane remains a circle at all transmissionangles.7. Summary

In summary, the UPFC, with its unique capability to control independently the real andreactive power flow at any transmission angle provides a powerful new tool for transmissionsystem control.8. References

[1]L.Gyugyi, C.D. Schauder, S.L. Williams, T.R.Rietman, D.R.Torgerson, A.Edris,”The Unified Power FlowController: A New Approach to Powe Transmission Control”, IEEE Trans .on Power Delivery, Vol.10, No.2April 1995,pp.1085- 1097.[2]L.Gyugyi, “ Unified Power Flow Concept for Flexible Ac Transmission Systems” IEEE Proc-C, Vol.139, No.4, July1992, pp.323-332.[3] Narian G.Hingorani, Laszio Gyugyi “ Understanding FACTS “ Concepts and Technology of Flexible ACTransmission Systems , First edition 2001, IEEE press.

SK12 18

CONTROL OF A UNIFIED POWER FLOW CONDITIONERSuresh Kumar K.S

AP,EED,NIT Calicut1. Vector Representation of Instantaneous Three Phase Quantities:

The notion of the real and reactive power is well known in the phasor sense. However, tostudy and control the dynamics of the UPFC within subcycle frame and subject to line distortions,disturbances and unbalance, we need a broader definition of reactive power which is valid on aninstantaneous basis [4].

The instantaneous real power at a point on the line is given by P=VaIa+VbIb+VcIc. We candefine instantaneous reactive voltages conceptually as a part of the three-phase voltage set thatcould be eliminated at any instant without altering p. The definition of instantaneous reactivevoltage is obtained by vector interpretation of the instantaneous values of the circuit variables.

A set of three instantaneous phase variables that sum to zero can be uniquelyrepresented by a single point in a plane, as illustrated in Fig.1. By definition, the vector drawnfrom the origin to this point has a vertical projection onto each of the three symmetricallydisposed phase axis, which corresponds to the instantaneous value of the associated phasevariable. This transformation of phase variables to instantaneous vectors can be applied tovoltages as well as currents. As the values of phase variables change, the associated vectormoves around the plane describing various trajectories. The vector contains all the information onthe three-phase set, including steady-state unbalance, harmonic waveform distortions, andtransient components.

2. Three Phase to D-Q TransformationIn Fig 2, the vector representation is extended by introducing an orthogonal co-ordinate

system in which each vector is described by means of its ds- and qs- components. Thetransformation of phase variables to ds and qs co-ordinates is as follows.

Fig.1 Vector representation of instantaneous three-phase variables

Va(+)

Ib(-)

Ic(+)

+A-phase axis

+C-phase axis

+B-phase axis

I

SK12 19

If Va, Vb, Vc are balnced set of voltages Va= √2 Vrms sinωt,

Vb= √2 Vrms sin(ωt-120), Vc= √2 Vrms sin(ωt-240)

then by using the above trasformation matrix, the ds and qs axis coordinates are given by Vds = Vrms cosωt Vqs = -Vrms sinωt (2)The per unit values represent rms qunatities.The constants are derived based on powerinvarience principle =>Va Ia+ Vb Ib+ Vc Ic =Vds Ids +Vqs IqsThe inverse trasformation matrix is given by Vold = C1 Vnew

+qs-axis

+ds-axis

Fig.3.2 Definition of orthogonal co-ordinates

(A-axis)

(C-axis)

MMFdirection

[ ] )1(

21

21

21

221

23

230

2321

111

−−

−

=−C

SK12 20

Single phase per-unit system is used and the per-unit values represent rms quantities. Fig.3 shows how further manipulation of vector coordinate frame leads to a useful

separation of variables for power control purposes. The d-axis voltage component Vd, accounts

for real component and q-axis voltage Vq, is the instantaneous reactive component. The d and qaxes are not stationary in the plane. They follow the trajectory of the voltage vector, and the dand q co-ordinates within this synchronously reference frame are given by the following time-varying transformation:

The transformation matrix in synchronously revolving reference frame is given by

For balanced set of phase voltages Va= √2 Vrms sin(ωt-θ) Vb= √2 Vrms sin(ωt-120-θ) Vc= √2Vrms sin(ωt-240-θ) and θ=ωt. the d and q axis components are given by Vd = Vrms cosθ Vq = -Vrms sinθ

Under balanced steady-state conditions, the co-ordinates of the voltage and currentvectors in synchronous reference frame are constant quantities. The inverse transformation insynchronous reference frame is [C]-1=[C]t

The d-q axis real power component is P= Vd Id + Vq Iq and the reactive power is given byQ= -Vq Id + Vd Iq. These represent power in single-phase quantities. This can be summarized thisway, defining complex vectors in d-q plane is

[ ] )4(cossinsincos

2

−

=θθθθ

C

[ ] )3(

211

23

21

223

2110

21

2

1

−

−−=C

d-axis

q-axis

qs-axis

ds-axis

θ

Fig. 3 Transformation in rotating reference frame

SK12 21

V∧ = Vd + j Vq, I∧ = Id +j Iq P + jQ = V I* = ( Vd I d + Vq Iq )+ j (Vq I d –Vd I q )

3. Transformation of Impedance Matrix [5] The transformation is explained by considering a simple three-phase

system as shown in Fig 4

The balanced three-phase system can be transformed into a synchronously rotatingorthogonal system.

Znew = C1t Z old C

in the ds- qs plane the impedance matrix transformed into

Now in the synchronously revolving reference frame ( d-q transformation) the impedancematrix is transformed into

Where P= d/dt , the voltage equations after d-q transformation is given bythe above equation can be written as

V1a

V1b

V1c

V2a

V2b

V2c

La

Lb

Lc

Ra

Rc

Rb

Fig 4 Simple balanced system

Ia

)5(00

0000

21

21

21

++

+=

−−−

iii

VVVVVV

c

b

a

cc

bb

aa

PLRPLR

PLR

)6(0

0PLR

PLRZ new +

+=

)7('

PLRLLPLR

Z new +−+

=ω

ω

)8(11

21

+−+

=

−−

ii

VVVV

d

d

qq

dd

PLRLLPLR

ωω

)9(21

LLR

dtd VViii dd

qdd −

++−= ω

)10(21

LLR

dt

d VViii qqdq

q−

+−−= ω

SK12 22

per-unit system is adopted according to the following definitions:

by using the per unit system the above equations rewritten as

Where ωb = base frequency

ω = synchronously rotating system frequencyThe significance of the transformation summarized as follows:1. The physical significance of the phase transformation C1 is therefore to replace the actual threephase system by an equivalent two phase system.2. The original circuit produced in Fig 4 gave rise to an impedance matrix Z with nine non-zero terms. The transformed impedance matrix Z’ has only four terms.4. Controller Design [6-8]

A control strategy, in general, should preferably have the following attributes:1. Steady state objectives (i.e. real and reactive power flows) should be readily

achievable by setting the references of the controllers.2. Dynamic and transient stability improvement by appropriate modulation of

controller references.To simplify the design procedure we carry out the design of the series and shunt branches

separately. In each case, the external system is represented by a simple equivalent. The designhas to be validated when the various sub systems are integrated.

The design tasks are listed below:1. Series injected voltage control:a. Power flow control by series voltage injection.b. UPFC port 2-voltage control by series voltage injection.2. Shunt converter voltage control a. Closed loop current (real and reactive) control b. UPFC port 1 voltage control using reactive current injection c. Capacitor voltage regulation using real current injection.The basic design considerations are illustrated using simplified system models. The

performance of all the controllers is subsequently evaluated using detailed simulations for a casestudy.

)11()(

'21

'

'

xxR

dtd VViii ddb

qdbd −

++−= ωω ω

)12()(

'21

'

'

xxR

dt

d VViii qqbdq

bq−

+−−= ωω ω

cbax

RL

e

zRzxivz

vevvvi

ii

BB

B

B

xx

B

xx

B

x

xB

xx

,,

;;

;;

'''

'''

=

===

===

ω

SK12 23

5. Series Injected Voltage Controller5.1 Power Flow Control

In this section we consider the control of real power using series voltage injection.We carry out analysis on the simplified system shown below in Fig.3.5. The differential equationsfor the current at port 2 in the D-Q (synchronously rotating at system frequency ω0 ) frame ofreference are given by:

The subscripts ‘D’ and ‘Q’ denote the variables in D-Q reference frame.

Power at the receiving end bus PR is approximately equal to that at port 2 ( Pu2 ) of theUPFC in the study state ; therefore we control the power at port 2 since the feed back signal isreadily available.

2port UPFCat the voltagesof componentsQD,

1port UPFCat the voltagesof componentsQD,

bus end receiving at the voltagesof componentsQD,

bus end sending at the voltagesof componentsQD,

22

11

−=

−=

−=

−=

vvvvvvvv

QD

QD

RQRD

SQSD

)13()(2 vvxiix

riRDD

se

bQseDse

se

bseDse

dtd

−++−= ωωω

evvevvQseQQ

DseDD

+=

+=

12

12

where,

)14()( 2 vvxiixri

RQQse

bDseQse

se

bse

rQse

dt

d−+−−= ωωω

+

Port 2

Xse Rse

VRVS

Fig.5 Simplified system UPFC

ese

)15(222 ivivP QseQDseD +=

SK12 24

Power delivered by the series converter isFrom the above equations we will get the actual D-Q currents flowing in the line.

References for D-Q currents is set by the required real power flow and the port 2 voltage.

Advanced Control Scheme [8]:-

The reference voltage vector for the series device e*se is generalized as follows:

From the above differential equations we can calculate the Kr, Kp , Kq values. The valuesare given by Kp= Kq = -Xse and Kr acts as the damping resistor

Note that the control scheme comprehends both phase angle and cross coupling controlschemes, so that it can be considered a generalized control scheme for UPFC. This scheme hastwo additional terms with identical gain Kr. A voltage vector produced by the two terms is in phasewith a current phasor vector of i*-i , paying attention to the polarity of the ese.

The above mentioned control strategy assumes that all quantities are referred to thesynchronously revolving reference frame at bus 1. Hence the actual d-q currents (referred toreceiving end bus) are transformed based on V1 reference as above before they are used in theabove control equation.Similarly the control references are transformed back into thesynchronously revolving reference frame at receiving end bus..

The assumption here for transient analysis is : the series device is assumed to be an idealand instantaneously controllable voltage source. Therefore, the output voltage vector ese is equalto its reference e*se .5.2 Port 2 Voltage Control

The voltage at port 2 of the UPFC is algebraically related to that at port 1 and the seriesvoltage injected for power flow control. (For simplicity the series transformer reactance is clubbedwith the line impedance). Since all the quantities are locally available, we can easily calculate theseries voltage to be injected to obtain desired magnitude of V2 .

The series injected controller diagram in d-q axis referred to bus 1 is given by:

)16(ieiep se

Q

se

Q

se

D

se

Dse+=

)18(*

*

*

*

−−

−=

iiii

KKKK

ee

QseQ

DseD

rp

qr

qse

dse

)17(31

31

1

Re2*

1

Re2*

VQ

iVPi f

Qsef

Dse==

δδ sincos' iiX QseDseD +=

)19()(tan

cossin

1

11

'

VV

iiX

D

Q

qseDseQ

−=

+−=

δ

δδ

( ) ( )( ) ( ) )20(

2

1

2

1

2

2

2

22

eVeV

VVV

QseQDseD

QD

+++=

+=

SK12 25

6 Shunt Current ControlThe shunt current is controlled by varying the magnitude and angle of the shunt converter

voltage. The dynamic equations in the D-Q frame are given by,

Where,rsh, xsh = shunt transformer resistance and leakage reactance respectively eDsh,eQsh= converter output voltage components V1D,V1Q= voltage components at the bus into which current injected (port 1 of UPFC)

)22()(

)21()(

1

1

vexiixri

vexiixri

QQshsh

bDshQsh

sh

bshQsh

DDshsh

bQshDsh

sh

bshDsh

dt

d

dtd

−+−−=

−++−=

ωωω

ωωω

θ

Iq

Id

V1

Ir Ip

Fig 7 Vector representation of real and reactive currents

PI+

PREF

PU2

Fig.6 Series injected voltage controller

÷

Vu1

I*D

XD

PI ÷Vu2REF

Vu2 Vu1

Q* I*Q

XQ

SeriesVoltageCalcula tor

eQse

eDse

SK12 26

The reactive and real currents are defined as

where,

The real and reactive voltages of the shunt converter is given by

In

shunt current control block we are calculating the shunt converter output voltages throughthe drop calculator block by using Idref and Iqref.

The differential equations used in drop calculator are

)24()()(1

)(tan

21

21

1

11

vvvvv

QD

Q

D

+=

= −θ

)25()cos()sin(

)sin()cos(

θθ

θθ

eeeeeeQshDshpsh

sQshDshRsh

+=

−=

)27(

)26(

1

1

ViXixiRe

ViXixiRe

qdshrefshqshref

b

shqshrefshpsh

dqshrefshdshref

b

shdshrefshRsh

dt

d

dt

d

+−−=

++−−=

− ω

ω

)23()(cos)sin(

)(sin)(cos

θθ

θθ

iiiiiiQshDshPsh

QshDshRsh

+=

−=

+V1REF PI

VDCREF PI

V1

VDC

Shunt

current

controls

ePshord

eRshord

Figure. 8. Shunt current controller

+

IRref

IPref

SK12 27

Port 1 voltages are calculated by adding shunt and series currents and from the givensending end voltage. The differential equations for port 1 voltage calculation is

The dynamical equation for the capacitor is given by

Any real power drawn / supplied by the series branch or by shunt branch (due to realcurrent injection Ipsh) manifests as DC side currents IDC

ser and IDCsh respectively. Since we allow

variable series voltage injection, and due to losses, the capacitor voltage tends change. Tocompensate this by IDC

sh, we set the real current reference (IPshref ) as the output of a PI typecapacitor voltage regulator.

REFERENCES

[1]L.Gyugyi, C.D. Schauder, S.L. Williams, T.R.Rietman, D.R.Torgerson, A.Edris,”The Unified Power FlowController: A New Approach to Powe Transmission Control”, IEEE Trans .on Power Delivery, Vol.10, No.2April 1995,pp.1085- 1097.[2]L.Gyugyi, “ Unified Power Flow Concept for Flexible Ac Transmission Systems” IEEE Proc-C, Vol.139, No.4, July1992, pp.323-332.[3]Sanbao Zheng And Yoke Lin Tan ‘ Dynamic Character Study of UPFC Based on Detailed Simulation Model ‘IEEE Power Conference 2000.[4]C.Schauder and H.Metha, “ Vector Analysis and Control of Advanced Static Var Compensator “, IEE Proc-C , Vol. 140, No.4, July 1993., pp. 299-306.[5]H.Fujita,Y.Watanabe, H. Akagi., ‘Control and Analysis of a Unified Power Flow Controller’ IEEE Trans.on Power electronics Vol.14 No.6.Nov 1999.[6]I.Papic, P.Zunko, D.Povh, M.Weinhold,” Basic Control Of Unified Power Flow Controller” IEEE Transactions On Power Systems, Vol.12, No.4.November 1997.[7]K.R.Padiyar, K.Uma Rao “ Modeling and Control Of Unified Power Flow Controller for Transient Stability”A Journal on Electrical Power and Energy Systems Vol.No.21 (1999) 1-11.[8]Padiyar, K.R., Kulakarni, A.M., ‘Control Design And Simulation Of Unified Power Flow Controller’ IEEETans. on Power Delivery, Vol.13, No.4, October 1998, pp.1348-1354.

)30()( iibVbgV

dsedshcap

bDC

cap

bcapDC

dtd

−+−= ωω

Dropcaliculator

Idshref

IqshrefV1q

V1d

edsh

edsh

Fig. 9 Converter voltage calculator

)29(

)28(

1

1

ViXixiRV

ViXixiRV

SQdLseqL

b

seqLseQ

SDqlsedL

b

sedLseD

dt

d

dtd

+−−=

++−−=

− ω

ω

SK13 1

SIMULATION OF UPFC USING MATLAB SIMULINK

Suresh Kumar K.S

AP,EED,NIT CalicutThe test system taken for simulation study of UPFC as shown below:

Specifications of the system

taken for testing the simulation study are:

Xse= 0.075 Rse= 0.0075

Xsh= 0.15 Rsh= 0.01 VDCRef =3.4 p.u

gcap= 0.02 bcap = 2

Vr = 1∠0, Laod 3 p.u with power factor 0.8 (lag).

All the above quantities are on the UPFC MVA base (33.33 MVA), which is assumed to be 1/3rd of

the transmission line MVA base. Notations used to represent simulated waveforms are:Ese = Series inverter output voltage.Esh = Shunt inverter output voltage.Eshrms= RMS value of series converter output voltageEserms= RMS value of series converter output voltageP1= Real power flow from sending end to port1 measured at port1.Q1=Reactive power flow from sending end to port1 measured at port1P2= Real power flow from port2 to receiving end bus measured at port2Q2=Reactive power flow from port2 to receiving end measured at port2Psh = Real power flow from port1 to shunt converter measured at port1Qsh= Reactive power flow from port1 to shunt converter measured at port1PL =Real power flow from port1 to load measured at port1QL=Reactive power flow from port1 to load measured at port1.Pse= Real power flow from series converter to port2 measured at port2.Qse=Reactive power flow from series converter to port2 measured at port2.VDC= Voltage across DC capacitorV1-A=Port1phase-A voltage.V2-A= Port 2 phase-A voltage.V1rms = RMS value of port 1 voltageV2rms= RMS value of port2 voltage.In all the plots below X-axis represents time in seconds.

VSI VSI

Rse Rs

e

XseXse

Substationbus(port1) UPFC o/p

bus(port2)

Localload

Vs

P1+ jQ1 P2+jQ2

Psh +jQ

shP L+j

QL

Fig. 5.1.Test system

SK13 2

1. Modeling 3ph To D-Q Transformation Block:

The transformation subsystem block transforms the three phase quantities toD-Q quantities in the synchronous reference frame. This transformation has been done in twophases.

1. Transforming the three phase quantities to single phase quantities by using thetransformation matrix [C1] in the stationary reference frame.

2. Transforming the stationary reference frame quantities into synchronously rotatingat System frequency (ωo) quantities by using transformation matrix [C2].

Supply Modeling:

The three phase voltages are modeled using sine wave block in the source

library of SIMULINK. The parameters for amplitude set between 0.95-1.05pu and frequency set as

315 rad/sec. The phase angle parameter is set according to three phase supply, 0, 2.0944, -2.0944

rad for the, b and c phases. Accordingly parameters for lead, lag and unbalanced voltages are set.

Modeling Of Transformation Matrices: The transformation matrices are modelled by using gain

and sum blocks available in the linear library.

Fig.1.Transformation block in stationary reference frame

SK13 3

2. Modeling of UPFC

The control system described in the previous chapter was derived by

assuming that the series and parallel converters are treated as ideal controllable voltage sources,

that the values of the fundamental components of the line currents are locally available.

The UPFC is modeled by combining the shunt and series branches coupled

by the DC voltage control branch. Local load is added at port 1 of the UPFC.

Fig.2.Transformation block in synchronously revolving reference frame

SHUNTCONVERTER CONTROL BLOCK

TRANSMIS-SION LINE 1 MODEL

TRANSMISSION LINE- 2 MODEL

INVERTER DC SIDE MODEL

LOAD MODEL

SERIESINVERTERCONTROLMODEL

Fig 3. Organization of UPFC modeling blocks

SK13 4

Fi

g 4.

. Uni

fied

Pow

er F

low

Con

trolle

r

SK13 5

UPFC was modeled by combining various blocks as shown above.

2.1Shunt Converter Control Model:

Shunt converter was modeled to inject currents into the port1. Inputs for the shunt

converter block are Vu1Ref , VdcRef. In these two PI control blocks are used. The PI parameters are

tuned accordingly to get required output.

The PI values used in port1 voltage control loop are KP= 3, KI =3000. Large value of

integrator gain parameter was set to obtain rapid attainment of steady state without unacceptable

oscillations.

The PI values used in DC control loop are KP= 3, KI=0. Normally integral gain in the

capacitor loop set zero to avoid very low frequency oscillations in voltage across capacitor which

take a long time to die down.

Rate limiters are used in Idsh and Iqsh loops. The reason is only limited voltage available

from the inverter to drive current through Lsh of inverter. The limits used are [+2000, -2000].

2.2 Transmission Line 1 Model:

The transmission line 1 model was used to calculate the port1 voltage and the real and

reactive power flows (P1 and Q1) from the sending end at port1. Inputs to this block are sending

end voltages (d-q quantities).

In port1 voltage calculator block imperfect differentiators are used to represent line

reactances because transmission line are generally made up of aluminium conductor steel

reinforced (A.S.C.R) . So the eddy current losses are taken into account and hence the h.f gain is

limited.

Sensing delays are used to sense d-q components of the port1 voltage. Normally voltages

are sensed by potential transformers, it has delay in measurement. The delay time constant set at

a representative value of 1ms.These delays also serve to break the Simulink algebraic loops

Small value (0.00001) is used as a input to the sum block in calculating V1rms to avoid

division by zero or NaN in simulation .

SK13 6

Fig.

5 Sh

unt c

onve

rter c

ontro

l blo

ck

SK13 7

F

ig.6

. Tr

ansm

issi

on li

ne 1

mod

el

SK13 8

2.3 Transmission Line 2 Model:

Transmission line 2 was modeled to calculate the series current flowing in the line from port

2 to the receiving end bus. D-Q power calculator block calculates the real and reactive power flow

from port2 to receiving end. Inputs to this block are receiving end voltages ( d-q quantities).

Fig.7 Transmission Line 2 Model

2.4 Inverter DC Side Control Model

The capacitor voltage is sensed using the power balance theory , according to which the

power at the AC side of the inverter is equal to the power at the DC capacitor side of the inverter,

when the switching losses in the inverter switches are neglected.

Inverter dc side control model was used to find the shunt converter output voltages and its

RMS value. Power calculator block is used to calculate real and reactive shunt powers.

SK13 9

2.5 Load Modeling

Load was connected at the port1 of the UPFC. The real and reactive

currents drawn by the load are transformed to calculate the its d-q components. The inputs to the

load model are real and reactive power references.

SK13 10

Fig.9. Load modeling

Currents in load will be delayed in practice by reactive energy storage elements. A delay

time constant of 10ms is employed to take this into account.

4.3.5 Series Inverter Control modeling:

To achieve real power and port 2 control we need to inject series voltage of

appropriate magnitude and angle. The blocks are modeled using the product, trigonometric and

mathematical functions available from nonlinear library.

SK13 11

VSI Inverter Modeling: The PWM-voltage source inverter was assumed to be

instantaneous and infinitely fast to track the voltage reference template set by the control strategy,

so it was implemented as a voltage amplifier with unity gain.

F

ig. 1

0. S

erie

s in

verte

r con

trol

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Inputs to this block are PRef and Vu2Ref. In these two PI controllers was used to get the real

and reactive power references at the port1. PI parameters used in real power reference loop are

Kp= 1,KI =500, KD =0.001.Derivative control used to limit the initial peak overshoot. PI parameters

used in voltage control loop are Kp= 20, KI=7500.

Parameters of saturation blocks are set to [+0.5, -0.5] otherwise the output of the inverter

goes to high values.

Power calculator Block:

Fig.11. Power calculator block

Results of a sample simulation run using the model developed follow.

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Study Case : Vs = 1∠ 0,load 3p.u with lagging power factor 0.8, initially shunt control is OFF, shunt

control ON at T=0.04sec, PRef= 0, load switch on at t=0.08sec, at t=0.25 sec load throw and

subsequently shunt control OFF.

The simulation results are:

Fig. 12. Simulation results are (a) V1rms, V1d , V2q (b) V1rms (expanded at T=0.08s) (c) V1rms

(expanded at T=0.25s)

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Fig. 13. Simulation results are (d) V2rms, V2d, V2q (e)V2rms (expanded at T=0.08s) (f) V2rms (expanded

at T=0.25s) (g) Eshrms, Eserms

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Fig .14 Simulation results are (h)V1ang, V2ang (i) V1ph-A, V2ph-A (j) Idse, Iqse (k) P2, Q2.

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Fig . 15 Simulation results are (l) P2 (expanded at T=0.08s) (m) P2 (expanded at T=0.3s) (n) P1, Q1

(o) Psh, Qsh

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Fig 5.6 Simulation results are (p) PINV, QINV (q) PL, QL (r) Vdc.

By analyzing the above results for a step change in load at t=0.08sec, sudden change in q-component of the voltage observed. At that time shunt converter RMS voltage rises to inject reactive powerinto the bus. Reactive power shown as negative i.e. shunt converter delivering lagging reactive power to thebus to keep the bus voltage constant.

When the load is switched on at T=0.08sec reactive power flow in the line (Q2) increases. So theseries converter voltage changes accordingly to supply the reactive power. In the above plots the real powerconsumed by the shunt converter is not equal to the real power delivered by the series converter. Thereason is we are measuring the shunt converter real power at port1. So, we have to subtract the real powerdissipated in the resistance in the shunt converter path from the shunt real power.

The rise and fall times observed when sudden load change occurred at T=0.08sec and at T=0.25secin port1 voltage are given by Tr =0.025sec, Tf = 0.02sec.The load powers given in the figure is that of thecommanded powers and are different from the actual power drawn from the bus by the time constant of1ms.This accounts for the higher rise time observed. The parameters of the controllers at different locationsare tuned to get satisfactory gain when sudden changes in load.

Initially there is no power flows from sending end to the receiving end because load angle is zero.When load changes the port1 voltage angle changes with respect to the receiving end, so there is a realpower flow from port1 to receiving end and from sending end to the port1.

The rise and fall times observed in real power flow when load suddenly switched on are Tr=0.004sec and Tf= 0.0001sec. The rise and fall times observed when load suddenly switched off atT=0.25sec areTr =0.0001sec,Tf=0.0075sec.