fdms1d2n03dsd - powertrench power clip 30 v …

© Semiconductor Components Industries, LLC, 2016

May, 2018 − Rev. 51 Publication Order Number:

FDMS1D2N03DSD/D

FDMS1D2N03DSD

POWERTRENCH� PowerClip 30 V Asymmetric DualN‐Channel MOSFETs

General DescriptionThis device includes two specialized N-Channel MOSFETs in

a dual package. The switch node has been internally connected toenable easy placement and routing of synchronous buck converters.The control MOSFET (Q1) and synchronous SyncFET� (Q2) havebeen designed to provide optimal power efficiency.

Features

Q1: N-Channel• Max RDS(on) = 3.25 m� at VGS = 10 V, ID = 19 A

• Max RDS(on) = 4 m� at VGS = 4.5 V, ID = 17 A

Q2: N-Channel• Max RDS(on) = 0.97 m� at VGS = 10 V, ID = 37 A

• Max RDS(on) = 1.25 m� at VGS = 4.5 V, ID = 34 A

• Low Inductance Packaging Shortens Rise/Fall Times, Resulting inLower Switching Losses.

• MOSFET Integration Enables Optimum Layout for Lower CircuitInductance and Reduced Switch Node Ringing.

• RoHS Compliant

Applications

• Computing

• Communications

• General Purpose Point of Load

Power Clip 56(PQFN8 5x6)CASE 483AR

See detailed ordering and shipping information on page 2 ofthis data sheet.

ORDERING INFORMATION

www.onsemi.com

N-Channel MOSFET

MARKING DIAGRAM

$Y = ON Semiconductor Logo&Z = Assembly Plant Code&3 = Numeric Date Code&K = Lot CodeFDMS1D2N03DSD = Specific Device Code

$Y&Z&3&KFDMS1D2N03DSD

PIN1

Top View Bottom View

ELECTRICAL CONNECTION

PIN ASSIGNMENT

GR

LSG

SW

SW

SW

V+

V+

HSGP

AD

10G

ND

(LS

S)

*PAD9 V+(HSD)

*

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MOSFET MAXIMUM RATINGS (TA = 25°C, Unless otherwise specified)

Symbol Parameter Q1 Q2 Unit

VDS Drain to Source Voltage 30 30 V

VGS Gate to Source Voltage +16/−12 +16/−12 V

ID Drain Current − Continuous (TC = 25°C) (Note 5) 70 164

A

− Continuous (TC = 85°C) (Note 5) 54 126

− Continuous (TA = 25°C) 19 (Note 1a) 37 (Note 1b)

− Continuous (TA = 85°C) 15 (Note 1a) 29 (Note 1b)

− Pulsed (TA = 25°C) (Note 4) 362 1199

EAS Single Pulsed Avalanche Energy (Note 3) 121 337 mJ

PD Power Dissipation for Single Operation(TC = 25°C)(TA = 25°C)

262.1 (Note 1a)

422.3 (Note 1b)

W

TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS

Symbol Parameter Q1 Q2 Unit

R�JC Thermal Resistance, Junction to Case 4.8 3.0 �C/W

R�JA Thermal Resistance, Junction to Ambient 60 (Note 1a) 55 (Note 1b) �C/W

R�JA Thermal Resistance, Junction to Ambient 130 (Note 1c) 120 (Note 1d) �C/W

PACKAGE MARKING AND ORDERING INFORMATION

Device Top Marking Package Reel Size Tape Width Quantity

FDMS1D2N03DSD FDMS1D2N03DSD Power Clip 56 (PGFN8)(Pb-Free / Halogen Free)

13″ 12 mm 3,000 Units

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Type Min Typ Max Unit

OFF CHARACTERISTICS

BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V Q1Q2

3030

−−

−−

V

�BVDSS/�TJ Breakdown Voltage TemperatureCoefficient

ID = 10 mA, referenced to 25�C Q1Q2

−−

1521

−−

mV/�C

IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1Q2

−−

−−

1500

�A

IGSS Gate to Source Leakage Current, Forward

VGS = +16 V/−12 V, VDS= 0 V

Q1Q2

−−

−−

±100±100

nAnA

ON CHARACTERISTICS

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 320 �AVGS = VDS, ID = 1 mA

Q1Q2

0.81.0

1.31.5

2.53.0

V

�VGS(th)/�TJ Gate to Source Threshold VoltageTemperature Coefficient

ID = 1 mA, referenced to 25�CID = 10 mA, referenced to 25�C

Q1Q2

−−

−3−3

−−

mV/�C


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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Symbol UnitMaxTypMinTypeTest ConditionsParameter

ON CHARACTERISTICS

RDS(on) Drain to Source On Resistance VGS = 10 V, ID = 19 A VGS = 4.5 V, ID = 17 A VGS = 10 V, ID = 19 A, TJ =125�C

Q1 −−−

2.53.03.6

3.254.04.9

m�

VGS = 10 V, ID = 37 AVGS = 4.5 V, ID = 34 A VGS = 10 V, ID = 37 A,TJ =125�C

Q2 −−−

0.730.931.1

0.971.251.6

gFS Forward Transconductance VDS = 5 V, ID = 19 AVDS = 5 V, ID = 37 A

Q1Q2

−−

95247

−−

S

DYNAMIC CHARACTERISTICS

Ciss Input Capacitance Q1:VDS = 15 V, VGS = 0 V, f = 1 MHZQ2: VDS = 15 V, VGS = 0 V, f = 1 MHZ

Q1Q2

−−

14104860

−−

pF

Coss Output Capacitance Q1Q2

−−

5641845

−−

pF

Crss Reverse Transfer Capacitance Q1Q2

−−

40123

−−

pF

Rg Gate Resistance Q1Q2

−−

0.30.3

−−

�

SWITCHING CHARACTERISTICS

td(on) Turn-On Delay Time Q1:VDD = 15 V, ID = 19 A, RGEN = 6 �Q2:VDD = 15 V, ID = 37 A, RGEN = 6 �

Q1Q2

−−

813

−−

ns

tr Rise Time Q1Q2

−−

25

−−

ns

td(off) Turn-Off Delay Time Q1Q2

−−

2237

−−

ns

tf Fall Time Q1Q2

−−

24

−−

ns

Qg Total Gate Charge VGS = 0 V to 10 V Q1: VDD = 15 V, ID = 19 AQ2: VDD = 15 V, ID = 37 A

Q1Q2

−−

2384

33117

nC

Qg Total Gate Charge VGS = 0 V to 4.5 V Q1: VDD = 15 V, ID = 19 AQ2: VDD = 15 V, ID = 37 A

Q1Q2

−−

1139

1554

nC

Qgs Gate to Source Gate Charge Q1: VDD = 15 V, ID = 19 AQ2: VDD = 15 V, ID = 37 A

Q1Q2

−−

3.113

−−

nC

Qgd Gate to Drain “Miller” Charge Q1: VDD = 15 V, ID = 19 AQ2: VDD = 15 V, ID = 37 A

Q1Q2

−−

2.59

−−

nC

SOURCE-DRAIN DIODE CHARACTERISTICS

VSD Source to Drain Diode Forward Voltage

VGS = 0 V, IS = 19 A (Note 2)VGS = 0 V, IS = 37 A (Note 2)

Q1Q2

−−

0.80.8

1.21.2

V

trr Reverse Recovery Time Q1:IF = 19 A, di/dt = 100 A/�sQ2:IF = 37 A, di/dt = 300 A/�s

Q1Q2

−−

2843

−−

ns

Qrr Reverse Recovery Charge Q1Q2

−−

1263

−−

nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions.


FDMS1D2N03DSD

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NOTES:1. R�JA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R�CA is determined

by the user’s board design.

60°C/W when mounted on a 1 in2 pad of 2 oz copper.

130°C/W when mounted on a minimum pad of 2 oz copper.

a)

c)

G DF

DS

SF

SS

G DF

DS

SF

SS

G DF

DS

SF

SS

G DF

DS

SF

SS

55°C/W when mounted on a 1 in2 pad of 2 oz copper.

120°C/W when mounted on a minimum pad of 2 oz copper.

b)

d)

2. Pulse Test: Pulse Width < 300 �s, Duty cycle < 2.0%.3. Q1: EAS of 121 mJ is based on starting TJ = 25�C; N-ch: L = 3 mH, IAS = 9 A, VDD = 30 V. 100% tested at L = 0.1 mH, IAS = 29 A.

Q2: EAS of 337 mJ is based on starting TJ = 25�C; N-ch: L = 3 mH, IAS = 15 A, VDD = 30 V. 100% tested at L = 0.1 mH, IAS = 47 A.4. Pulsed Id please refer to Figure 11 and Figure 24 SOA graphs for more details.5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &

electro-mechanical application board design.


FDMS1D2N03DSD

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TYPICAL CHARACTERISTICS (Q1 N-Channel)(TJ = 25°C unless otherwise noted)

Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs. DrainCurrent and Gate Voltage

Figure 3. Normalized On-Resistance vs.Junction Temperature

Figure 4. On-Resistance vs. Gate to SourceVoltage

Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode ForwardVoltage vs. Source Current

0.00

15

30

45

60

75

90

VGS = 3.5 V

VGS = 3 V

VGS = 4.5 V

PULSE DURATION = 80 �sDUTY CYCLE = 0.5% MAX

VGS = 2.5 V

VGS = 10 V

I D, D

RA

IN C

UR

RE

NT

(A

)

VDS, DRAIN TO SOURCE VOLTAGE (V)

0.5 1.0 1.5 2.0 00.0

1.5

3.0

4.5

6.0

VGS = 3 V


NO

RM

AL

IZE

DD

RA

IN T

O S

OU

RC

E O

N−R

ES

IST

AN

CE

ID, DRAIN CURRENT (A)

VGS = 3.5 V VGS = 4.5 V

VGS = 2.5 V

VGS = 10 V

15 30 45 60 75 90

−750.6

0.8

1.0

1.2

1.4

1.6

1.8ID = 19 AVGS = 10 V

NO

RM

AL

IZE

D D

RA

IN T

O S

OU

RC

E O

N−R

ES

IST

AN

CE

TJ, JUNCTION TEMPERATURE (�C)

−50 −25 0 25 50 75 100 125 150 0 2 4 6 8 100

5

10

15

20

TJ = 125 oC

ID = 19 A

TJ = 25 oC

VGS, GATE TO SOURCE VOLTAGE (V)

RD

S(o

n),

DR

AIN

TO

SO

UR

CE

ON

−RE

SIS

TA

NC

E(m

�) PULSE DURATION = 80 �s

DUTY CYCLE = 0.5% MAX

0 1 2 3 40

15

30

45

60

75

90

TJ = 150 oC

VDS = 5 V


TJ = −55 oC

TJ = 25 oC

I D, D

RA

IN C

UR

RE

NT

(A

)


TJ = −55 oC

TJ = 25 oC

TJ = 150 oC

VGS = 0 V

I S, R

EV

ER

SE

DR

AIN

CU

RR

EN

T (

A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

0.00.001

0.01

0.1

1

10

100

0.2 0.4 0.6 0.8 1.0 1.2


FDMS1D2N03DSD

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Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage

Figure 9. Unclamped Inductive Switching Capability

Figure 10. Maximum Continuous Drain Currentvs. Case Temperature

Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum PowerDissipation

00

2

4

6

8

10

ID = 19 A

VDD = 20 VVDD = 10 V

VG

S, G

AT

E T

O S

OU

RC

E V

OL

TA

GE

(V

)

Qg, GATE CHARGE (nC)

VDD = 15 V

5 10 15 20 25 0.1 1 10 3010

100

1000

10000

f = 1 MHzVGS = 0 V

CA

PA

CIT

AN

CE

(p

F)


Crss

Coss

Ciss

0.0011

10

50

TJ = 100 oC

TJ = 25 oC

TJ = 125oC

tAV, TIME IN AVALANCHE (ms)

I AS, A

VA

LA

NC

HE

CU

RR

EN

T (

A)

0.01 0.1 1 10 100 250

16

32

48

64

80

VGS = 4.5 V

R�JC = 4.8 oC/W

VGS = 10 VI D

,DR

AIN

CU

RR

EN

T (

A)

TC, CASE TEMPERATURE (�C)

50 75 100 125 150

0.1 1 10 1000.1

1

10

100

500

10 �s

CURVE BENT TO MEASURED DATA

100 �s

10 ms100 ms

1 ms

I D, D

RA

IN C

UR

RE

NT

(A

)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA ISLIMITED BY RDS(on)

SINGLE PULSETJ = MAX RATED

R�JC = 4.8 oC/W

TC = 25 oC

10−5 10−4 10−3 10−2 10−1 110

100

1000

10000

SINGLE PULSER�JC = 4.8 oC/W

TC = 25 oC

P( P

K),

PE

AK

TR

AN

SIE

NT

PO

WE

R (

W)

t, PULSE WIDTH (sec)


FDMS1D2N03DSD

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Figure 13. Junction-to-Case Transient Thermal Response Curve

10−5 10−4 10−3 10−2 10−1 10.001

0.01

0.1

1

2

SINGLE PULSE

DUTY CYCLE−DESCENDING ORDER

r(t)

, NO

RM

AL

IZE

D E

FF

EC

TIV

E T

RA

NS

IEN

TT

HE

RM

AL

RE

SIS

TA

NC

E

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5 0.2 0.1 0.05 0.02 0.01

NOTES:

Z�JC(t) = r(t) x R�JCR�JC = 4.8oC/W

Duty Cycle, D = t1 / t2Peak TJ = PDM x Z�JC(t) + TC

PDM

t1t2


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Figure 14. On-Region Characteristics Figure 15. Normalized On-Resistance vs. DrainCurrent and Gate Voltage

Figure 16. Normalized On-Resistance vs.Junction Temperature

Figure 17. On-Resistance vs. Gate to SourceVoltage

Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode ForwardVoltage vs. Source Current

0.0 0.1 0.2 0.3 0.4 0.5 0.60

30

60

90

120

150

180

VGS = 4 V

VGS = 3.5 V

VGS = 4.5 V

VGS = 3 V


VGS = 10 V

I D, D

RA

IN C

UR

RE

NT

(A

)


00.0

0.9

1.8

2.7

3.6

4.5

VGS = 4.5 V

VGS = 3.5 V


NO

RM

AL

IZE

DD

RA

IN T

O S

OU

RC

E O

N−R

ES

IST

AN

CE

ID, DRAIN CURRENT (A)

VGS = 4 V VGS = 10 V

VGS = 3 V

30 60 90 120 150 180

−750.6

0.8

1.0

1.2

1.4

1.6

1.8ID

GS = 10 V

NO

RM

AL

IZE

D D

RA

IN T

O S

OU

RC

E O

N−R

ES

IST

AN

CE

TJ, JUNCTION TEMPERATURE (�C)

V= 37 A

−50 −25 0 25 50 75 100 125 150 2 4 6 8 100

1

2

3

4

5

TJ = 125 oC

ID = 37 A

TJ = 25 oC


RD

S(o

n),

DR

AIN

TO

SO

UR

CE

ON

−RE

SIS

TA

NC

E(m�

) PULSE DURATION = 80 �sDUTY CYCLE = 0.5% MAX

00

30

60

90

120

150

180

TJ = 125 oC

VDS = 5 V


TJ = −55oC

TJ = 25 oC

I D, D

RA

IN C

UR

RE

NT

(A

)


1 2 3 4 0.0 0.2 0.4 0.6 0.8 1.00.001

0.01

0.1

1

10

100

TJ = −55oC

TJ = 25 oC

TJ = 125 oC

VGS = 0 V

I S, R

EV

ER

SE

DR

AIN

CU

RR

EN

T (

A)

VSD, BODY DIODE FORWARD VOLTAGE (V)


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Figure 20. Gate Charge Characteristics Figure 21. Capacitance vs. Drain to Source Voltage

Figure 22. Unclamped Inductive Switching Capability

Figure 23. Maximum Continuous Drain Currentvs. Case Temperature

Figure 24. Forward Bias Safe Operating Area Figure 25. Single Pulse Maximum PowerDissipation

00

2

4

6

8

10ID = 37 A

VDD = 20 V

VDD = 10 V

VG

S, G

AT

E T

O S

OU

RC

E V

OL

TA

GE

(V

)

Qg, GATE CHARGE (nC)

VDD = 15 V

20 40 60 80 100 0.110

100

1000

10000

f = 1 MHz

VGS = 0 V

CA

PA

CIT

AN

CE

(p

F)


Crss

Coss

Ciss

1 10 30

0.0011

10

100

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I AS, A

VA

LA

NC

HE

CU

RR

EN

T (

A)

0.01 0.1 1 10 100 1000 250

36

72

108

144

180

VGS = 4.5 V

R�JC = 3.0 oC/W

VGS = 10 VI D

,DR

AIN

CU

RR

EN

T (

A)

TC, CASE TEMPERATURE (�C)

0.10.1

1

10

100

10002000

10 �s

CURVE BENT TO MEASURED DATA

100 �s

10 ms

100 ms

1 ms

I D, D

RA

IN C

UR

RE

NT

(A

)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS LIMITED BY RDS(on)

SINGLE PULSETJ

�JC = 3.0 o

C = 25 oC

1 10 100

= MAX RATED

R C/W

T

10−5 10−4 10−3 10−2 10−1 110

100

1000

10000

100000

SINGLE PULSER�JC = 3.0

C = 25 oC

P( P

K),

PE

AK

TR

AN

SIE

NT

PO

WE

R (

W)

t, PULSE WIDTH (sec)

oC/W

T

50 75 100 125 150


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Figure 26. Junction-to-Case Transient Thermal Response Curve

10−5 10−4 10−3 10−2 10−1 10.001

0.01

0.1

1

2

SINGLE PULSE

DUTY CYCLE−DESCENDING ORDER

r(t)

, NO

RM

AL

IZE

D E

FF

EC

TIV

E T

RA

NS

IEN

TT

HE

RM

AL

RE

SIS

TA

NC

E

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5 0.2 0.1 0.05 0.02 0.01

PDM

t1t2

�JC(t) = r(t) x R�JCR�JC = 3.0oC/W

Duty Cycle, D = t1 / t2

Peak TJ = PDM x Z�JC(t) + TC

NOTES:

Z


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TYPICAL CHARACTERISTICS (continued)

SyncFET Schottky Body Diode CharacteristicsON’s SyncFET process embeds a Schottky diode in

parallel with PowerTrench MOSFET. This diode exhibitssimilar characteristics to a discrete external Schottky diodein parallel with a MOSFET. Figure 27 shows the reverserecovery characteristic of the FDMS1D2N03DSD.

Schottky barrier diodes exhibit significant leakage at hightemperature and high reverse voltage. This will increase thepower in the device.

Figure 27. FDMS1D2N03DSD SyncFET Body DiodeReverse Recovery Characteristic

Figure 28. SyncFET Body Diode Reverse Leakage vs.Drain-Source Voltage

100−5

0

5

10

15

20

25

30

35

40

di/dt = 248 A/�s

CU

RR

EN

T (

A)

TIME (ns)

200 300 400 500 600 700 010−6

10−5

10−4

10−3

10−2

10−1

TJ = 125 oC

TJ = 100 oC

TJ = 25 oC

I DS

S, R

EV

ER

SE

LE

AK

AG

E C

UR

RE

NT

(A

)

VDS, REVERSE VOLTAGE (V)

5 10 15 20 25 30

POWERTRENCH is a registered trademark and SyncFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.


PQFN8 5x6, 1.27PCASE 483AR

ISSUE ADATE 21 MAY 2021

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.

98AON13666GDOCUMENT NUMBER:

DESCRIPTION:

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