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Welcome to

your Digital Edition of

Aerospace & DefenseTechnology

February 2017

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www.aerodefensetech.com February 2017

From the Publishers ofFrom the Publishers of

Cooling Your Embedded System

Simulating and AnalyzingFlow for an Air-to-AirRefueling System

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www.aerodefensetech.com February 2017

From the Publishers ofFrom the Publishers of

Cooling Your Embedded System

Simulating and AnalyzingFlow for an Air-to-AirRefueling System

Certifying MulticorePlatforms for SafetyAvionics Applications

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2 Aerospace & Defense Technology, February 2017Free Info at http://info.hotims.com/65848-820

Aerospace & Defense Technology

ContentsFEATURES________________________________________

4 Data Communications4 Open Standard Middleware Enables New HPEC Solutions

12 Thermal Management12 Cooling Your Embedded System17 Avionics/Electronics17 Evaluating Key Certification Aspects of Multicore Platforms

for Safety Critical Avionics Applications25 Systems Testing & Simulation25 Simulating and Analyzing Flow for an Air-to-Air Refueling

System 28 RF & Microwave Technology28 The Ins and Outs of Spaceflight Passive Components and

Assemblies32 Tech Briefs32 Development of High Quality 4H-SiC Thick Epitaxy for Reliable

High Power Electronics Using Halogenated Precursors34 Silicon Based Mid-Infrared SiGeSn Heterostructure Emitters

and Detectors

35 Reconfigurable Electronics and Non-Volatile Memory Research38 Energy-Filtered Tunnel Transistor: A New Device Concept

Toward Extremely Low Energy Consumption Electronics

DEPARTMENTS___________________________________

40 New Products43 Advertisers Index44 Application Briefs

ON THE COVER___________________________________

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4 www.aerodefensetech.com Aerospace & Defense Technology, February 2017

The military embedded comput-ing landscape has been trans-formed from where it was 20years ago — and that has been

almost entirely enabled by the ability ofprime contractors, systems integrators,and OEMs to leverage the products ofCOTS manufacturers who take leadingedge commercial technologies and applythem successfully to the world of mili-tary computing. A look at the commer-cial landscape today reveals cell phonesthat are putting vast amounts of loca-tion-aware information — and the abil-ity to process that information — di-rectly into the hands of consumers. TheInternet of Things has become a deploy-able reality, with data derived from mil-lions of connected sensors.

Some of these technologies have mi-grated into the military embedded com-puting world. Just as cell phones exist onthe edge of the network, so now, new gen-erations of small, lightweight, low power,incredibly capable devices are being de-ployed on the leading edge of the battle-field. The technologies used by compa-nies such as Amazon and Google withintheir HPC (high performance computing)

data centers are being made available tothe defense market to bring high perform-ance embedded computing (HPEC) tomilitary platforms of all shapes and sizes.Increasingly, more and more sophisti-cated sensors are being deployed to givestrategic and tactical information advan-tage to warfighters — not to mentiontheir use in maximizing military assetavailability and minimizing cost of own-ership, and this drives the need for HPEC.

The military is unquestionably deriv-ing enormous benefit from these com-mercial technologies, because it needsexactly what the commercial worldneeds. The only differences are that themilitary needs those technologies to berugged enough to withstand the rigorsof deployment on the battlefield — andit needs those technologies to be sup-ported over the multi-year cycle of thetypical program.

Knowledge is power. Today, the worldis drowning in ever-increasing amountsof data coming at us from manysources. How can we turn this data intoknowledge, and how can we use thisknowledge to improve outcomes acrossa wide range of potential applications?

Knowledge Assisted Processing (KAP)Today’s latest smart phone or tablet

packs more compute power than thetypical PC of less than a decade agowithin a low power portable form fac-tor. These devices could be referred toas knowledge assisted processing(KAP) platforms since they use on-board processing to provide location-based services by pulling relevant en-vironmental data from a remote datasource and making it available to theuser in a format they can understand,within a time frame that enables themto take action to support their needs.

Embedded computing platforms canbenefit from KAP paradigms in a varietyof ways that are relevant to their opera-tional requirements. For example, sensorson a piece of industrial equipment such asa jet engine can process real-time data —temperatures, pressures, speeds, vibrationand fuel consumption, for example — toensure safe and efficient operation of theequipment. These platforms can compareacquired sensor data to expected valuesand raise alarms if required. In addition,KAP-enabled systems have the potentialto greatly enhance operational effective-ness by dynamically tuning engine per-formance based on data models derivednot just from the onboard real-time databut from many thousands of hours ofdata collected from many jet engines op-erating in similar environmental condi-tions all around the world.

HPEC at the EdgeHigh performance computing (HPC)

clusters and data center installations arescaling out to provide the Big Data in-frastructure needed to support new and

OpenStandard

MiddlewareEnables

New HPECSolutions

Figure 1. Two OpenVPX HPEC systems from Abaco Systems.

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Data Communications

evolving business models. In addition,large HPC clusters are designed to sup-port very compute-intensive applica-tions that might include runningweather simulation, fluid dynamics,physics, or other large scale mathemati-cal models.

Data center platforms can be opti-mized to provide cloud services to multi-ple users and to handle very large datasets in support of Big Data analytics. Bothtypes of installations use similar open system technologies to provide data pro-cessing resources or slices of compute ca-pability to multiple users, either simulta-neously or on an exclusive basis.

Highest PerformanceA typical installation will have multi-

ple racks of Linux servers connected by ahigh bandwidth scale-out Ethernet net-work. Each of the server racks will havemultiple processor nodes connected via ascale-in fabric which could be Ethernet orInfiniBand®, depending on inter-processcommunication (IPC) requirements andthe topology of the system. For example,InfiniBand is well suited for HPC clusters

or compute slices that might includeboth CPUs and parallel processing accel-erators such as graphics processing units(GPUs). Some of the world’s highest per-formance HPC installations harnessmany thousands of multi-core CPU andmany-core GPU slices yielding PetaFLOPperformance to accelerate very compute-intensive applications.

Ethernet and InfiniBand fabrics en-able very high IPC throughput, very lowmemory-to-memory latencies togetherwith CPU off-load based on kernel by-pass capability by making use of remotedirect memory access (RDMA) softwaredriver stacks. Open Fabrics EnterpriseDistribution (OFED) RDMA middlewareis one example of a community initia-tive sponsored by both industry and ac-ademia under the Open Fabrics Alliance(openfabrics.org). Another such initia-tive supports an industry standard IPCmiddleware called MPI (Message Pass-ing Interface).

These open system platforms provide aconsistent application programming in-terface (API) across multiple installations,enabling application scaling from small

to large numbers of processing slices inorder to accommodate various jobqueues within acceptable time frames.

EffectivenessThese same concepts and technolo-

gies can now be instantiated on de-ployed embedded platforms providingTeraFLOP levels of compute perform-ance to expand the reach and effective-ness of a variety of deployed defenseand aerospace platforms. The sameopen middleware APIs used on HPC anddata center installations, along withprocessing slices based on these sameLinux® hardware architectures, can befound in the latest rugged form factorsoffered by a variety of companies.

Whereas HPC clusters can be meas-ured in thousands of compute slicesconsuming hundreds or thousands ofkilowatts within a 100,000 square footinstallation, a typical deployable high-performance embedded computer(HPEC) platform might occupy a smallnumber of cubic feet with a powerbudget of one or two Kilowatts or less.Figure 1 shows two examples of rugged,scalable HPEC systems.

Such open architecture HPEC systemscan run the same applications developedon HPC clusters. The open APIs and mid-dlewares provide application portabilitywhile the compute-, fabric-, and storagehardware modules can be scaled fromfew to many slices to provide the bestSWaP profile to address various deployedsystem mission objectives.

Such general purpose HPEC platformscan be configured to provide high datathroughput to cater for continuous datastreams from high resolution sensors suchas radar or radio antennae, sonar acousticheads, or multi-spectral camera arrays. Inaddition to real-time sensor- and imageprocessing, these platforms can recordand retrieve relevant data from onboardstorage or from a network resource inorder to tailor the application to specificoperational environments while main-taining the ability to draw on other datasources to adapt to new operational envi-ronments within a single sortie.

Multi-Mode CapabilitiesThe ability to consolidate multiple ap-

plications onto a single reconfigurable

SENSOR

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CPU REGISTERSSMALLER

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LARGER

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LEVEL1 CACHE

LEVEL2 CACHE

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1

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LOCAL SSD

NETWORK ATTACHED STORAGE

Figure 3. CPU memory access cycles.

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HPEC system enables a whole range ofmulti-mode capabilities, sometimes com-bining the functionality of more than onelegacy processor onto a single multi-roleplatform. Such strategies can reduce theamount of discrete single mode systemson older platforms and replace them withfewer multi-purpose systems with morecapability to address a variety of opera-tional requirements while greatly reduc-ing the weight and power requirements ofthe overall vehicle.

Such HPEC systems can also facilitate thedevelopment of cognitive sensor process-ing systems that are able to use knowledge-assisted processing techniques to optimizesensor inputs and outputs and therebymaximize mission capabilities and effec-tiveness. They do this by analyzing both acquired real-time mis-sion data and archived data that enables the mission data to beplaced in a wider knowledge-based context. Consider a multi-mode cognitive radar platform (Figure 2) that knows where it isand understands the environment it might be working in. Suchsystems could draw on a combination of real-time, real-world sen-

sor inputs as well as operating models and archived data such asmultispectral maps stored in on-board environmental data bases(EDB). It could also make use of networked sensor inputs fromother assets as well as pre-planned operational rules of engage-ment to greatly increase its ability to find weak targets in complexenvironments while minimizing the ability of others to detect itspresence within the theater of operations.

Reducing LatencySuch systems could use all of these data resources to predict or

look ahead to where the vehicle will be within the next few sec-onds and adjust both the transmit and receive modes to tunethe radar antenna to best effect by comparing archived datamaps to its current position in advance. This strategy would re-duce processing latency on the real-world signals of interest bypredicting expected returns from unwanted background featuresand mapping them out of the sensor processing chain.

The application can use the HPEC processor cluster to han-dle both real-time signal processing streams as well as non-pipelined workloads that might use archived information tominimize environmental interference or tune the transmitterin order to minimize the illumination of clutter while adapt-ing receive filters to look for certain return wave forms or fre-quencies that might be expected from targets of interest.

One of the key factors that should be addressed by systemarchitects when designing such systems is the ability of theprocessor to access, process, and react to relevant mission datawithin actionable time frames. These time frames could bemeasured in terms of seconds or milliseconds depending onthe relative speed of the platform in relation to any targets orthreats. Designers must therefore consider the locality of thedata and the speed at which it can be accessed and processedtogether with any inherent system latencies in order to adapttheir application to best effect.

High SpeedModern multi-core processors incorporate high speed

pipelined data buses with multiple levels of on-chip memorycaches and multiple high bandwidth memory controllers as


Data Communications

Figure 4. Task mapping across a 6U OpenVPXmulti-board, multi-node CPU/GPU system usingInfiniBand and Ethernet.

Figure 5. Signal processing application mapped toa 3U OpenVPX Intel 4th Generation Core-i7 HPECcluster running VxWorks and using Gen 3 PCIe P2Pdata plane fabric.

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well as high speed storage and networkinterfaces.

Each of these can be used to store andretrieve relevant data sets of differentsizes at varying speeds (latencies). Figure3 provides a framework that could beused when considering how to maximize

processing efficiencies and minimize la-tencies in meeting timing requirements.

HPEC commercial off-the-shelf(COTS) processing modules take advan-tage of these multi-core CPUs, many-core GPUs, as well as InfiniBand andEthernet switch fabric modules for

inter-process communication and sys-tem control. Data I/O is supported withhigh speed PCIe™ expansion plane con-nectivity and/or 10 Gigabit Ethernet.The OpenVPX standard is supported bya wide community of board and systemvendors through the VME InternationalTrade Association (www.VITA.com).

Cost-EffectiveThese modules are available from mul-

tiple vendors and can be scaled fromsmall 3U VPX multi-board systems tomuch larger 16- or 18-slot 6U VPX plat-forms to meet different size, weight,power, and cost (SWaP-C) requirements.This ecosystem provides a clear migrationpath to a fully rugged deployable systemarchitecture that can interface directly tohost applications developed on commer-cial HPC servers, thus providing a cost-ef-fective means to deploy advanced, knowl-edge-assisted sensor processing solutions.

SWaP Optimization for HPEC PlatformsOptimizing an application for real-

time performance can be a time-consum-ing task. However, there are applicationdevelopment tools that can reduce thetime and effort required to take full ad-vantage of the SWaP-constrained plat-form in a very efficient manner. Suchtools allow the visualization of the appli-cation through multiple windows so thedeveloper can quickly understand howthe application is mapped to the avail-able hardware resources without havingto develop low level code.

One such tool from Abaco provides agraphical user interface, a high-perfor-mance IPC middleware library as well asmore than 600 digital signal processing(DSP) and math function libraries tobuild and run advanced sensor process-ing applications. Figure 4 shows a typicalmulti-threaded pipelined DSP applicationscaled across multiple compute nodesusing the InfiniBand data plane fabric.

Developers can maximize perform-ance per watt on such systems by parti-tioning various processing tasks acrossthe available resources to best effect. Forexample, certain signal processing loopscan be greatly accelerated by ensuringdata is available in on-chip memorywhen needed. This can sometimes beachieved by splitting data streams into

10 Aerospace & Defense Technology, February 2017

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Data Communications

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parallel processing pipe lines. Other tasksmay require all-to-all data movement, inwhich case high speed inter-processcommunication fabrics such as Infini-Band can offer an effective way to sharedata and processing loads across groupsof CPUs and GPUs within the system.

Application development tools suchas Abaco’s AXIS enable developers toquickly try different approaches inorder to achieve timing requirementsacross the system. Such tools can beused on commercial servers as well ason deployable OpenVPX systems inorder to scale the application to best ef-fect, taking maximum advantage of theavailable platform resources while alsoensuring application portability.

Figure 5 shows a typical signal pro-cessing application running on a smallfootprint HPEC cluster using Gen 3PCIe fabric for inter-process communi-cation. This application was developedon a 6U OpenVPX Linux cluster with an

InfiniBand data plane and re-hosted ona small multi-board 3U OpenVPX plat-form running VxWorks with a peer-to-peer (P2P) PCIe data plane.

The same application code is runningon both the 6U Linux InfiniBand clus-ter and the 3U platform, providing ap-plication portability and re-use acrossplatforms to cater for a variety of SWaP-C requirements.

ConclusionSystem integrators are now able to de-

velop and deploy advanced knowledge-assisted embedded platforms usingopen system architectures to achievevery high performance in order to ex-pand mission capabilities across a rangeof sensor processing applications. Asnoted, HPEC platforms can be adaptedto use real-time sensor data in combina-tion with archived intelligence to adaptoperation of a multi-mode radar systemto cater for changing and varied opera-

tional environments with the potentialto service multiple missions.

Such concepts can be applied toimage-, video-, sound-, and electro-magnetic spectrums to provide a truemulti-spectral cognitive sensor pro-cessing capability over time. Open sys-tem architectures and open softwaremiddleware offerings with industrystandard APIs afford application scal-ing and portability from commercialserver and HPC clusters to deployable,rugged HPEC OpenVPX platforms en-abling multi-generation technologyinsertion road maps to support ex-panded operational needs now andnew multi-role processing platformsinto the future.

This article was written by Peter Thomp-son, Senior Business Development Managerfor High Performance Embedded Comput-ing, Abaco Systems (Towcester, Northamp-tonshire, UK). For more information,visit http://info.hotims.com/65848-500.

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Embedded computing systems forMil/Aero applications are often

conduction-cooled in an ATR or non-standard chassis. However, there aremany designs that require 19" rack-mount systems with forced-air cooling.As more processing performance ispacked into tight spaces, enclosuresthat provide advanced cooling optionsare increasingly common.

The open-standard embedded archi-tectures have different recommendedlimitations for power. Sometimes theseare electrical pinout limitations, andother times they are recommended ther-mal limitations. There are “tricks of thetrade” to extend the power for certainarchitectures as well as the ability tomaximize the thermal limits.

For the Mil/Aero architectures ofOpenVPX, MicroTCA, and Ad-vancedTCA, we’ll look at ways to ex-pand the cooling limits in both forced-air cooled and conduction-cooledsolutions. The article will include infoon front-to-rear and side-to-side cool-ing solutions as well as axial fans andreverse impeller blower concepts.

Front-to-Rear CoolingWith the construction of the majority

of cabinet enclosures, many Mil/Aero ap-plications require front-to-rear cooling.Many avionics have air conditioning sys-tems that can pull air out of the rear ofthe enclosure. But, there are many av-enues for front-to-rear cooling with dif-ferent levels of effectiveness.

There are four main ways of imple-menting front-to-rear cooling. The fanscan be placed in the rear directly behindthe card cage to pull the heat directlyout. This approach, however, can beproblematic for filtering the air effec-tively. The fans in this system can pro-vide about 81 CFM each and pull the airdirectly out to the rear of the enclosure.While this can certainly do the job in

Cooling Your Embedded System What Can Your Open Standard

Architecture Handle?

Figure 1. The horizontal load configuration for front-to-rear cooling saves rack height, but with a smallintake and “S”-pattern bends the cooling capability is limited.

Figure 2. Using powerful reverse-impeller blowers directly above the card cage reduces airflow bends andprovides up to 191 CFM per fan.

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Thermal Management

many applications, systems with veryhigh power processors may need an-other approach. Further, if rear I/O is re-quired there could be challenges in re-moving rear modules efficiently andhaving enough chassis depth available.

Another front-to-rear cooling ap-proach is when the cards are mountedhorizontally. An air intake area is usuallyplaced on the front left of the system(Figure 1) with exhaust on the left rearside of the enclosure. This method cansave rack height and space, particularlywhen there are not a lot of slots required.But, the approach is one of the least ef-fective for cooling as the air intake andexhaust are small. For example, a 4U hor-izontal mount chassis using this methodcan cool about 90 Watts/slot.

Alternatively, if the boards aremounted vertically, the air intake would

often be below the card cage going acrossthe full 17.8" opening of the front of theenclosure. The tube axial fans in the rearcan pull the exhaust along a wide area aswell. In these two approaches, the air-flow takes an “S” pattern as seen in thefirst Figure. In this configuration, the airneeds to take bends nearly 90 degreestwice. Air baffles can be used to improvethe airflow performance. This is a com-mon approach for embedded systems,but there is a way that is more effective.

Another design technique is usingpowerful air-pulling fans placed immedi-ately above the boards in the card cage.With fans that pull in one axis (to thetop of the chassis) and blow the air outin another axis (through the rear of thechassis), the air bends to reach the fanare cut in half. Figure 2 shows an illus-tration of this approach. This pulling ap-

proach reduces the backflow of the airand the backpressure that hampers theperformance.

Table 1 shows estimations of thewattage per slot that an enclosure needsto cool standard 6U x 160 Eurocardboards. Of course, the space allocated forair intake/exhaust, the board imped-ances, hole size, acoustic noise level lim-its, etc., all affect the cooling perform-ance. So, these are simply ballparkapproximations.

Static PressureStatic pressure gages resistance to the

airflow and how equal the flow is main-tained in all directions. In embedded sys-tems, it is particularly important to en-sure the air can be moved through thetight spaces between the board slots. Thereverse impeller approach creates over91mm (H2O) of static pressure, confirm-ing that it can provide effective coolingin densely packed enclosures and sub-racks. By comparison, a typical 19 rack-mount fan tray, consisting of three 4.7" x4.7" 18W (110 CFM at free delivery) fans,generates only 0.22-0.40 (H2O) of staticpressure. The estimated (operating) staticpressure point of a fan assemblymounted inside a fully loaded subrack is0.3-0.5" (H2O). Under those conditions,one reverse impeller blower assemblyprovides at least 75% higher airflow thana typical 19 rackmount fan tray with 3tube-axial muffin fans.

How Hot Are Your Boards?OpenVPX is very popular in Defense

based systems. 3U OpenVPX boardscan reach over 100-200W and theoreti-cally much higher. In practical usethere are lower tiers that are in the 15-30W range, medium power of 50-70Wrange, and higher power of 80-110Wrange. Often, you’ll have one or two ofthe higher power with a few of themedium and lower power versions.Poor heat dissipation can not onlycause system failures, but significantlyshorten component life. So it’s criticalto cool a system properly.

Reverse impeller blowers can gener-ate 191 CFM of airflow with 3.6 inches(H2O) of static pressure. Using the re-verse impeller blowers as seen in Figure2 in a 9U VPX chassis can provide heat

Figure 3a. The total pressure results in a creatively designed 8U AdvancedTCA chassis with front-to-rearcooling.

Figure 3b. The heat map thermal simulation of the enclosure that had excellent cooling at 300W/slot.

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dissipation of over 2400W in redun-dant mode. Even if a fan went out, itcould dissipate over 2.4 kW while thefaulty fan was hot-swapped. Surpris-ingly, the weight of the newest genera-tion of fans has decreased 25% as well.If the PSUs are front accessible andswappable, they also provide Level Twomaintenance, which is a requirementfor some applications.

Can a similar solution be achieved for3U OpenVPX boards? Yes, it is feasible

for the reverse-impeller approach to re-side in a 5U enclosure with front to rearcooling. You would have about 1Ubelow the card cage for air intake and1U above for the blowers. However, aspecial sheet metal cover would need tobe employed to allow for the removal ofthe fans for them to be swappable. Oth-erwise, the rail gets in the way and alarger height is required. Furthermore,there is not much of a gap between thecards and the fans if a fan were to fail.

Of course, this is the case in many chas-sis platforms such as a 4U bottom-to-top cooling enclosure. Going to a 6Uenclosure would ensure hot-swappabil-ity of the fans and enough space be-tween the fans and the cards for theother fans to support a fan that fails.

For MicroTCA, there is an advantagein using a push-pull approach in afront-to-rear approach since the mod-ules are smaller (approx. 75mm verti-cally mounting). However, rear I/O isnot available unless you go to thelarger double modules (approx.150mm tall). MicroTCA is typicallylimited to about 86W/slot. Most AMCsare in the 20-30W range, howeverprocessors can generate up to 50-80W.The main limitation is the 3A per pinmaximum on the connectors. How-ever, there is a “trick of the trade” toextend the power (and it is part of theoriginal specification); by using a 2ndconnector “tongue” on an AMC mod-

Aerospace & Defense Technology, February 2017 15Free Info at http://info.hotims.com/65848-828

Thermal Management

Cooling MethodWattage

Dissipation*19” Rackmount Chassis

Configuration

Horizontal Front to Rear 80W/slot 4U Chassis, 7-slot, 6U boards

Vertical Front to Rear 110W/slot 9U Chassis, 12-slot, 6U boards

Reverse Impeller Vertical Front to Rear

225W/slot 9U Chassis, 12-slot, 6U boards

Table 1. Cooling Power Approximations

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Thermal Management

ule, you can add a great dealof the I/O, extended chan-nels, or additional power.Using this technique, AMCboards can handle about120W of power per slot.

With this fact in mind, thereverse impeller approachwould be suitable. However,most MicroTCA systems arehorizontal mount to savespace. There are 1U rugged Mi-croTCA solutions that meetMIL-STD 810G and 901D forshock and vibration. It has 6AMC slots with built-in sys-tem management, IEEE1588/SyncE/GPS for precisiontiming – all in a 1U height!However, the cooling range for this sys-tem is in the 60W/slot range.

AdvancedTCA requires a minimum of200W/slot cooling per the specification,but in Telco applications the powerful8U x 280mm processor cards are churn-ing out over 350W in some cases. Theproblem with AdvancedTCA in manyfront-to-rear cooled defense applicationsis that it would require a vertical mountchassis that is often at least 13U high.

Many defense designs only require5-8 slots, so the vertical mount 14-slotchassis is over half empty. A creativeapproach is to open up the middle ofthe chassis to pull air directly to therear. This adds 2U to the enclosure, butit is still significantly less size andweight than a 13U chassis. Figures 3aand 3b show the thermal simulation ofan 8U AdvancedTCA enclosure with 6payload slots that has front to rearcooling. The images show the heat dis-tribution across slots using the CPTAreference guidelines for front boards(0.15in H2O @ 30 CFM) @ 55C ambi-ent, as well as the total pressure results.The enclosure was able to easily cool300 Watts per slot. By combining theswitch slots with the shelf managers (arequirement in the ATCA spec), 2 slotscan be saved. This allows a full 6 pay-load slots in addition to the dualswitch slots.

Conduction CoolingConduction-cooled modules are at-

tractive to use in Mil/Aero systems be-

cause they are inherently ruggedizedand often sealed enclosures. But, thehigher power boards make this ap-proach less practical without the use ofexpensive liquid-flow-through or spraycooling techniques that also increasesize and weight. When you start to goover 400W Total Power Dissipation(TPD) in a 3U chassis (let’s assume 5slots), and about 500W TPD in 6U chas-sis, using just a natural convectionsealed enclosure may not be feasible. Attimes, the conduction-cooled enclosurewill reside inside a larger enclosure, giv-ing some leeway for blowing additionalheat out of the system. Adding a simpleheat exchanger in the rear of the chas-sis can allow close to double the TPD inthe system.

Many conduction-cooled designsare moving to more purpose-built de-signs for specific applications. Thereare certainly disadvantages when itcomes to an open standard, namelyrepeatability and the economies ofscale in volumes, compared to themodular enclosure approach. How-ever, a design engineer can achieveexcellent SWaP advantages. Figure 4shows a 1U 2-slot conduction-cooledenclosure for AMC modules (used inMicroTCA systems).

Other Design TechniquesThere are other design tricks-of-the-

trade to enhance thermal manage-ment. Individual air flow manage-ment ensures targeted air routing and

optimum heat dissipation.As described earlier, bafflesto redirect airflow can helpfine-tune the thermal man-agement of a chassis plat-form. The guide rails andhorizontal rails can feature anarrow design which is lessof an impedance. Further,with a modular design, theenclosure spacing betweenthe slots (the pitch for ex-ample) and other parts of the chassis can be modi-fied to address specific ther-mal concerns.

Acoustic noise is a concernin many applications. Thisdesign approach has low

noise (48dBa at 3/4 speed and a life ofapprox. 60,000 hrs. at 40°C), makingthis blower a good fit in a wide rangeof applications.

System ManagementAlarm control and system manage-

ment are important issues in some de-signs. Very common in telecom, otherapplications are adopting similar ap-proaches. In fact, the VITA 46.11 sys-tem management specification forOpenVPX completely leverages thePICMG system management for Ad-vancedTCA and MicroTCA. The cool-ing approaches we have discussed em-ploy all the required alarm, I2C, andIPMB outputs required for system man-agement and alarm functions.

More Efficient and Reliable Cooling There are several ways to cool an en-

closure – there are even multiple ways tocool an enclosure with front-to-rear cool-ing. For many Mil/Aero embedded com-puting applications using forced-air cool-ing, using tube-axial fans in the rearprovides enough thermal management.For applications looking to optimizeSWaP, the reverse impeller blower ap-proach can provide a powerful coolingsolution for higher power 3U or 6UOpenVPX boards.

This article was written by Eran Wer-agama, Engineering Manager, Pixus Tech-nologies (Waterloo, ON, Canada). Formore information, visit http://info.hotims.com/65848-501.

Figure 4. Purpose-built conduction-cooled enclosures can leverage standard mod-ules, such as the MicroTCA AMC modules in this system, to optimize SWaP.

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Aerospace & Defense Technology, February 2017 www.aerodefensetech.com 17

High performance, low powerconsumption and small foot-print requirements imposed bythe embedded market on the

processor industry is causing a definitemove away from single-core processors tomulticore processors. Multicore proces-sors have been deemed as the future ofSize, Weight, and Power (SWaP) con-strained applications like military andavionics. They provide higher perform-ance (MHz/W) at lower power. They alsoallow consolidation of multiple functions/applications onto a single platform.

IMA and CertificationModern avionics systems are moving

from federated systems to IntegratedModular Avionics (IMA) where multipleapplications with mixed criticality re-side on the same computing platform[7].The IMA concept is detailed out in a setof standards like DO 297[1], and imple-mentation guidelines like ARINC 653[5]

and ARINC651[6]. A safety-criticalavionics system has to be certified bythe Federal Aviation Administration(FAA) in the United States or the Euro-pean Aviation Safety Agency (EASA) in

Europe, covering both hardware andsoftware. The standard RTCA/ DO-254(ED-80)[1] provides guidance for the de-velopment of airborne electronic hard-ware, and the standard RTCA/DO-178C(ED-12C)[2] provides guidance for thedevelopment of airborne software.

Advantages of multicore platforms interms of performance, power, and sizemake them ideal for IMA applications.One of the application areas could bethe dual redundant two channel com-mand monitor lane architecture of Au-tomatic Flight Control Systems. A typi-cal IMA backplane is divided intoChannel A and Channel B powered byindependent power supply modules forredundancy. Four processing elementsare required to host Channel A com-mand and Channel A monitor, andChannel B command and Channel Bmonitor processes for primary AFCS,and similarly four processing elementsfor backup AFCS. Both IMA cabinetshave to be connected with the intercon-necting digital bus. So, we need fourIMA cabinets and 8 processing elementsto implement the above architecture, asshown in Figure 1.

With the introduction of multicoreprocessing elements, Channel A com-mand and Channel B monitor applica-tions can be hosted on one computingplatform P-1, and Channel B commandand Channel A monitor can be hostedon the second computing platform P-2.It is then possible to implement Dual-Dual architecture with two IMA cabinetsand four processing elements as shownin Figure 2, thus reducing the overallweight by 50%. Also, with increased pro-cessing power available, custom I/O pro-cessing modules can be integrated withthe processing elements for handlingmemory and intensive signal process-ing, thereby reducing the external andcabling requirements. However, the iso-lation requirements of the functions

Evaluating Key Certification Aspects of Multicore Platforms for Safety

Critical Avionics Applications

Figure 1. Dual-Dual Command Monitor lane AFCS architecture with single core processors.

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Avionics/Electronics

hosted should be met, and robust parti-tioning needs to be ensured in the inte-grated environment.

Robust PartitioningIn IMA, robust partitioning, to

achieve fault containment, has tradi-tionally been implemented in the feder-ated architecture with dedicated hard-

ware per application or function. Withthe introduction of IMA and multicore,the robust partitioning property needsto be addressed and ensured[8].

Robust partitioning, or separation, isthe central concept to avoid influencesbetween different applications in spaceand time. Space relates to access ofmemory regions or I/O interfaces. An

example of space partitioning support isa memory management unit (MMU). Itmaps the partitions to memory regionsand enforces access pattern according toa defined configuration. With means oftime partitioning it can be guaranteedthat one function’s changing demandfor hardware resources will never pre-vent another function from obtaining aspecific minimum level of service. Fur-thermore it can be ensured that the tim-ing of a function’s access to these re-sources will not be affected by variabledemand or failure of another function.

It shall be noted that the guarantee ofpartitioning in an IMA (e.g., enforcedand supported by operating system andhardware) generally needs to be assuredwith a probability of the highest (mostdemanding) application running onthis hardware and operating system.Partitioning isolates faults by means ofaccess control and usage quota enforce-ment for resources in software.

For safety-critical embedded systems,quality requirements usually refer totiming or safety attributes. In somecases, security attributes play an impor-tant role as well. Timing attributes oftenconsist of deadlines for specific tasks,which must be met under all circum-stances. This leads to the requirement offully deterministic system behavior.

Certification ChallengesAdopting multicore platforms in

IMA systems where multiple parti-tions are executing on different coresin parallel will bring in significantchallenges as described in the follow-ing sections.

Robust Partitioning — TimeTemporal separation is fundamen-

tally violated for multicore as thereare multiple applications executing inparallel. The inter-chip interconnectmay violate temporal separation atthe microscopic level. The schedulingpolicy should ensure that interfer-ences between parallel executions are controlled, known, and hencebounded for deterministic behavior.Specific challenges are schedulingstrategy and configuration acrosscores such that interference patternsare controlled and bounded.

Figure 3. SMP software configuration.

Figure 2. Dual-Dual Command Monitor lane AFCS architecture with multicore processors.

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Robust Partitioning — Space (Memoryand I/O)

Because there are multiple applicationsexecuting in parallel, there is a fundamen-tal violation of space partitioning asprocessor resources like chip interconnectare shared. In order to achieve spatial sep-aration, memory and I/O contentionshould be controlled and monitored bythe scheduling policy or other mecha-nisms. The impact of many implicit re-sources like chip interconnect need to bestudied in the hardware architecture levelfor achieving deterministic behavior.

Specific challenges include:a. Scheduling policy and configuration

to control resource (memory and I/O)contention;

b. Software mechanisms to manageconcurrent access to shared resources like real-time locking protocols.

Inter-Partition / Inter-Core CommunicationCommunication and synchroniza-

tion are not restricted to partitionsthat execute serially. Synchronizationis required between parallel executingcores. Inter-core communication is fa-cilitated by hardware features likedoorbell interrupts. This can also be accomplished by software. Thiscommunication needs to be determin-istic and synchronized.

Worst Case Execution TimeIn addition to the complexities for

WCET estimation for single coreprocessors, analysis multicore proces-sors need to model and account forthe following:a. Interference patterns between the par-

allel tasks in different cores due tomemory and I/O contention. A detailof hardware arbitration of shared re-sources is generally not available forCOTS hardware.

b. Impact of implicit shared resourceslike interconnects. This informationis generally not available for COTSprocessors and is a source of error.

c. Impact of cache management policy.d. Interleaving by the inter-chip

interconnects of the concurrenttransaction flows in order to maximize the global average band-width.

Cache Memory HandlingCache memory handling was compli-

cated for single processor designs. Thisis further complicated by multiple coresexecuting in parallel sharing cache.Analysis of cache usage is extremelycomplex and almost infeasible. Specificissues that need to be addressed are:a. Cache management policy to isolate

applications running on the samecore and different cores trying to ac-cess the cache, resulting in cachecontention and loss of determinism.

b. Ensuring the cache content integrity.c. Reducing the gap between the

WCET and ACET by ways of cachecontent prediction and cache parti-tioning, or other methods.

Cache CoherencyMaintained in hardware, multi-level

cache hierarchy makes the coherency

model quite complex. These are usuallythrough implicit access to shared re-sources like chip interconnect. Deter-minism of this function is usually notknown for COTS processors.

Performance OptimizationAs WCET estimates are over-estimated,

during normal execution, a lot of unuti-lized processor time would be available.Performance optimization techniquesutilize this spare capacity. The key chal-lenge is to reduce the gap between theWCET and ACET so that the performanceadvantage of multicore is not overshad-owed by the inflated worst case executiontimes resulting in underutilizing theprocessor execution time.

Non-real-time systems, which focuson the average case performance chal-lenges, are not of significance, andmulticore platforms used are tuned for

Figure 4. AMP software configuration.

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maximizing the average case perform-ance. In safety critical systems it ismandatory to know the worst case be-havior up front. So, identifying the keyaspects during evaluation of the plat-form will be helpful in providing first-hand information on potential chal-lenges for system engineers andplatform designers.

Certification Aspects for EvaluationEmploying multicore COTS proces-

sors in safety critical applications willbe cost effective and enhance the timeto market. Platforms will have to bedesigned around COTS processors,carefully choosing the features whichcan be used in safety critical environ-

ments and disabling the featureswhich may not be consistent with thesafety and certifiability aspects. Table1 summarizes the various aspects ofmulticore which are critical for ensur-ing the safe and deterministic opera-tion of the applications that need tobe evaluated.

Software ConfigurationsSymmetric Multi-Processing (SMP) is

an architecture that provides fast per-formance by making multiple CPUsavailable to complete individualprocesses simultaneously (multiprocess-ing). Any idle CPU can be assigned anytask, and additional CPUs can be addedto improve performance and handle in-

creased loads. SMP uses a single operat-ing system and shares common mem-ory, all the IO, and interrupt resources.Processes and threads are distributedamong CPUs.

In Asymmetric Multi Processing(AMP), each CPU group runs its own OS,which may be the same or different fromeach other. Each CPU group can be givena specific application to run. All CPUgroups must cooperate to share the re-sources, meaning no single OS can ownthe whole system. I/O and interrupts aredivided up amongst the CPU groups.

Virtualization is a concept that ad-dresses the need to run multiple OS ona single system. Using virtualization,one can define a logical partition torepresent a collection of actual or emu-lated hardware resources. Virtualiza-tion is a computing concept in whichan OS runs on a software implementa-tion of a machine, i.e., a virtual ma-chine (VM). A single virtual computingmachine runs on a single logical parti-tion. The VMs are managed by a low-level software program virtual machinemanager, also called a hypervisor layer,which provides abstraction betweenthe underlying physical hardware andthe VMs. It can also provide communi-cations between VMs if required, aswell as security and reliability (e.g.,one VM could crash without affectingthe rest of the system). It managesglobally shared resources and virtual-izes some as required.

AMP offers easy portability of legacyapplications from single core design tomulticore design, compatible with theexisting debugging tools, and offers bet-ter control over determinism and per-formance.

Evaluation MethodsAMP or Microkernel configuration

can be used for hosting a mix of safetycritical and non-safety critical applica-tions, maximizing utilization and en-suring that the safety critical partitionsare not impacted by the non-criticalpartitions and applications running inparallel. The following sections discussgeneric steps for evaluating specific as-pects in a chosen software configura-tion AMP or Microkernel. Typical testsetup is shown in Figure 6.

Figure 5. Hypervisor software configuration.

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I. Determinism and Performance Introduction of multicore platforms

will pose significant challenges in arriv-ing at deterministic behavior. Chal-lenges in estimating the worst case be-havior could result in inflating theexecution time budgets for various parti-tions for ensuring the deterministic be-havior, which in turn can easily nullifyany performance advantages. So, there isa need to evaluate the platforms with re-spect to performance, while meeting thedeterministic behavior required by thesafety critical hard real-time systems.1. Establish the partitions on various

cores.2. Establish Worst Case Execution time.

References [13] [14] [15] give compre-hensive study on WCET estimationfor multicore platforms. Supplier pro-vided tools can also be used for theestimation. Analytical tools to iden-tify the worst-case paths and analysiscan be used.

3. Derive test case scenarios, which canlead to worst-case paths leading tomaximum contention delays includ-ing concurrency and coherencesetup[7].

4. Arrive at the Average Case Executiontime.

5. Compare the ratio of ACET/WCET.6. Study the various mechanisms for dy-

namically using the available slacktime for running non-critical orslower rate tasks.

7. Study the overall processor utiliza-tion across the cores.

II. Resource Partitioning andAllocation

Introducing multicore in IMA sys-tems with multiple applications execut-ing in parallel causes a fundamental vi-olation of space partitioning asprocessor resources like chip intercon-nect are shared. The impact of manyimplicit resources like chip interconnectneed to be studied in the hardware ar-chitecture level for achieving determin-istic behavior.1. Study the various mechanisms avail-

able for partitioning of the shared re-sources.

2. Study the mechanisms available forallocation and de-allocation of re-sources to various partitions.

S No.CertificationAspect/Parameter Description

1. Determinism andPerformance.(ACET/WCET)

Deterministic behavior of the platform should be established.Multicore Processors (MCPs) are designed to optimize the AverageCase Execution times which will inflate the Worst Case ExecutionTimes. Safety critical software applications are designed to meet bud-geted execution times for Worst Case behavior. In case of MCPs thedifference between the ACET and WCET is very high, resulting in thepoor utilization of the processor. Ratio of ACET/WCET is a very goodindicator of the platform performance and should be a key factor inselection of MCP over multiple single core processors

2. ResourcePartitioning

As there are multiple applications executing in parallel, there is a fun-damental violation of space partitioning as processor resources likechip interconnect are shared. In order to achieve spatial separation,memory and I/O contention should be controlled and monitored by thescheduling policy or other mechanisms. Impact of many implicitresources like chip interconnect need to be studied in the hardwarearchitecture level for achieving deterministic behavior.

3. Functional SafetyAnalyses

Functional safety analysis needs to be performed at device level torefine the device failure modes and associated failure rates. Failurerates determination should take into account the coverage of test fea-tures embedded in the device, and need to evaluate the protectionmechanisms to meet the failure rates allocated to the functions per-formed by the device.

4. DeviceConfigurability

Platform/Device should have the provisions to activate and deactivatethe functions/features and should have provisions to ensure that pro-grammed “Active Configuration” will actually configure the device asexpected.

5. Cache MemoryHandling

On an MCP, applications running on different cores compete forshared cache (L2, and/or L3 if present). This greatly increases thepotential for interference whereby an application running on one corecan significantly impact the execution time of an application runningon another core. Consequently, the impacted software may overrun itsexecution time budget and/or miss deadlines, resulting in unsafe fail-ure conditions.

6. InterconnectArchitecture

Interconnect is the shared resource among the multiple cores.Concurrent transactions from different cores to access shared resourceswill have an impact on the determinism. Interconnect architecture andservice mechanisms need to be analyzed for impact on the determinism.

7. Inter-CoreCommunication

Synchronization mechanisms available for applications running on var-ious cores which are facilitated by the inter-core communication provi-sions available need to be analyzed.

8. Interrupt Handling For safety critical systems, asynchronous events like interrupts intro-duce non-determinism. Interrupts may be managed in the followingways: Disable all interrupts. Make interrupts strictly periodic.

How are interrupts handled? Are they disabled or forced to be period-ic, or are other mechanisms employed? In the presence of interrupts,how is predictable and bounded timing analysis assured? This analysisshould include effect on caches.

9. Development andAnalysis Tools

Wide varieties of development and verification tools are used in pro-viding the required certification evidence for robust portioning inspace and time. Availability and performance of the following toolsneed to be done:

Schedule generation and analysis tools, Resource partitioning, alloca-tion, and debug and performance monitoring tools, Exception and sta-tus monitoring tools.

10. ManufacturerPublic & PrivateData Availability

If component manufacturer public data and training support are notsufficient to address these three above aspects, access to componentmanufacturer private data should be promoted and established. Theproof that access to component manufacturer private data has beenestablished shall be documented.

Table 1. Multicore platform certification aspects for evaluation.

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3. Perform the static analysis to ensurethat the resource partitioning is notviolated, or any violations are de-tected and annunciated.

III. Functional Safety AnalysisIn IMA it is critical to maintain the

robust separation between the variousfunctions hosted. Mechanisms for errordetection and fault containment andmitigation are to be analyzed in detail.1. Identify various probable errors that

can occur in software or hardware orin combination.

2. Study the fault identification and an-nunciation mechanismsbuilt into the platform. An-alyze if there is a possibilityof un-annunciated failureoccurring.

3. Provide the analysis that,on detection of a fault in apartition, erroneous parti-tion can be isolated, halted,and aborted, preventing itfrom affecting the healthypartitions.

4. Study if the provisionsavailable to recover thefaulted partition can be in-ducted back into the exe-cution schedule.

IV. Device ConfigurabilityIn practice many config-

urable features (like somecores, register settings, pins,and debug functions) of theplatform are deactivated.1. Check the provisions to

create, store, and load thedevice configurations.

2. Establish the working con-figuration of the device used.

3. Provide analysis of thesafety mechanisms employed.Make sure that the device functions as

per the configuration and inadvertentactivation of disabled functions is eitherprevented or will not lead to any unin-tended effects on the operation.

V. Cache Memory HandlingCache memory management is one

of the key aspects to be studied.1. Identify the cache organization on a

given platform.

2. Identify the cache management pol-icy employed, like cache partitioningor cache trashing.

3. Derive test case scenarios that canlead to worst case paths leading tomaximum contention delays includ-ing concurrency and coherencesetup[7].

4. Identify the impact of concurrent ac-cess to the shared cache.

5. Establish the ratio of ACET to WCET.6. A WCET equal to ACET multiplied by a

factor of 2 can be deemed acceptable.Experimental results[11] [12] suggest

that cache partitioning can help in re-

ducing the gap between the averagecase execution time and worst case exe-cution time significantly, thereby help-ing the application schedules to be tightyet safe for safety critical applications.

VI. Interconnect ArchitectureCOTS hardware has to be deeply ana-

lyzed to understand all the interferencechannels, including interconnect or co-herency fabric. The behavior of the in-terconnect needs to be analyzed, as in-

terconnect manages the transactionsfrom the cores and shared resources.The behavior depends on interconnectarchitecture, arbitration policy, andtopology of network. With limitedavailability of the data from the hard-ware designers, the evidence of deter-minism in transactions happening inparallel needs to be established with suf-ficient experimental data and analysis.

VII. Inter-Partition and CoreCommunication

Inter-process communication IPCmechanism is employed in ARINC 653

compliant Real Time Operat-ing systems, which will en-sure the communication be-tween the partitions in adeterministic manner.1. Establish partitions on var-

ious cores.2. Study the communication

mechanisms available forpartitions running on dif-ferent cores.

3. Characterize the delayscaused due to interferencefrom the partition runningon the other cores.

4. Evaluate the IPC misseddeadlines or periods if any.

VIII. Interrupt HandlingInterrupts are unsynchro-

nized tasks that originate ran-domly, introducing non-determinism. The problemgets amplified in multicoreprocessors because of the in-terrupts originating frommultiple cores simultane-ously. Methods such as dis-abling interrupts and makinginterrupts periodic, etc., are

used in handling the interrupts. Evalu-ate the interrupt handling mechanism.1. Study mechanisms available to parti-

tion hardware resources available toeach operating system.

2. Study impact of two operating sys-tems trying to access the PIC simul-taneously and their effect on the taskexecution.

3. Characterize the interrupt latencywith multiple processes running ondifferent cores simultaneously.

Figure 6. Typical test setup with dual core processor with shared cache.

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4. Worst case interrupt latency should bedefined per core, services, and drivers.

IX. Development and Analysis ToolsFor the development and integra-

tion of Time and Space partitionedsystems and to ease the certificationeffort, availability of tools is very im-portant. Evaluation of platform basedon the toolset it provides or supportswill be one of the key criterion. Fol-lowing are the list of desirable toolsand features:1. Schedule Generation tools: Availability

and effectiveness of the tools to definescheduling components like partitions,processes, threads, system objects, andassociated parameters such as partitioncycle, WCET, memory size, etc. Gener-ate platform registries that define thescheduling, resource partitioning, ac-cess permissions, inter-partition, andintra-partition communication sched-ules, etc.

2. Schedule Analysis tools: It is requiredto provide evidence that the schedulegenerated is actually schedulable inreal time. Static analysis tools to eval-uate the schedulability of the systemneed to evaluated.

3. Debug tools: Real time debuggingtools for development and verifica-tion will help simplify the system de-velopment.

4. Performance and Status monitoringtools: The tools monitor the status ofthe creation of processes, threads andother system objects; execution timeswith respect to the allocated budgets;and utilization of memory and IO re-sources. Exceptions occurring in systemand user domains need to be evaluated.

X. Manufacturer Public and PrivateData Availability

In order to evaluate the platform, avail-ability of accurate data is required tomodel the behavior of the platform like

interconnect bus, cache, and the impactof shared resources on the performance.Proof availability of data needs to be es-tablished to the certification authorities.

SummaryTo summarize, the application of

MCPs in avionics and other safetycritical systems is inevitable becauseof the performance advantages andobsolescence of single core processorsin the future. However, they presentsignificant challenges for the develop-ers of certifiable, safety-critical appli-cations. If one wishes to use an MCPin such applications, bounding andcontrolling interference patterns onshared resources, and effectively man-aging CPU utilization, are essential.Without the first capability, certifica-tion of safety critical software is im-possible. Without the second, muchof an MCP’s increased computingpower is wasted.



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Because of the limited in-service ex-perience of multicore platforms in thesafety critical industry, there is notenough evidence available to readilyadopt the multicore technology. It isvery beneficial to evaluate the commer-cial platforms which can be certified to

DO 178B Level A/DO 254-Level A withrespect to the criterion identified tohave first-hand information on the per-formance, safety features, availability oftools to ease the development effort,and availability of required data for pro-viding certification evidence.

This article is based on SAE TechnicalPaper 2015-01-2524 by Srikanth Gampaof UTC Aerospace Systems (Charlotte, NC).http://saemobilus.sae.org.

References1. RTCA, Inc, “RTCA/DO-254, design

assurance guidelines for airborneelectronic hardware,” 2000.

2. RTCA, Inc, “RTCA/DO-178C, softwareconsiderations in airborne systems andequipment certification,” 2012.

3. RTCA, “DO-297: Integrated ModularAvionics (IMA) Development, Guidanceand Certification Considerations” 2005.

4. Society of Automotive Engineers (SAE),“ARP 4754: Certification Considerationsfor Highly-Integrated or Complex AircraftSystems”, 1996.

5. Aeronautical Radio Inc (ARINC), “ARINC653: Avionics Application SoftwareStandard Interface Part 1 - RequiredServices,” 2010.

6. Aeronautical Radio Inc (ARINC), “ARINC651: Design guidance for IntegratedModular Avionics”, 1997.

7. Jan Nowotsch, Michael Paulitsch, “LeveragingMulti-Core Computing Architectures inAvionics,” EADS Innovation Works.

8. Xavier Jean, David Faura, Marc Gatti,Laurent Pautet, Thomas Robert,“Ensuring Robust Partitioning inMulticore Platforms for MulticoreSystems,” 31st Digital Avionics SystemsConference, 2012-10-16.

9. Petar Radojkovi’, Sylvain Girbal, ArnaudGrasset, Eduardo Quiñones, Sami Yehia,Francisco J. Cazorla, “On the Evaluationof the Impact of Shared Resources inMultithreaded COTS Processors in Time-Critical Environments,” ACMTransactions on Architecture and CodeOptimization, Vol. 8, No. 4, Article 34,Publication date: January 2012.

10. João Craveiro and José Rufino, FrankSinghoff, “Architecture, Mechanisms andScheduling Analysis Tool for MulticoreTime- and Space-Partitioned Systems”.

11. Nan Guan, Martin Stigge, Wang Yi, GeYu, “Cache-Aware Scheduling andAnalysis for Multicores,” EMSOFT'09,October 12-16, 2009, Grenoble,France.Bach D. Bui, Caccamo Marco, LuiSha; Martinez, J., “Impact of CachePartitioning on Multi- Tasking Real TimeEmbedded Systems,” Embedded andReal-Time Computing Systems andApplications, 2008. RTCSA ‘08. 14thIEEE International Conference.

12. Reddy Rakesh, Petrov Peter, “EliminatingInter-Process Cache Interference throughCache Reconfigurability for Real-Timeand Low-Power Embedded Multi-TaskingSystems,” CASES’07, September 30-October 3, 2007, Salzburg, Austria.

13. Chattopadhyay Sudipta, Chong Lee Kee,“A Unified WCET Analysis Framework forMulti-core Platforms,” ACM Transactionson Embedded Computing Systems.

14. Marco Paolieri, Eduardo Quiñones“Hardware Support for WCET Analysisof Hard Real-Time Multicore Systems,”ISCA’09, June 20-24, 2009, Austin,Texas, USA.



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Long-range bombers may havemissions halfway around theworld. Fighter jets may have tostay in the air longer than their

relatively small fuel tanks will allow,or may find they have exhausted theirfuel unexpectedly, such as during su-personic flight or evasive maneuvers.In these situations, large tanker air-craft are deployed that carry sufficientfuel to refill several smaller aircraft ina single mission (Figure 1). The task ofinjecting volatile jet fuel from one air-craft to another while both are mov-ing at high speed and altitude isfraught with risk.

Design IssuesMilitary aircraft fuel systems are

complex because they have to handlemany different operational scenarios,including ground fueling as well as air-to-air refueling. Design challenges foraerospace engineers include makingsure the aircraft can maintain balancewhile undergoing dramatic altitudechanges and possibly an engine orcomponent failure, minimizing weight,and using irregularly shaped spaces forfuel storage. They need to simulatethese operational conditions to ensuretheir designs are safe and functional inthese environments.

SimulationEngineers use a process called inert-

ing to make both air-to-air refuelingand on-land fueling safer. An inert gas ispumped into the ullage (the nonfuelvolume of a tank) to reduce the concen-tration of oxygen and volatile vapors.

Simulations help engineers ensure thefuel ullage vapor is inert while it isadded to the tanks. The simulations cal-culate the amount of nitrogen thatneeds to be produced by the onboardinert gas generation system to helpdrive out the oxygen in the tank thatwould support the combustion of thefuel vapor.

Engineers calculate this amount by sim-ulating fuel flow rate in and out of a tankand determining the amount of ullagespace that is in the fuel tank at any pointin time. The amount of air that is enteringor leaving the tank through the vents canalso be determined with this simulation.

System-level simulation tools such asMentor Graphics Flowmaster allow forthese designs to be evaluated for variousscenarios in a short time relative to test-ing (Figure 2). The software includes alarge component library with tailoredaerospace components that allows engi-neers to quickly construct and simulate

the entire fuel system. A single modelcan be used to run all of the differenttest scenarios that must be considered.


Simulating and Analyzing Flow for an Air-to-Air Refueling System

Figure 1. Designing a safe and effective air-to-air refueling is a challenge for aerospace engineers.

Simulating and Analyzing Flow for an Air-to-Air Refueling System

Figure 2. 3D model of a wing-mounted aerial refu-eling pod and 1D model of the aircraft refuelingsystem.

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Sizing and Validating Fueling Designwith Steady-State 1D Simulations

Engineers often use 1D steady-statesimulations to determine an optimumspecification and size of fuel systemcomponents because determining siz-ing and flow balancing requirements is

simpler in a steady state than in tran-sient conditions. A good example ofthis is line sizing. There is an optimumflow rate and pressure for refueling theaircraft that can be achieved along withbalancing the inflow from either side ofthe aircraft to the other. Steady-state

analyses find the optimum line size andflow restrictor sizes for achieving theoptimum performance.

However, a steady state is not alwaysthe case in real-life situations. The fuelsystem needs to operate in many scenar-ios. Engineers must consider extreme sit-uations and ensure their designs willhandle them. Parametric simulationscan help engineers quickly determinethe areas of concern in a model thatmight be affected by high pressurespikes or overly fast or overly slow valveactuation. Conducting a parametricstudy allows an engineer to run a seriesof analyses while changing specific vari-ables such as piping size, orifice diame-ter or valve control logic to find the op-timal design that meets all of the designcriteria for the specific system.

Transient 1D CFD SimulationsTransient simulation of fuel systems

can help engineers ensure the aircraftwill remain balanced during air-to-air re-fueling. Fuel tanks can be in either wing.Filling one fuel tank too fast can causethe aircraft to roll and disconnect fromthe tanker aircraft. Several dynamic fac-tors must be considered to understandthe aircraft balance, including controlvalve operation, aircraft pitch and roll,and fuel flow rates. All of these factorsmust be considered when running tran-sient simulations to figure out if the re-fueling control logic can properly adjustthe system to maintain balance.

The potential for an unbalanced fillcan be reduced with control systemsthat monitor the fuel level and flowrates in each tank. This control systemconstantly adjusts valves to minimizethe imbalance. The simulation softwarehas a catalog of control componentssuch as PID controllers, gauges and pro-grammable controllers that allow engi-neers to virtually recreate the actualcontrol system to come up with an op-timum design. Alternatively, the engi-neer can connect to Simulink directlyand run a co-simulation where the con-trol system is modeled in Simulinkalongside the fuel-system simulation.

Fluid Hammer, Cavitation, and ErosionAs the receiving aircraft disconnects

from the tanker during an air-to-air fuel-


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System Testing & Simulation

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System Testing & Simulation

ing, the check valves close rapidly. Thiscan cause fluid hammer on both aircraft.The effect on piping causes excessive pres-sure surges, damaging the entire system.Simulation assists in determining themaximum pressure tolerance and pres-sure spike limits of the system (Figure 3).The thermal simulation software pro-vides scenarios for fluid hammer andother rapid transient events in thefuel system that might cause dam-age. Engineers can evaluate systemresponses for the full range of tem-peratures and pressures experiencedduring a mid-air refueling event.

A pressure drop below the vaporpressure of a liquid will create bub-bles that attach themselves to sur-faces and implode. If this occursoften enough, such as with fuel im-pellers, the result will be surface pit-ting, a process known as cavitation.Erosion is sure to follow. Also, thebubbles can coalesce, adding com-

pressibility to the otherwise incompress-ible fluid. Pumps over-spinning, rapidvalve actuation, and shifting orifice sizescan lead to cavitation in fuel systems.While many of these can be determinedduring steady-state analysis, some ofthem show up only over time. This is

why running both steady-state and tran-sient-state simulations is useful.

Combining the 3D simulation of thedifferent complex components with 1Dpiping system analysis allows engineersto quickly test many scenarios and reducecosts and development time. Sensors and

simulation data have made modernrefueling operations safer. However,by continuously learning from sen-sor data and simulations, refuelingsystems will become more reliable,safer, and cost-effective. And withthe latest simulation tools, engineerscan design these optimized systemswith less time spent on physical test-ing in the field.

This article was written by SanjeevPal, Industry Analyst, Neovion Group(Charlotte, NC), and Michael Croegart,senior product marketing manager,Mentor Graphics (Chicago, IL). Formore information, visit http://info.hotims.com/65848-503.

Figure 3. Pressure versus time for locations upstream and down-stream of the reception coupling.

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RF & Microwave Technology

The Ins and Outs of SpaceflightPassive Components and AssembliesRF and microwave components deployed in spaceflight applications can experience hundreds of degreesof temperature variation, massive amounts of radiation, and can be expected to operate at an elevatedlevel, sometimes for decades. The demands of operating in a space environment bring unique challengesand unforgiving reliability requirements. Designing passive components to meet these rigorous operationcriteria necessitates a high level of design expertise, qualifications/certifications, and testing capability.

Advancements in tele com -munications tech nology andan increased demand forconnectivity to high-speed

data services is leading to an increase inspace deployments of telecommunica-tions platforms. These platforms offerservices ranging from surveillance andmilitary intelligence, to GPS and com-mercial high-speed data for home Inter-net. Many remote industrial servicesalso rely on satellite communicationsfor control and monitoring. However,deploying the sensitive RF and mi-crowave equipment necessary to sup-port these critical data links — hun-dreds of miles from the surface of theEarth — brings a host of challenges notseen on Earth’s surface.

Though operation on land, air, and seaposes many extreme design challengesfor RF and microwave passive compo-nents, typically these platforms experi-ence limited terrestrial exposure to temperatures, radiation, g-forces, andpressures. In the bleakness of space, thereare much greater extremes and environ-mental instabilities. Couple these factorswith the inability to provide mainte-nance service, and these high-performingspace technologies must operate, reliably,for up to 15 years. The rigorous opera-tional requirements, in turn, demandstringent design and manufacturing prac-tices for space-qualified components thatmust be taken into considerationthroughout the design, fabrication, anddelivery of space-grade, or spaceflight, RFpassive components and assemblies.

Space vs. Terrestrial EnvironmentsThough many of the electrical and RF

performance criteria may be similar be-

tween spaceflight and terrestrial passiveRF components and assemblies, there areadditional environmental considerationsand design requirements based on thephysical geometry constraints of the com-ponents. For example, the temperaturerange of operation for space-grade compo-nents in the U.S. is required to meet themilitary required temperature range of -55to +125 °C. Nevertheless, space-qualifiedcomponents are required to operate in theextremes of these temperature ranges for15 years without service, and potentiallywithin a hard vacuum.

The vacuum of space is unlike anyterrestrial environment, as there is no

dielectric atmosphere to insulate be-tween component elements or regulatetemperature fluctuations. Specificallyfor high-power and highly sensitive as-semblies, the lack of atmosphere mayrequire the component or assembly tobe hermetically sealed. If not, effectssuch as multipaction and outgassingcan occur.

There are strict limits on materialsthat can be used in space, as outgassing,radiation-based material degradation,and adverse material interactions canlead to catastrophic cascaded failures.Additionally, materials such as cad-mium and zinc will disintegrate in low

Highly specialized multipactor predictive tools enable filter and other RF passive component designs thatensure a long life without concern of breakdown.

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pressures, and other metals, such as tin,will develop metallic whiskers — calleddendrites — that could bridge electricalconnections and induce componentand assembly failures. Also, as there isno surface corrosion in space, when dis-similar and similar metals touch, ametallic welding may occur — a processknown as cold welding — and this maychange the RF and electrical behavior ofmetallic contacts.

Some insulators also will be reducedto dust when exposed to high cosmicradiation levels. For example, Teflonmaterials may suffer derated electricalcharacteristics when exposed to radia-tion levels above 5 Megarads. Othermaterials may face the generation ofhotspots when exposed to gamma orother cosmic radiation, and deterio-rate. In space structures that also con-tain optics, for example, an outgassingmaterial or one that creates debriscould deposit material or generate ahaze that reduces the satellite’s opticalperformance. Hence, every materialthat is used for space-qualified devicesmust be an approved material, or anonstandard materials part requestmust be submitted in order to approveand validate the material.

Another key difference with space-flight hardware is that the componentsand assemblies must be completelyshielded in a faraday cage. This cage iscommonly composed of aluminum forlow-weight purposes, and must be of anecessary thickness to withstand radia-tion specifications delivered by the or-ganization deploying the hardware.

Design Considerations With these factors in mind, the size,

weight, and specific shape of the com-ponent and assembly must be kept tothe minimal and most efficient formatpossible. Each kilogram of masslaunched into space costs thousands ofdollars. Certain passive componenttopologies and technologies may not beviable for space, as these methods can-not meet the weight or size restrictions.Ultimately, there is no opportunity fortune-ups, service, or maintenance inspace, so any component in space mustbe designed to survive within the harshenvironmental parameters for at least

15 years. This includes high-tempera-ture and high-power conditions for ex-tended periods of time.

Moreover, the clever use of compo-nents can also lead to reduced circuitcomplexity and size, which may in-volve much more detailed design re-sources invested up front, and may givedesigners with prior space experience asignificant advantage. For instance,since stability is a high-priority require-ment for spaceflight components inorder to reduce size and circuit com-plexity, instead of adding frequencyequalizer components, negative andpositive coefficient of thermal expan-sion materials can be used in conjunc-tion to reduce thermal variance in de-vice performance (as you could in aresonator or filter tuning element).

As mentioned previously, in a hardvacuum, multipactor breakdown cantake place when there are significantvoltage gradients between conductiveelements of a component or assembly,mainly in high-power filters. For exam-ple, in a resonator cavity of a RF filterstage, the impedance changes withinthe filter could lead to much highervoltage gradients than those specifiedfor the input and output port imped-ances. These internal potentials couldcause ionization and eventually multi-pactor breakdown — cascading elec-trons from one conductive surface to

another. As using large gaps may not bean option, certain filter topologies ormaterials may be unacceptable in spaceenvironments. Specialized simulationtechnology and design experience arerequired to tackle obscure effects suchas multipactor breakdown.

Furthermore, as the communicationlinks these devices support must over-come high levels of path loss and inter-ference, the loss of the componentsmust be extremely low. Each watt ofpower on a satellite or space platform isgenerated by solar cells, so any lack ofefficiency requires additional solar ele-ments, and increased size and cost ofthe overall space structure.

Cavity, lumped element, and dielec-tric resonator filters with elliptic topolo-gies are more common in spaceflightapplications, as the insertion loss, re-turn loss, size, and weight are muchlower than other technologies andtopologies. The frequency of operationfor the filter determines the size of sometechnologies; for example, at 18 GHz, adielectric resonator element is roughlythe size of a pencil eraser. At 1 GHz, asimilar performance dielectric resonatoris the size of a hockey puck.

Qualifications and Standards forSpace-Qualified Devices

In order to qualify a component ordevice for space applications, an ele-

Test Or Inspection Requirements For MIL-PRF-

38534

Screening Level MIL-STD-883

Method Class H Class K

(Space Level)

Preseal Burn-in Optional Optional 1030

Nondestructive bond pull -- 100% 2023

Internal visual 100% 100% 2017

Temperature Cycle 100% 100% 1010

Constant acceleration 100% 100% 2001

Mechanical shock 100% 100% 2002

Particle impact noise detection (PIND)

-- 100% 2020

Pre Burn-in electrical Optional 100% -- Burn-in 100% 100% 1015

Final electrical 100% 100% -- Seal 100% 100% 1014

Radiographic -- 100% 2012

External visual 100% 100% 2009

Screening and quality conformance inspection requirements for testing and screening RF components andassemblies for space applications.

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AIntro

ment-by-element screening and qualifi-cation with rigorous process controls isnecessary. Each stage of the materialsupply, manufacture, and assemblymust be meticulously documented. Inaddition to the documentation, thereare several industrial and military stan-

dards that may apply, depending uponthe application. As the process of spacequalification is no easy feat, process ex-perience and space heritage are ex-tremely valuable. There are few organi-zations that can prove several successfuldeployments, and have engineers with

experience in space qualification able todesign and follow all of the necessaryprocess and documentation steps.

As a result of the stringent space re-quirements, facilities that produce space-grade devices must meet certain qualitymanagement standards such as AS9100,which is a modified and extended ver-sion of ISO-9001 specifically for the aero-space and defense industry. Quality as-sembly training and standards are alsorequired — namely, IPC J-STD-001 withamendment 1 for soldering and electricalassembly for space, and IPC-610 class 3for soldering electronic assemblies.

Military standards such as MIL-PRF-38534 and MIL-STD-883 dictate many ofthe screening and quality conformanceinspection requirements for testing andscreening RF components and assem-blies for space applications (see table).These requirements demand a series ofphysical, environmental, and electricaltesting, which is 100% mandatory forspace-level, or Class K. MIL-STD-883provides the methods of screening andexamination for space-level componentsdictated in MIL-PRF-38534.

For military and defense applicationsand many other space-grade applica-tions, all materials and material suppli-ers must be listed in the Qualified Prod-ucts Listing (QPL) or QualifiedManufacturers Listing (QML). If not, anonstandard parts or nonstandard ma-terials request must be processed. Eachcomponent must also be shipped withall of the documentation describing itscomplete design, fabrication, and oper-ation. This documentation couldamount to several hundreds of pages ofdetail, down to the precise curing timeof adhesives used in a sub-element con-struction process.

Over and above these requirements,specific customers for spaceflight partsmay require additional levels of docu-mentation, processes, or testing. Theserequirements may be subject to securitymeasures, so often are not available fordiscussion or detail outside of the re-quirements. Many times with militaryand defense clients, there may be littlefeedback on the use and performanceof the qualified part once it leaves themanufacturer, unless there is a failureor problem that arises in the future.


@ MachinedSprings.com

For more information on Machined Springs, including custom applications, go to MachinedSprings.com or call (877) 435-4225

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Testing Requirements For space applications and many

military and defense applications, thetesting requirements for high reliabil-ity (Hi Rel) dictate an elevated level oftesting and certification of the facili-ties where the testing is performed.ANSI/ISO/IEC 17025 provides a set ofgeneral requirements used to indicatethe competence of a facility to carryout the necessary tests and calibra-tions to meet various other standards.IECQ exceeds ISO/IEC 17025 in its in-clusion of relevant requirements, andis designed to increase the quality as-sessment system requirements for de-manding applications. Some docu-mentation still exists that mayreference inspections IAW with MIL-I-45208, which has since been replacedby ISO 9001 certification.

Many of the Hi Rel tests necessary tomeet space qualification are indicatedin MIL-STD-883 and MIL-STD-202, with

calibration and inspection criteria pro-vided in resources such as ANSI/NCSLZ540-1. Configuration management in-formation is also shared in MIL-STD-961. The key features of this process areto ensure complete product qualifica-tion, materials traceability, calibration,and testing to all applicable standardswith documentation outlining the com-plete lifecycle of each unit produced.This may include an operator inspec-tion, third-party inspection, customerinspection, and government inspection,with photographs of each componentor feature that cannot be visually in-spected completely.

Ultimately, this rigor is designed tobe able to completely reproduce onland any scenario encountered inspace in order to diagnose and trou-bleshoot problems that occur whenthe devices are deployed. For instance,if a material doesn’t have absolutetraceability, a sample must be sent for

destructive chemical testing to ensureits exact chemical makeup.

Considering the deep detail and de-sign strategy necessary to producespace-grade RF components and as-semblies, it is understandable whythere are few organizations capable ofmeeting all of the criteria for spacequalification. Beyond sheer design ca-pability, every choice down to the ma-terial must be made with a completeunderstanding of the end space appli-cation, which involves a detailedprocess of elimination prior to invest-ing design effort. Nevertheless, thislevel of rigor is necessary to keephighly critical space-based systemsoperating under extreme vacuum con-ditions year after year.

This article was written by Paul Ko-vacich, Engineer, at API TechnologiesCorp., State College, PA. For more infor-mation, visit http://info.hotims.com/65848-541.


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Development of robust semiconductordevices with high energy efficiency

and reliability is a key objective towards'Energy Conversion and Power Manage-ment ' for naval system applications. Thegoal of this research is to create the fun-

damental knowledge needed for the de-velopment of novel approaches to syn-thesize high-quality, thick SiC epitaxiallayers (> 100μm) for reliable high voltage(≥10kV) / high power (>100 kW) elec-tronics for navy ship applications.

This program focuses on (a) developinginnovative solutions to the current mainlimitation in SiC homoepitaxy — reduc-tion/elimination of device-killing defects;(b) gaining understanding of the chemicalvapor deposition processes in SiC epitaxy,specifically related to precursor gas decom-position dynamics and subsequent para-sitic deposition of Si, C and SiC on the gasinjector tube walls; and (c) achieving bothhigh growth rate and high quality epitax-ial films in a cost-effective manner.

This research investigated the epitaxialgrowth of thick films using halogenatedprecursors: chlorine-based dichlorosilane(DCS) and fluorine-based tetrafluorosi-lane (TFS). Growth using DCS is exten-sively studied, showing high growth rate(>25μm/h), excellent doping control (n+,n-, SI, p-), good epilayer morphology(RMS<2nm for 4° SiC) and low defectdensities (BPD, IGSF densities 0≈5.6cm-2.Extensive study of dichlorosilane pro-vides evidence that even chlorosilanegases are not the best solution to elimi-nate Si droplet formation and suppressparasitic deposition, which subsequentlydegrades crystal quality. The understand-ing gained from this research led to thefirst use of fluorinated silicon precursorwith much stronger bonds to grow SiCepitaxy. Tetrafluorosilane (TFS, SiF4) hasbeen utilized for the first time to com-pletely eliminate Si droplet formationand suppress parasitic deposition by 80%.The ability of TFS to suppress particulatesenables long duration, high quality thickepitaxy in the cleanest reactor environ-ment. Epitaxial film growth rate, the in-fluence of C/Si ratio of the precursor gaseson doping concentration and crystalquality, growth process conditions, etc.,have been investigated.

High quality, thick epitaxy (120 μm)was demonstrated on 8° substrate at agrowth rate of 30μm/h using TFS. Excel-lent control of the uniformities of dopinglevel and morphology makes TFS espe-cially suitable for large wafer and multi-wafer CVD growth to achieve SiC deviceswith excellent performance uniformity.

Development of High Quality 4H-SiC Thick Epitaxy forReliable High Power Electronics Using Halogenated PrecursorsNew approaches to synthesizing SiC epitaxial layers could improve electronics performance.

Office of Naval Research, Arlington, Virginia

Particles on epilayer surface grown using various gas precursors at similar growth condition. No large par-ticle related defects are observed for the epilayer grown using SiF4 even at higher flow rates. (T= 1550°C,P= 300 torr, H2 flow rate = 6 slm and duration= 1 hr).

Tech Briefs

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AIntro


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AIntro


The goal of this research project was to advance the scienceand technology of silicon-based photonic devices using

SiGeSn heterostructures. Such devices work in mid-IR spectralrange and form the foundation for mid-IR photonics that enableon-chip systems for applications ranging from vibrational spec-

troscopy, chem/bio sensing, medical/health uses, to environ-mental monitoring. This project was mostly directed toward im-proving GeSn detectors with the use of surface plasmons in-duced by carefully designed metal nanostructures. The goal wasto replace the current mid-IR detectors that are usually photodi-odes made from narrow bandgap III-V or II-VI semiconductorcompounds such as InGaAs, InSb, HgCdTe (MCT) or type-II In-GaAs/InGaSb superlattice. These photodiodes are incompatiblewith the CMOS process and cannot be easily integrated with Sielectronics. The GeSn mid-IR detectors developed in this projectare fully compatible with the CMOS process.

Beginning with GeSn-based p-i-n photodiodes with an activeGeSn layer that is almost fully strained, the strategy is to use the

In terms of epilayer quality including morphology, roughness,crystallinity, polytype inclusion, BPD density, etc., epigrowthusing TFS is found to be superior to the growth using DCS orsilane gases. Defect free epilayer growth (≈0 BPD density) wasachieved by a two-step epilayer growth by growing a buffer layerepi-eutectic etch-regrowth process using DCS precursor.

High quality on-axis epilayers were grown using TFS atlow flow rates (5 sccm) with increased step flow growth athigh C/Si ratio offering the potential for defect free epilay-ers, a significant breakthrough SiC technology.

Ni/4H-SiC Schottky diodes fabricated on DCS-grown andTFS-grown epilayers show similar barrier heights (>1.6eV) andideality factors (<1.1). The tightest distribution of Schottkyparameters is reported for Ni/SiC Schottky system fabricatedon TFS-grown epilayer.

This work was done by Tangali S. Sudarshan of the University ofSouth Carolina for the Office of Naval Research. For more infor-mation, download the Technical Support Package (freewhite paper) at www.aerodefensetech.com/tsp under theElectronics & Computers category. NRL-0068


Tech Briefs

Silicon Based Mid-Infrared SiGeSn HeterostructureEmitters and DetectorsEnhancing the performance of GeSn p-i-n photodiodes using gold metal nanostructures.

Air Force Research Laboratory, Arlington, Virginia

(a) A cross-sectional schematic of the GeSn p-i-n photodiode. (b) Dark I-V char-acteristics of the three samples. (c) Spectral response of the samples meas-ured at zero bias. (d) Calculated responsivity of the samples.

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Tech Briefs

surface plasmon effect to enhance the op-tical field in the GeSn active region,which leads to increased absorption of in-cident photons and creates electron-holepairs that contribute to the electric cur-rent that can be detected. Specifically, theuse of a gold metal film perforated with atwo-dimensional subwavelength holearray as the plasmonic structure to be de-posited on top of the GeSn p-i-n pho-todetector was considered. Such struc-tures are capable of producing enhanced

optical fields under the illumination ofsome wavelengths residing in its surfaceplasmon resonance range. They havebeen used to improve the performance ofquantum dot infrared photodetectors(QDIPs). Increased photocurrent and de-tection wavelength selection have beendemonstrated.

The device structure of the GeSn p-i-nphotodetector used for this research isshown in Figure (a). There are a set ofthree samples, all p-i-n photodiodes that

were previously produced. Their meas-ured dark I-V characteristics, and meas-ured and simulated spectral response, areshown in Figures (b) through (d).

This work was done by Greg Sun of the University of Massachusetts for the AirForce Research Laboratory. For more infor-mation, download the Technical Sup-port Package (free white paper) atwww.aerodefensetech.com/tsp under the Electronics & Computers category.AFRL-0249

Reconfigurable Electronics and Non-Volatile Memory ResearchInvestigating ways to make non-volatile memory devices smaller, lower power, more reliable, and radiation tolerant.

Air Force Research Laboratory, Kirtland AFB, New Mexico

The purpose of this research was to in-vestigate non-volatile memory device

technologies that could be applied to re-configurable electronics applications to

provide power reduction, radiation toler-ance, smaller size, and improved reliabil-ity over existing non-volatile memory de-vices. The research encompasses: 1)

materials and device design, and 2) fabri-cation and testing of the devices. Thetypes of memory devices that were inves-tigated are divided into three categories:

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1) Ion-Conducting, Resistance Variable Memory Devices(a.k.a. memristors). These devices change resistance viathe movement of metal ions (Cu and Ag ions) through anactive device layer, upon proper application of an electricsignal. Devices were designed that showed high speed, lowvoltage/current operation, variable resistance programma-bility (through spike-timing-dependent-plasticity tests overtiming windows of ns to ms), cycling greater than 1 millioncycles, and operating temperatures of at least 150°C with-out degradation. Many of these materials were tested intwo-terminal devices, integrated with CMOS circuits, andin small cross-point arrays.

Recommendation: Based on the factors of device electricalresponse and ease of fabrication, the ion-conducting resist-ance variable memory device has the highest potential forsuccessful application to the area of reconfigurable electronicsand non-volatile memory. Based on the materials researched,this type of device also has the most flexibility in altering thedevice electrical characteristics to fit specific applications. De-vices can exhibit bi-directional resistance tuning using lowvoltage, small pulse width signals. The technology can be in-tegrated into a CMOS back-end-of-line process with no conse-quence to an existing CMOS fabrication facility.

2) Atomic or Molecular Memory Based on Zero-Field Split-ting (ZFS). This category comprises devices that define thememory state by the interaction energy of the spin-spin andspin-orbit angular moment of the electrons around an atomand the angular momentum (spin-spin and spin-orbit) ofthe nucleus. The theoretical operation of this type of deviceis based on the energy splitting produced by this interaction(in the absence of an externally applied magnetic field), re-ferred to as zero-field splitting. Materials were investigatedto try to find a suitable material that exhibited this propertyat room temperature with enough electron spin density inone of the energy states for a detectable microwave signalabsorption upon transition of an electron between energystates. Materials were investigated in bulk form, with someshowing promise for this application, as observed via elec-tron paramagnetic resonance spectroscopy. However, de-


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ZFS layout device high frequency test station equipped with a LakeShoreEMPX-HF magnetic probe station and an Agilent N5224A PNA MicrowaveNetwork Analyzer.

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posited thin films of these materialsdid not show high enough signal ab-sorption to indicate they would beviable for detection at the nanoscalein a memory device. Preliminary de-vice fabrication with these materialsalso failed to yield a functional ZFSdevice. This could be due to the elec-tron density being too small in agiven state to achieve a detectablesignal to noise ratio.

Recommendation: The ZFS deviceconcept is still high risk and theoreti-cal. One approach for exploring the vi-ability of this theory would be to inves-tigate organic molecules as potentialcandidates since organic molecules fre-quently exhibit large spin polarizationat room temperature. This increase insignal intensity due to spin polariza-tion could give rise to a detectable sig-nal within the small size of a bit.

3) Phase-Change Memory. Work inthis category included devices con-sisting of stacked chalcogenide (S-,Se- or Te-containing material) thinfilms and phase-change alloys thatare potentially capable of producingmultiple memory states.

Devices fabricated at Boise State Uni-versity were large compared to the cur-rent technology node (1 um diametervs < 20 nm). This has significant con-sequences for device operation due todevice volume dependence (for melt-ing and quenching the volume of ma-terial to change phase). In addition tothe larger two-terminal Boise State de-vices, other devices fabricated on inte-grated circuit die with feature sizes at0.5 um were tested. Phase-changestack materials on smaller-sized de-vices (40 nm) were also tested using

Micron Technology’s 300 mm wafertest process flow.

Recommendation: It is difficult tochange the resistance of a phase-change device consistently and be-tween multiple values. The operationof this type of device depends signifi-cantly on the device structure and

on the materials and fabricationprocesses. The energy required tochange the resistance of a device is sig-nificantly higher than the ion-con-ducting memory device due to theneed to heat the volume of materialpast the melting temperature. The device structures and fabrication


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Tech Briefs

Cross-section illustration of an Ion-Conducting,Resistance Variable Memory Device structure.

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Tech Briefs

Energy-Filtered TunnelTransistor: A New DeviceConcept Toward ExtremelyLow Energy ConsumptionElectronicsAltering the thermal characteristics of semiconductors can prolong battery life.

Office of Naval Research, Arlington, Virginia

Excessive heat dissipation (or power consumption) of modemintegrated circuits is an undesirable effect that imposes sub-

stantial limitations on the performance of many electronic de-vices. For example, the level of heat dissipation /power con-sumption of smart phones, tablets, and laptops is such that itprohibits a continuous and prolonged operation of these de-vices, requiring frequent recharging. Large power consumption

Device used to study energy-filtered cold electron transport at room tempera-ture: (a) The device structure. (b) Energy diagram for energy-filtered cold elec-tron transport. The quantum well is formed in the conduction band of theCr203 layer through band bending and a quantum well state serves as an ener-gy filter.

processes needed in order to have lower energy switching andconsistent device operation are much more complex, whichtranslates into being more prone to processing errors. How-ever, devices that operate with both the phase-change and anion-conducting mechanisms within the same device materialare viable.This work was done by Kristy A. Campbell of Boise State University

for the Air Force Research Laboratory. For more information,download the Technical Support Package (free white paper) atwww.aerodefensetech.com/tsp under the Electronics & Com-puters category. AFRL-0247

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STATEMENT OF OWNERSHIPTitle: Aerospace & Defense Technology 2. Publication Number: 181-20 3. Filing Date:1/4/2017 4. Issue Frequency: Feb, Apr, May, Jun, Aug, Oct, Dec 5. No. of Issues PublishedAnnually: 7 6. Annual Subscription Price: $75.00 7. Complete Mailing Address of KnownOffice of Publication (Street, City, County, State, and Zip+4) (Not printer): Tech BriefsMedia Group, 261 Fifth Avenue, Suite 1901, New York, NY 10016 8. Complete MailingAddress of Headquarters or General Business Office of Publisher (Not printer): SAEInternational, 400 Commonwealth Drive, Warrendale, PA 15096-0001 9. Full Names andComplete Mailing Addresses of Publisher, Editor, and Managing Editor. Publisher (Nameand Complete Mailing Address): Joseph T. Pramberger, 261 Fifth Avenue, Suite 1901,New York, NY 10016; Editor (Name and Complete Mailing Address): Bruce Bennett, 261Fifth Avenue, Suite 1901, New York, NY 10016; Managing Editor: None 10. Owner (If thepublication is owned by a corporation, give the name and address of the corporationimmediately followed by the names and addresses of all stockholders owning or holding1 percent or more of the total amount of stock. If not owned by a corporation, give thenames and addresses of the individual owners. If owned by a partnership or other unin-corporated firm, give its name and address as well as those of each individual owner. Ifthe publication is published by a nonprofit organization, give its name and address). FullName and Complete Mailing Address: SAE International, 400 Commonwealth Drive,Warrendale, PA 15096-0001 11. Known Bondholders, Mortgagees, and Other SecurityHolders Owning or Holding 1 Percent or More of Total Amount of Bonds, Mortgages, orOther Securities. Full Name and Complete Mailing Address: None 12. For Completion ofNonprofit Organizations Authorized to Mail at Nonprofit Rates. The purpose, function,and nonprofit status of this organization and the exempt status for federal income taxpurposes: Not applicable 13. Publication Name: Aerospace & Defense Technology 14.Issue Date for Circulation Data Below: October 2016 15. Extent and Nature ofCirculation (Average No. Copies Each Issue During Preceding 12 Months/Actual No.Copies of Single Issue Published Nearest to Filing Date): a. Total No. Copies (Net PressRun): 40,896/40,896 b. Paid and/or Requested Circulation: (1) Outside CountyPaid/Requested Mail Subscriptions (Include Advertisers’ Proof Copies/ExchangeCopies): 38,068/38,068 (2) In-County Paid/Requested Mail Subscriptions stated on PSForm 3541. 0/0 (3) Sales Through Dealers and Carriers, Street Vendors, and CounterSales (Not Mailed): 0/0 (4) Requested Copies Distributed by Other Mail ClassesThrough the USPS: 0/0 c. Total Paid and/or Requested Circulation (Sum of 15b(1),15b(2), and 15b(3): 38,068/38,068 d. Non-requested distribution (By Mail and outsidethe mail) (1) Outside County Non-requested Copies Stated on PS Form 3541:1,726/1,726 (2) In-County Nonrequested Copies Stated on PS Form 3541: 0/0 (3) Non-requested Copies Distributed Through the USPS by Other Classes of Mail: 0/0 (4) Non-requested Copies Distributed Outside the Mail: 726/726 e. Total Non-requestedDistribution (Sum of 15d (1), (2), and (3)): 2,452/2,452 f. Total Distribution (Sum of 15cand 15e): 40,520/40,520 g. Copies Not Distributed: 376/376 h. TOTAL (Sum of 15f and15g): 40,896/40,896 i. Percent Paid and/or Requested Circulation (15c ÷ f times 100):93.9%/93.9% 16. This Statement of Ownership will be printed in the February 2017 issueof this publication. 17. I certify that all information furnished on this form is true andcomplete. I understand that anyone who furnishes false or misleading information onthis form or who omits material or information requested on the form may be subject tocriminal sanctions (including fines and imprisonment) and/or civil sanctions (includingcivil penalties): Joseph T. Pramberger, Publisher.

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of electronic devices requires large energy storage in batteries, in-creasing the battery weights that soldiers carry in their missionsor the weights of remote controlled equipment such as un-manned aerial vehicles (UAVs). Therefore, technology that en-ables electronic devices to operate with extremely small energyconsumption promises a broad range of commercial, militaryand space applications.

The root cause of heat dissipation of current metal-oxide-semiconductor field effect transistors (MOSFETs) is the ther-mal excitation of electrons that obeys thermodynamics, i.e.,the Fenni-Dirac energy distribution of electrons. The ther-mally excited electrons at the tail of the Fenni-Dirac distribu-tion can overcome the energy barrier set in the OFF state ofthe MOSFETs. This causes substantial OFF state leakage cur-rents even after the gate voltage is reduced below the thresh-old voltage, resulting in large heat dissipation or energy con-sumption for integrated circuits. The challenge for this largeheat dissipation is that its root cause is an intrinsic phenome-non of thermodynamics (Fermi-Dirac distribution) that can-not be directly manipulated.

Previous studies have demonstrated that it is possible to indi-rectly suppress electron thermal excitations by utilizing discreteenergy levels present in quantum dots (QDs). Here the electronsare made to pass through the QD energy level and this discretelevel serves as an energy filter, allowing only those electronswhose energies match the discrete QD level to pass through. Ithas been experimentally demonstrated that this energy filteringcan lower the effective temperature of electrons. Until now, theenergy filtering has been demonstrated only when the entiresystem is cooled to very low temperatures, typically below 1Kelvin. For practical applications, however, the energy filteringand effective suppression of electron thermal excitations willneed to function at room temperature.

This project aimed to investigate a new method that can effec-tively suppress electron thermal excitations at room temperatureand to fabricate device structures in which energy-suppressedcold electrons are transported through device components atroom temperature. An important feature of this approach is thatthe quantum states for the energy filtering are formed in a quan-tum well of a very thin (-2 nm) layer, so that their energy levelspacing is made to be much larger than the room temperaturethermal energy, enabling the electron energy filtering and cold-electron transport to function even at room temperature. Fabri-cation of device structures that enable cold-electron transport atroom temperature is demonstrated. A comprehensive micro-scopic model of the cold electron transport is provided alongwith numerical calculations. Application of the energy-filteredcold electron transport to single-electron transistors is demon-strated. Device architecture for a large-scale fabrication of en-ergy-filtered tunnel transistors for energy-efficient electronics ispresented. Process and material developments for this transistorarchitecture are presented.

This work was done by Seong Jin Koh of The University of Texas atArlington for the Office of Naval Research. For more information,download the Technical Support Package (free white paper) atwww.aerodefensetech.com/tsp under the Electronics & Com-puters category. NRL-0069

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Spring-Loaded ConnectorsMill-Max (Oyster Bay, NY) has added a

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Rechargeable Coin Cell Batteries RJD Series batteries from Illinois Ca-

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Ad IndexFor free product literature, enter advertisers’ reader service num-bers at www.techbriefs.com/rs, or visit the Web site beneath theirad in this issue.

Reader ServiceCompany Number Page

Accurate Screw Machine . . . . . . . . . . . . . .820 . . . . . . . . . . . . . 2

Anritsu Products . . . . . . . . . . . . . . . . . . . . 857 . . . . . . . . . . . . 13

Atlantic Spring . . . . . . . . . . . . . . . . . . . . . . 840 . . . . . . . . . . . .37

Aurora Bearing Co. . . . . . . . . . . . . . . . . . . 838 . . . . . . . . . . . .36

C.R. Onsrud, Inc. . . . . . . . . . . . . . . . . . . . . 830 . . . . . . . . . . . .24

Coilcraft CPS . . . . . . . . . . . . . . . . . . . . . . . . 823 . . . . . . . . . . . . . 7

COMSOL, Inc. . . . . . . . . . . . . . . . . . . 847, 854 . . . . 42, COV IV

Concept Group, Inc. . . . . . . . . . . . . . . . . . .828 . . . . . . . . . . . . 15

Cornell Dubilier . . . . . . . . . . . . . . . . . . . . . .824 . . . . . . . . . . . . .9

CST of America, Inc . . . . . . . . . . . . . . . . . . 853 . . . . . . . . COV III

Del-Tron Precision, Inc. . . . . . . . . . . . . . . .848 . . . . . . . . . . . .42

Gage Bilt Inc. . . . . . . . . . . . . . . . . . . . . . . . 836 . . . . . . . . . . . .34

Hawthorne Rubber Mfg. Corp. . . . . . . . . 844 . . . . . . . . . . . .39

Helical Products Co., Inc . . . . . . . . . . . . . . 833 . . . . . . . . . . . .30

Hunter Products, Inc. . . . . . . . . . . . . . . . . 842 . . . . . . . . . . . .38

Imagineering, Inc. . . . . . . . . . . . . . . . . . . . .819 . . . . . . . . . . . . . 1

Master Bond Inc. . . . . . . . . . . . . . . . 839, 849 . . . . . . . . 36, 42

Mini-Systems, Inc. . . . . . . . . . . . . . . . . . . . 834 . . . . . . . . . . . . 31

New England Wire Technologies . . . . . . . 837 . . . . . . . . . . . .35

Nokomis, Inc. . . . . . . . . . . . . . . . . . . . . . . . 843 . . . . . . . . . . . .39

Omnetics Connector Corporation . . . . . . 835 . . . . . . . . . . . .32

OSRAM Sylvania . . . . . . . . . . . . . . . . . . . . . 826 . . . . . . . . . . . . .11

OTEK Corporation . . . . . . . . . . . . . . . . . . . 850 . . . . . . . . . . . .42

Photon Engineering . . . . . . . . . . . . . . . . . . 832 . . . . . . . . . . . .27

Proto Labs, Inc. . . . . . . . . . . . . . . . . . . . . . 822 . . . . . . . . . . . . .5

S. Himmelstein And Company . . . . . . . . . .851 . . . . . . . . . . . .42

S.I. Tech . . . . . . . . . . . . . . . . . . . . . . . . . . . . 852 . . . . . . . . . . . .42

SME AeroDef 2017 . . . . . . . . . . . . . . . . . . . 846 . . . . . . . . . . . . 41

Southern Gear & Machine, Inc. . . . . . . . . 841 . . . . . . . . . . . . .8

Space Tech Expo USA . . . . . . . . . . . . . . . . 827 . . . . . . . . . . . .33

Specialty Coating Systems, Inc. . . . . . . . 829 . . . . . . . . . . . .23

State of the Art, Inc. . . . . . . . . . . . . . . . . . 825 . . . . . . . . . . . . 10

UCSB Extension . . . . . . . . . . . . . . . . . . . . . 845 . . . . . . . . . . . 40

Verisurf Software, Inc. . . . . . . . . . . . . . . . . 831 . . . . . . . . . . . .26

VPT, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 821 . . . . . . . . . . . . . 3

W.L. Gore & Associates . . . . . . . . . . . . . . . .818 . . . . . . . . COV II

Publisher . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Joseph T. Pramberger

Editorial Director – TBMG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Linda L. Bell

Editorial Director – SAE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .William Visnic

Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bruce A. Bennett

Associate Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Billy Hurley

Managing Editor, Tech Briefs TV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Kendra Smith

Associate Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Ryan Gehm

Production Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adam Santiago

Assistant Production Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Kevin Coltrinari

Creative Director . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lois Erlacher

Senior Designer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ayinde Frederick

Global Field Sales Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Marcie L. Hineman

Marketing Director . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Debora Rothwell

Marketing Communications Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Monica Bond

Digital Marketing Coordinator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Kaitlyn Sommer

Audience Development Director . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Marilyn Samuelsen

Audience Development Coordinator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stacey Nelson

Subscription Changes/Cancellations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [email protected]

TECH BRIEFS MEDIA GROUP, AN SAE INTERNATIONAL COMPANY261 Fifth Avenue, Suite 1901, New York, NY 10016(212) 490-3999 FAX (646) 829-0800

Chief Executive Officer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Domenic A. Mucchetti

Executive Vice-President . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Luke Schnirring

Technology Director . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oliver Rockwell

Systems Administrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vlad Gladoun

Web Developer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Karina Carter

Digital Media Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peter Bonavita

Digital Media Assistant Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Anel Guerrero

Digital Media Assistants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peter Weiland, Howard Ng, Md Jaliluzzaman

Digital Media Audience Coordinator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Jamil Barrett

Credit/Collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Felecia Lahey

Accounting/Human Resources Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Sylvia Bonilla

Office Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Alfredo Vasquez

Receptionist . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Elizabeth Brache-Torres

ADVERTISING ACCOUNT EXECUTIVES

MA, NH, ME, VT, RI, Eastern Canada . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ed Marecki

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tatiana Marshall

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(401) 351-0274

CT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Stan Greenfield

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (203) 938-2418

NJ, PA, DE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . John Murray

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (973) 409-4685

Southeast, TX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ray Tompkins

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (281) 313-1004

NY, OH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ryan Beckman

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (973) 409-4687

MI, IN, WI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Chris Kennedy

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (847) 498-4520 ext. 3008

MN, ND, SD, IL, KY, MO, KS, IA, NE, Central Canada . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bob Casey

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (847) 223-5225

Northwest, N. Calif., Western Canada . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Craig Pitcher

(408) 778-0300

CO, UT, MT, WY, ID, NM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tim Powers

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(973) 409-4762

S. Calif. , AZ, NV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tom Boris

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (949) 715-7779

Europe — Central & Eastern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Sven Anacker

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49-202-27169-11

Joseph Heeg

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49-621-841-5702

Europe — Western . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chris Shaw

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44-1270-522130

Integrated Media Consultants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Patrick Harvey

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (973) 409-4686

Angelo Danza

(973) 874-0271

Scott Williams

(973) 545-2464

Rick Rosenberg

(973) 545-2565

Todd Holtz

(973) 545-2566

Reprints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Rhonda Brown

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (866) 879-9144, x194

Aerospace & Defense Technology, ISSN 2472-2081, USPS 018-120, copyright © 2017 in U.S. ispublished in February, April, May, June, August, October, and December (7 issues) byTech Briefs Media Group, an SAE International Company, 261 Fifth Avenue, Suite 1901,New York, NY 10016. The copyright information does not include the (U.S. rights to) indi-vidual tech briefs that are supplied by NASA. Editorial, sales, production, and circulationoffices at 261 Fifth Avenue, Suite 1901, New York, NY 10016. Subscription is free to quali-fied subscribers and Subscriptions for non-qualified subscribers in the U.S. and PuertoRico, $75.00 for 1 year. Digital Edition: $24.00 for 1 year. Single copies: $6.25. Foreign sub-scriptions, one-year U.S. Funds: $195.00. Remit by check, draft, postal, express orders orVISA, MasterCard, and American Express. Other remittances at sender’s risk. Address allcommunications for subscriptions or circulation to NASA Tech Briefs, 261 Fifth Avenue,Suite 1901, New York, NY 10016. Periodicals postage paid at New York, NY and at addition-al mailing offices.

POSTMASTER: Send address changes and cancellations to NASA Tech Briefs, P.O. Box47857, Plymouth, MN 55447.

February 2017, Volume 2, Number 1

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mailto:[email protected]













































Mailto:[email protected]


Application Briefs

Upgraded Electronic Flight Bag System

Astronautics Corporation of AmericaMilwaukee, WI414-449-4000www.astronautics.com

Astronautics Corporation of America has been selected toprovide an improved and upgraded electronic flight bag

(EFB) system on all fielded and future production Boeing 787Dreamliner airplanes. The new BlockPoint Five (BP5) EFB will be a form/fitreplacement for Astronautics’ currentBoeing EFB. The BP5 will give Boeing787 operators additional functionalityand will be compatible for use through-out all phases of airplane operations.

The enhanced BP5 EFB features animproved central processing unit thatwill enable the storage of more infor-mation, including detailed charts,maps, documents, and databases, al-lowing operators to enhance airplane performance and im-prove airplane operational efficiency. The BP5’s modular de-sign allows for future upgrades without line-replaceable unit(LRU) level redesign, which will save operators time and

maintenance costs. The new EFB will also require no changesto wiring, power, cooling requirements, or the avionics rack.

The EFB system provides flight crews’ displays with user in-terfaces so they can access airplane data through the systems’functional capabilities. The EFB’s Document Browser, avail-able on portable devices, simplifies operations by eliminatingpaper documents from the flight deck, making documentviewing and management more efficient and cost effective.

The EFB Document Browser softwareapplication gives pilots a quick and ef-ficient tool for pinpointing docu-ments and information preciselywhen they are needed, all in an elec-tronic format.

The current BP4 EFB has been stan-dard fit on the 787 since its initialentry into service in 2009. Astronau-tics and Boeing introduced the firstEFB to the air transport marketplace15 years ago on the 777 airplane. De-

pending on model and configuration, the Boeing 787 Dream-liner can accommodate 242 – 330 passengers, boasts a rangeof 6,430 to 7,635 miles, and travels at Mach 0.85.For Free Info Visit http://info.hotims.com/65848-570

Helicopter Vibration Control System

LORD CorporationCary, NC877 ASK LORD (275 5673).www.lord.com

LORD Corporation recently announced product qualificationfor their Improved Vibration Control System (IVCS) for the

Boeing H-47 Chinook helicopter. Under contract with Boeingsince Sept. 2013, LORD has now completed all program mile-stones and received final qualification approval for the state-of-the-art patented system that controls steady state and transientvibration on the twin-engine tandem rotor heavy-lift helicopter.

The multiyear qualification effort culminated in late 2015with installation and final flight evaluation of the production-ready IVCS. IVCS is the H-47 program name for LORD Corpo-ration’s proven Active Vibration Control System. The U.S. ArmyAviation Engineering Directorate recently completed the finalqualification approval, and product deliveries for incorporationinto the Boeing CH-47F production line began in mid-2016.

The IVCS technology uses accelerometers that measure air-craft vibration levels. A centralized computer processes thesesignals through a software algorithm that interprets the dataand sends commands to force generators located under thepilot seats. These force generators create “anti-vibration” thatstops the progression of vibration due to the main rotor, andcreates a more comfortable vibration environment for the air-

crew. The LORD product is a direct/drop-in replacement forthe previously used passive tuned vibration absorber.

LORD secured the contract through a joint effort of LORD en-gineering, the U.S. Army Cargo Helicopter Program Office, andBoeing Defense, Space & Security. In addition to providing thesystem hardware, LORD provided the manpower and resourcesto flight-test the system to demonstrate performance results.

According to LORD Corporation’s Jim Nietupski, CustomerExecutive, the pursuit of this initiative from LORD began in2004 with the idea of replacing heavy passive tuned vibrationabsorbers under the pilot’s seat with a new technology thatwould save weight. After a flight demonstration of the prod-uct, which began in 2008 with the Mississippi Army NationalGuard, and after several years of continued testing with theassistance of the U.S. Army Special Operations Aviation Regi-ment, the Army decided to pursue a program and selectedBoeing to serve as the integrator of this technology.

Throughout its development, the Chinook aircraft hasevolved with new technology, gained new capability and hasincreased in weight. This IVCS technology offers a triple-digitweight savings benefit, which creates a performance buy-backfor H-47 Operators. LORD Corporation’s system will now bepart of the baseline configuration moving forward, followedby opportunities for retrofit of Special Operation’s MH-47G,fielded CH-47Fs, and Foreign Military Sales’ H-47 aircraft.


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MULTIPHYSICS FOR EVERYONE

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© Copyright 2016–2017 COMSOL. COMSOL, the COMSOL logo, COMSOL Multiphysics, Capture the Concept, COMSOL Desktop, COMSOL Server, LiveLink, and Simulation for Everyone are either registered trademarks or trademarks of COMSOL AB. All other trademarks are the property of their respective owners, and COMSOL AB and its subsidiaries and products are not affi liated with, endorsed by, sponsored by, or supported by those trademark owners. For a list of such trademark owners, see www.comsol.com/trademarks.

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APPLICATION

Corrugated horn antenna


Cov ToC + – ➭

➮

AIntro



february 2017 …assets.techbriefs.com/eml/2017/adt_digital/adt0217.pdf28 the ins and outs of...

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