TEQIP II Sponsored

One week STTP

“Designing an Embedded system

(26th –

Electronics

BVM Engineering College

(Managed

Vallabh Vidyanagar

A report

On

TEQIP II Sponsored

One week STTP

On

“Designing an Embedded systems and Internet

Things"

During

–30th December, 2016)

Organized by

Electronics Engineering Department

BVM Engineering College (An Autonomous Institution)

Managed by Charutar Vidya Mandal)

Vallabh Vidyanagar-388120

nternet of

Institution)

About CVM

One of the greatest sons of India Late Sardar Vallabhbhai Patel inspired Shri. Bhaikaka and

Shri. Bhikabhai Saheb for rural resurgence of post in dependent India through education, and

thus Charutar Vidya Mandal was established in the year 1945 as a charitable trust with a

prime objective of rural development through education to bring about the social awakening,

social up liftment and enrichment. Over the subsequent years, Dr. H. M. Patel consolidated

the efforts put in by the founders. In 1994 Dr. C L Patel took over the reigns of CVM as the

Chairman, and through his dynamic leadership, missionary zeal and visionary outlook he not

only rejuvenated the ongoing education system but added a modern education campus at New

Vallabh Vidyanagar. CVM is one of the major education trust of our country catering quality

education to all sections of the society.

About BVM

BVM is a Premier Grant-in-aid Autonomous Institution of Charutar Vidya Mandal (CVM)

founded in 1948. Motto of BVM: Work is Worship. BVM is the first degree engineering

college of the Gujarat state. More than 18000 engineers have graduated from this college.

BVM offers B.E., M.E./M. Tech. and Ph.D. degree Program. The College is affiliated to the

Gujarat Technological University & is situated at Vallabh Vidyanagar, which is about 4 km

from the Anand town. The most striking features of BVM is the dedicated and experienced

faculty base.BVM has been granted academic autonomy by the UGC from A.Y: 2015-16.

About Electronics Department

The Departments of Electronics Engineering was established in 1984 at BVM. Dedicated

faculty members, meritorious students, well equipped laboratories, and skilled support staff,

are major strengths of the department.

Objectives of the workshop:

Embedded Systems are extensively used for designing of electronic systems because of its

low cost and portability. Designing embedded systems with Internet of Things is to optimize

the systems in terms of data storage and internet connectivity. The objective of the program is

to provide an opportunity to faculty members for updating the latest emerging developments

in designing embedded systems and Internet of Things. This workshop is in tune with the

above objectives for the discipline of Computer, Electrical, Electronics and Structural

Engineering Dept.

Registration:

The Registration of the workshop began on 26th

December, 09:00 am. Total 38 participants of

various institutes within Gujarat are registered for this STTP.

Inaugural function:

The STTP Inaugural Function was held on 26th

December, 2016 at 10:00 am onwards.

The STTP was inaugurated by, Dr. Shirish Kulkarni Honourable Vice Chancellor, Sardar

Patel University, Vallabh Vidya Nagar, was the Chief Guest of the function Dr. Nikhil

Zaveri Honourable Group Director, CVM was the Guest of Honour of the function, Dr.

Indrajit Patel, Principal BVM College, Dr. D. G. Thakore (TEQIP-II Coordinator) and Dr.

T. D. Pawar, Head, Electronics Engineering Department, & Dr. D. M. Patel, Dr. J. M.

Rathod were the program coordinator of Electronics Engineering Department.

Program Schedule:

The focus of this short term course is on learning the designing concepts of embedded

systems with various embedded controllers. The training program is designed to give

exposure on various development tools for embedded controller such as Keil, Xilink Vivado

for FPGA based design, ARM development tool, Embedded application based on Raspberry

Pi embedded development board.

(26th

December- 30th

December 2016)

Day 1 : 26/12/2016 – Monday

09.00 A.M. -

10.00 A.M.

10.00 A.M. –

10:30 A.M.

11:00 A.M. –

01:00 P.M. 1:0 pm

– 2:00

pm

2.00 P.M. - 3.30

P.M. 3.30

P.M. –

3:45

P.M.

3:45P.M. –

5:15P.M.

Registration

& Break fast

Inaugural

Function

( BVM

Auditorium )

Dr. Jivani,

Saurashrta

University,

Embedded

Systems and

IoT

Lunch

Break

Dr. Jivani,

Saurashrta

University,

Development

design of smart

Systems using

IoT

Tea

break

e-Itra, e-Infochips,

Ahmedabad,

Verilog Synthesis

& IP mapping on

FPGA,

Day 2 : 27/12/2016 – Tuesday

09.30A.M.

– 10.00

A.M.

10.00 A.M. –

12.00 P.M.

12.00 P.M. –

1:00 P.M. 1:00

P.M.

–

2:00

P.M.

2:00 P.M.– 3:30

P.M.

3.30

P.M. –

3:45

P.M.

3:45P.M. –

5:15P.M.

Break fast Dr. Bhaskar

Thakkar, ARM

Architecture

and

Programming

Dr. N. M. Patel,

BVM, RTOS in

Embedded

System Design

Lunch

Break

Prof. Jignesh

Patoliya,

IoT Architecture

& devices

Tea

break

Prof. Jignesh

Patoliya

Interactive

Computing with

NodeMCU

Day 3 : 28/12/2016 –Wednesday

09.30A.M.

– 10.00

A.M.

10.00 A.M. –

12.00 P.M.

12.00 P.M. –

1:00 P.M. 1:00

P.M. –

2:00

P.M.

2:00 P.M.–

3:15 P.M.

3.30

P.M. –

3:45

P.M.

3:45P.M. –

5:15P.M.

Break fast Prof. Jignesh

Patoliya

IoT

Architecture

& devices

Prof. Jignesh

Patoliya

Interactive

Computing with

NodeMCU

Lunch

Break Mr. Ashutosh

Bhatt

IoT Protocols

Tea

break

Mr. Ashutosh Bhatt

Data Logging using

NodeMCU and

Cloud Services

Day 5 : 30/12/2016 – Friday

09.30A.M.

– 10.00

10.00 A.M.

– 11.300

12.00 P.M. –

1:00 P.M. 1:00

P.M. –

2:00

2:00 P.M.– 3:00

P.M.

3:00

P.M.–

3:15

3.30 P.M. -

onwards

Day 4 : 29/12/2016 – Thursday

09.30A.M.

– 10.00

A.M.

10.00 A.M

– 12.00 P.M.

12.00 P.M. –

1:00 P.M. 1:00

P.M.

– 2:00

P.M.

2:00 PM to

3:00PM

3:00

P.M.–

3:15

P.M.

3.15 P.M. – 5:15

P.M.

Break fast Prof. Jignesh

Patoliya

Experimenting

with Sensors &

Actuators

Prof. Jignesh

Patoliya

Implementation

of NoT usng

NodeMCU

Lunch

Break Mr. Hardik Patel

Getting started

with Linkit

smart 7688 on

Openwrt OS

Tea

break

Mr. Hardik Patel

Project

demonstration

using smart

76688 on

Openwrt OS

A.M. P.M. P.M. P.M.

Break fast Dr. Y. P.

Kosta

Embedded

Systems

and Internet

of Things

Dr. Hiren

Mewada

Vivado to

build an

embedded

system

Lunch

Break Dr. Hiren Mewada,

(Charotar Institute )

Adding IP cores to

the system

Tea

break

Valedictory

Function

Glimpses of STTP:

All the participants had keenly attended all the sessions of the STTP and given very positive

response from the delivery of the relevant topics by the expert.

Group Photograph:

The group photograph was taken with the invited guest and all the participants and

STTP coordinators.

Valedictory:

The valedictory function of STTP on “Designing an Embedded system and

Internet of Things" was scheduled on 30th

December, 2016, 4:00 am onwards. Dr. K. N.

Mistry, Principal, GIDC Engineering College, Navsari was the chief guest at the function, Dr.

D. G. Thakore (TEQIP-II Coordinator) and Head, Computer Engineering Department, Dr. T.

D. Pawar, Head, Electronics, Dr. D. M. Patel & Dr. J. M. Rathod, program coordinators were

present on the occasion. Dr. D. G. Thakore (TEQIP-II Coordinator) and Head, Computer

Engineering Department encouraged the participants to availed benefit taken from such

recent topic of the STTP and enhance their knowledge in their respective fields, which can

lead to a research based environment. Dr. M. S. Holia, STTP coordinator of Electronics

Engineering Department gave the brief summary of the program conducted. Prof. Parul

Panchal, coordinator expressed a vote of thanks. Valuable feedbacks were provided by the

participants and certificate distribution was done by the dignitaries on the dais. Prof. K. D.

Patel had deliver master of ceremony of the valedictory program. The certificates were

distributed to all the program coordinators and participants at the end of the program. The

glimpses of the valedictory program are as below.

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