fip protocole jcop short4 - cern

1JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH)

WorldFIP CERN site :http://wwwlhc.cern.ch/IAS/Frames/WS_Frames.html

WorldFIP Organization site :

http://www.worldfip.org

WelcomeWelcome


JCOP Meeting (11/07/2001)Overview

u Conclusions

uu WorldFIP Protocol

uu WorldFIP Technology

uu TCP/IP Communication

uu Current/Future Developments


DWF DWF

DWF

DWF

DWF

M

M M

M

M

M

M M

WorldFIP (1Mb/s or 2.5 Mb/s)

Control and / orsupervision

WorldFIP31.25 kb/s or 1 Mb/s

process systems

WorldFIP1 Mb/s

manufacturing systems

Programming

WorldFIP1 Mb/s or 2.5 Mb/s

drive systems

Control Level

Process Level

Supervision Level

One Bus for 3 Levels of Control


Data Types

ð Cyclic variables : always transmitted, for time-critical closed loopcontrol

ð Event variables : transmitted on demand or change of state,

eg for alarms or display

ðMessages : non-time critical, eg for maintenance, configuration

and diagnostics

Think of the WorldFIP bus as a “data pipe”


3 Data TypesIn the Same Pipe

We need message transfers for : Configuration & Maintenance.

Events transfers for :Alarms.

And Real Time transfers for :Control & Monitoring


Various Applications


u Peer-to-peer communication

Not master-slave

u Access controlled by Bus Arbiter (BA) « link active

scheduler »

Multiple redundant bus arbiters possible

u Producer-consumer model of communication

One-to-oneOne-to-manyOne-to-all (Broadcast)

PEER to PEER Concept


Producer-Consumer Model

u At any one time, one node produces data:

WorldFIP...simpler system designs

Any or all of the other nodes may consume the data

P

C

C C

ð Cyclic data is guaranteed to be on time


WorldFIP fieldbus

PRODUCER CONSUMER

CONSUMERCONSUMER

Equipment 1 Equipment 2 Equipment 3

Equipment 5 Equipment 4

BUS ARBITRATOR( DISTRIBUTOR )

Network Scheduler

BA TABLE(scanning table)

u Each Application Variable is produced by one and only one PRODUCER and can beconsumed by one or several CONSUMER(s)

The method of communication


u Transmission of the QUESTION associated to an Application Variable and recognition by the producer and consumers

u Production and Comsumption of the ANSWER associated with the previous Question

Question

Equipment 3 Equipment 4Equipment 2Equipment 1

Bus Arbitrator

Equipment 5

P C C C

BA

Answer

Equipment 3 Equipment 4Equipment 2

Equipment 1

Bus Arbitrator

Equipment 5PC C C

BA

The method ofcommunication


ID_DAT RP_DAT

Question Answer

1

2

3

an elementary WorldFIP transaction

Can you send on the network the value ofthe information «temperature» ?

We wait for the answer

Here is the value of the information «temperature».

TR

Elementary WorldFIP Transaction


SOF Identifier CRC EOFID_DAT

FramesPeriodic Variable Transfer

+ DATA BASE OBJECT IDENTIFIER

+ BUFFER CONTENTS FRAME

u Frames = WorldFIP Variable

2 bytes 1 byte 2 bytes 2 bytes 1 byte

SOF RP_DAT Buffer Contents EOF

1 to 128 BYTES

CRC

2 bytes 1 byte 2 bytes 1 byte


ID_DAT RP_DAT

Question Answer

WorldFIP transaction

TR

u TR : Turnaround time ( When the producer answer to the request )

ID_DAT

Question

WorldFIP transaction

TSilence

u TSilence : Silence time ( When there is no answer from the producer )

next Question

ID_DAT

Turnaround & Silence Time


The equipment with the smallest station address and with the smallest priotiy will be the active BA. The others will be potential BAs

WorldFIP fieldbus

PRODUCERCONSUMER

Equipment 1

Equipment 2 Equipment 3

Equipement 5

CONSUMER

Equipment 4

(BA)- priority 0 -

(BA)- priority 2 -

CONSUMER

station address

(BA)- priority 1 -

u on a WorldFIP network , you can have one or several Bus Arbitrator ...

The method ofcommunication


DeadBand

PeriodicVariables

V1

V2

V3

Synchro Start(Every 20 mS)

WorldFIP Cycle20ms Macrocyle

IT Message

M1

M2

M3

Aperiodic Variables

E1

E2

20 ms


WorldFIP CycleA Macrocyle with 4 elemantary cycles

SP

T

S

S

S

P

0

5 mS

10 mS

15 mS

Periodic Traffic

Aperiodic Traffic

u Variable S : Every 5msSet Courant (array of Integers)

u Variable P : Every 10msPressure Value (array of Integers)

u Variable T : Every 20ms Temperature Value (array of Integers)

u Application with 3 process Variables


u The BA table (scanning table)

APERIODIC WINDOWs

for VARIABLES

S SSS SS SSS

5 ms

P P P P P

10 ms

T T T

20 ms

PERIODIC TRAFFIC

APERIODIC WINDOWs

for MESSAGESor STUFFING

or STUFFING

ELEMENTARY CYCLE

Elementary CycleSpacial Representation

T(ms)

T.e.c.(ms)


APERIODIC WINDOWs

for VARIABLES

S SSS SS SSS

5 ms

P P P P P

10 ms

T T T

20 ms

PERIODIC TRAFFIC

APERIODIC WINDOWs

for MESSAGESor STUFFING

or STUFFING

MACRO CYCLE

Macro CycleSpacial Representation


Physical LayerElectrical Encoding & Frame Format

u Manchester biphase coding

u WorldFIP Frame format (IEC 1158-2)

T/2- T/2

" Logical 1 "

- T/2T/2

" Logical 0 "

- T/2

" N "

T/2

+

- T/2 T/2

" N "-

1 0 1 0 1 0 1 0 V+ V-1 1 0 V- V+ 0 V+ V-1 V+ V- 1 0 1

CAD

PRE FSD FED


Physical LayerMain characteristics

u Maximum length with a copper line

@ 31.25 kbps : 5 km - 20km@ 1 Mbps : 1km - 4 km@ 2.5 Mbps : 500 m - 1.5 km@ 5 Mbps : 300 m - 700m@ 25 Mbps : 80 m - 200m

u Maximum length with a fiber optic

@ 31.25 kbps,1 Mbps, 2.5 Mbps, 5 Mbps, 25 Mbps : 40 km


Physical LayerBus Topology

u ELECTRICAL MEDIUM

L max. = 1 kmL max. = 4 km

R

• •

max. 32 Subscribers

Up to 256 Subscribers

R R

S S • •S S • •S S • •S S

u OPTICAL MEDIUM

S : SubscriberR : RepeaterA.S. : Active Star

L max. = 1 km L max. = 1,6 km

L max. = 7 km

A.S.

SUp to 256 Subscribers

A.S.A.S. SS

S

S

S


Physical LayerBus Topology With Medium Redundancy

S S

SSS

S S

A.S. R

R

R

R

Copper trunk Copper trunk

Optical segment

Optical trunks

Copper subscribers

Optical subscribers

Copper subscribers


READ/WRITE OF THE CONSUMED/PRODUCED VARIABLES

u ELABORATION OF TIME QUALIFIERS (Critical Time flags)

+ PROMPTNESS

+ FRESHNESS

u GENERATION OF SYNCHRONISATION EVENTS

ò TRANSMISSION

ò RECEPTION

Application LayerPeriodic Functionalities


ò Implements services from:Application, Data Link andPhysical layers

ò Supports Bus Arbitrator andSubscriber services

ò Up to 4000 Identifiers

ò Speeds : 31.25kb/s, 1Mb/s, 2.5Mb/s,5Mb/s & 25Mb/s

ò Compliant with the standards :EN50170-3 & IEC-1158-2

VLSI9348BS VY06482-2 FULLFIP2 WorldFIP

452531

MA[0]BUSYEOC

DTACKnIRQnVSS

UA[2]UA[1]

UA[0]VSSUDAT[7]

UDAT[6]UDAT[5]

UDAT[4]UDAT[3]UDAT[2]

UDAT[1]UDAT[0]

reserved (old DSn)CSnRWn

PA[19]PA[18]PA[17]

PA[16]PAD[15]PAD[14]

PAD[13]PAD[12]

PAD[11]PAD[10]PAD[9]

VDDVDD

PAD[8]VSSVSS

BRQnBGNTn

PAD[7]PAD[6]PAD[5]

ALE

RD

n

WR

nR

ES

ET

n

EM

An

RT

SK

MA

[8]

MA

[7]

MA

[6]

VS

Sre

serv

ed

TS

Tn

[2]

VD

DV

DD

TS

Tn

[1]

TS

Tn

[0]

MA

[5]

MA

[4]

MA

[3]

MA

[2]

MA

[1]

PA

D[4

]P

AD

[3]

PA

D[2

]P

AD

[1]

PA

D[0

]

TE

N1

TX

DT

EN

2

RT

S

CT

ST

XE

R1

TX

ER

2

VD

DT

XC

K

VD

DC

KIN

MC

K

VS

SR

XD

CD

nE

XT

CK

WorldFIP technology FULLFIP2 - Communication Controller -


WorldFIP technologyFULLFIP2 - Chip

ò FULLFIP2 Architecture (mono-medium)

Ext

Ck

R/Wn

MA[0]BUSYEOCDTACKnIRQnVSSUA[2]UA[1]UA[0]VSSUDAT[7]UDAT[6]UDAT[5]UDAT[4]UDAT[3]UDAT[2]UDAT[1]UDAT[0]DSn

CSn

MA

[1]

ALE

Rd

n

Wrn

RE

SE

Tn

EM

An

RT

sk

MA

[8]

MA

[7]

MA

[6]

VS

S

TSTC

KT

ST

n[2]

VD

DV

DD

TS

Tn[

1]T

ST

n[0]

MA

[5]

MA

[4]

MA

[3]

MA

[2]

PA

D[4

]P

AD

[3]

PA

D[2

]P

AD

[1]

PA

D[0

]

TxE

n1 TxD

TxE

n2

RT

S

CT

ST

xEr1

TxE

r2V

DD

TxC

k

VD

D

CK

inM

Ck

VS

SR

xD

CD

n

PA[19]PA[18]PA[17]PA[16]

PAD[15]PAD[14]PAD[13]PAD[12]PAD[11]PAD[10]

PAD[9]VDDVDD

PAD[8]VSSVSS

BRqnBGtn

PAD[7]PAD[6]

VLSI

9348BS 453562

VY06482-2

FULLFIP2

WORLDFIP

PAD[5]

Micro

ProcesseurROM RAM E/S

RAM

privéeFULLFIP2

FIELDRIVE

FIELDTR

Bus Système

WorldFIP Bus


WorldFIP technology FULLFIP2 - Network Control Chip

ò FULLFIP2 with a bi-medium architecture

WorldFIP Bus 2

A0

A1

WDMn

D0

D1

D2

D3

D4

D5

CDn

n.c.

PA

D0

TEN

1

CS

VM

RD

VM

n

GN

D

GN

D

CLK

2

TX

ER

2

WD

2n

CD

2n

RA

Z2n

RD

n

WR

n

CS

n

RE

SE

Tn

CLK

1

VD

D

VD

D

CD

1n

WD

1n

TX

ER

1

RA

Z1n

n.c.

Q0

Q1

SCD1

SCD2

CLR1

CLR2

VALTEN1

VALTEN2

WDGn

TEST

FIELDUAL

MHSMHS

MCSL-2KFBV-9

MicroProcesseur

ROM RAM E/S

RAMprivée FULLFIP2

FIELDRIVE

FIELDTR

Bus Système

FIELDRIVE

FIELDTR

FIELDUAL

WorldFIP Bus 1


ð Solutionü Transmission on both mediums

ü Reception selected from the first and the best one

ð Transmission error management

ü Stop transmission upon a medium failure

ü No full stop transmission on both mediums

ð Reception error managementü Error statistics elaboration

ü Disabling medium with error

ð Fault detectionü Selective transmission by BA

ü Verify transmission using loop-back mechanism

MicroProcesseur

ROM RAM E/S

RAMprivée

FULLFIP2

FIELDRIVE

FIELDTR

Bus Système

FIELDRIVE

FIELDTR

FIELDUAL

WorldFIP Bus 1WorldFIP Bus 2

WorldFIP technology FIP Medium Redundancy


ð PLCC 44

ð Automatic selection of the receptionchannel

ð Providing of the selected receptionchannel number

ð Disabling of one or both channelsunder the control of themicroprocessor

ð Providing of channels states

WorldFIP technology FIELDUAL chip - Medium Redundancy Control

A0

A1

WDMn

D0

D1

D2

D3

D4

D5

CDn

n.c.

PA

D0

TEN

1

CS

VM

RD

VM

n GN

D

GN

D

CLK

2

TX

ER

2

WD

2n

CD

2n

RA

Z2n

RD

n

WR

n

CS

n

RE

SE

Tn

CLK

1

VD

D

VD

D

CD

1n

WD

1n

TX

ER

1

RA

Z1n

n.c.

Q0

Q1

SCD1

SCD2

CLR1

CLR2

VALTEN1

VALTEN2

WDGn

TEST

FIELDUAL

MHSMHS

MCSL-2KFBV-9


ò ASIC mixing analogue and digitaltechnologies

ò PLCC28 packaging

ò Compliant with EN50170-3 and IEC 1158-2standards:

+ 3 speeds selected with external passiveelements : 31.25 Kb/s, 1Mb/s, 2.5 Mb/s

+ Shielded twisted pair

+ Voltage-mode coupling

ò Supply voltage : 5V

ò Temperature range: - 40°C to + 85°C

DN D

DH

DL

RS

EN

S

DLN

DH

N

19

20

21

22

23

24

25 VEED

RXA

FLIN

FLOUT

VEEA

PRERXIN

RXIN

TS

0

TS

1

TX

D

CK

ER

TXC

K

TX

ER

RX

D

5

6

7

8

9

10

11

12 13

14 15 16 17

18

28 27 26

1234

FIELDRIVECDN

VCCD

WDGN

TXENA

VREF

VCCA

National Semiconductor

WorldFIP technology FIELDRIVE - Line Driver


ò Transformer to be used with FIELDRIVE

ò A dedicated one for each speed:

+ FIELDTR31.25, FIELDTR1, FIELDTR2.5FIELDTR25

ò High level insolation > 1500 V

ò Operating temperature range:

+ -40°C to +85°C

ò Transformer ratio:

+ 1 (31.25 kbps), 1.57 (1 Mbps and 2.5 Mbps)

ò RM6 magnetic core

FIELDTR

10

mm

D

Dn

R

Rn

Network side (primary)

Subscriber side (secondary)

5

3 6

2

7

8 4

1

WorldFIP technology FIELDTR - Line Isolation Transformer -


WorldFIP Bus 2

Entrées

Sorties MICROFIP

FIELDTR ou

TransfoFC1007

Optionnel

Optionnel FIELDTR ou

TransfoFC1007

FIELDRIVE

ou CREOL

FIELDRIVE

ou CREOL

WorldFIP Bus 1

Stand-Alone Mode

Entrées

Sorties

MICROFIP

FIELDTR ou

TransfoFC1007

Optionnel

OptionnelFIELDTR ou TransfoFC1007

FIELDRIVE

ou CREOL

FIELDRIVE

ou CREOL

WorldFIP Bus 1

Micro

Contrôleur

ROM

optionnelle

RAM

optionnelle

Bus Système

RAM 248 octets

Micro-Controlled Mode

WorldFIP technologyMICROFIP - Simple Communication Controller

AD[0]AD[1]AD[2]AD[3]AD[4]AD[5]AD[6]AD[7]

A[0]VDDVSSA[1]A[2]A[3]A[4]A[5]A[6]A[7]A[8]

CSN

SU

BS

[7]

SU

BS

[6]

SU

BS

[5]

SU

BS

[4]

SU

BS

[3]

SU

BS

[2]

SU

BS

[1]

SU

BS

[0]

CP

IAIN

VA

PIA

[7]

PIA

[6]

PIA

[5]

VS

SV

DD

VS

SV

DD

PIA

[4]

PIA

[3]

PIA

[2]

PIA

[1]

PIA

[0]

RTS CTS

RX

A1X

TXD

TX

CK

TX

E1

TE

R1X

WTC

1X

RXD1RST1NRXA2XTXE2TER2XWTC2XRXD2RST2NPIB[7]VSSVDDVSSPIB[6]PIB[5]PIB[4]PIB[3]PIB[2]PIB[1]PIB[0]INVB

EO

RD

nR

WN

ALE

IRQ

0NE

XS

L2E

XS

L1R

ES

1R

ES

2R

ES

3V

SS

VD

DD

EF

SU

PC

K0

CLK

XT

1S

LO

NE

SE

LD

EM

RS

TIN

EX

SL0

VS

SV

D0

SC

AM

OD

TS

T[0

]T

ST

[1]

TS

T[2

]S

EL

AC

TM

OD

[0]

VD

DM

OD

[1]

CP

IB

VLSI9xxx B72215.U2VY27190MICROFIP


WorldFIP technology MICROFIP - Communication Controler

ð Low cost and easy to use ASIC solution to design high integrationWorldFIP field devices

ü Two parallel input/output 8 bits ports

ü A dedicated input 8 bits port to sense the station number

ü Supply voltage 3,3 or 5 volts

ü Packaged in the MQFP100 standard solution

ü Speeds : 31,25 kbits/s, 1 and 2,5 Mbits/s

ü Support built-in medium redundancy


WorldFIP technolgy MICROFIP - Main Characteristics

ü A subset of WorldFIP normalized services

� No bus arbitrator functions

� Selectable frame delimiters and control sequence (IEC)

ü 15 Blocks of 8 bytes available for variables

ü REFRESHNESS and PROMPTNESS statuses for MPS variables(periodic)

ü PRESENCE and IDENTIFICATION variables

ü Transmit/Receive messaging channel of a 128 Bytes maximum width (only used with a microcontroller)

ü Messages handled in acknowledged or non acknowledged mode

ü Interrupt mechanism (only used with a micro controller)


Ethernet & WorldFIP

TCP/IP & new WorldFIPTechnologies :

The way towardFieldbuses & Internet


New ComponentFIP25 - Chip Set

WorldFIP (Factory Information Protocol)

Fieldbus Internet Protocol

t 31,25 kbit /s to 2,5 Mbit /s

t Redundant medium

t Deterministic traffic

t Aperiodic traffic

t

4 31,25 kbit/s to 25 Mbit /s

4 Redundant medium

4 Deterministic traffic

4 Aperiodic traffic

4 Bus arbiter

4 IP Messages

4 TCP / UDP

4 Embedded WEB server

4 Multimedia possible

FULLFIP 2

VLSI

9348BSVY06482-2FULLFIP2WORLDFIP

452531

MicroFIPMicroFIP

9616 B72215-U2VY27190-MICROFIP

VLSI

Field TRField TRFieldriveFieldrive

FIELD TR114423PS93/47

FieldualFieldual

FIELDUALFIELDRIVE

NationalSemiconductor

FULLFIP 3

SiliconFounder

9348BSVY06482-2

FIPHSF

Fieldrive 25

Drive25SiliconFounder

Field TR 25

TR2514423PS93/47

TE

CH

NO

LO

GY

Centralised bus arbiter

ðð Very easy toVery easy to use


ð

We can now make an efficientEthernet/WorldFIP architecture !

Message

Real Time data

Ethernet/WorldFIPGateway

MaintenanceConfigurationDiagnostics

MonitoringControl PC WINDOWS

EthernetEthernet

Ethernet / WorldFIP Architecture


G96 Ethernet / WorldFIP Gateway(MII Supplier)

Developpment PCwith HAWK

Ethernet

WorldFIP

G96 Ethernet / WorldFIP Gateway

MB-ETH-WF RouterEthernet/WorldFIP

Stack TCP/ipWorldFIPRoutage

(Telnet, FTPPing...etc)

PC WINDOWS


Ethernet / 8 WorldFIP Gateway(MII Supplier)

developpment PCwith HAWK

ETHERNET

WorldFIP-1

Routeur MB-ETH-WFEthernet/WorldFIP

Stack TCP/ipWorldFIPRoutage

(Telnet, FTPPing...etc)

WorldFIP-8

Ethernet / 8 WorldFIP Gateway


Current & new Developmentswith WorldFIP

News


GESPAC C51/WorldFIPInterface & Process Module

u PartnershipGESPAC/CERN


GESPAC C51/WorldFIPInterface & Process Module

APPLICATION MEZZANINE

DAC MPX ADCDATA

LATCH

DATAPLUG

MICRO-CONTROLER

80C51

FLASHMEMORY

64K

CLOCKCALENDAR

TEMPERATURE SENSOR

SRAM64K

SUPPLYMONITOR andWATCHDOG

DC/DCCONVERTER

(x2)

FILTER

MICROFIPFIELDDRIVE

FIELDTR

FIELDDRIVE

FIELDTR

FIP CONNECTOR9-pin SUB-D male

SERIALCONNECTOR9-pin SUB-D

female

I2C BUS

SERIAL PORT

SUPPLY CONNECTOR8.5 TO 36 v

OUTPUTANALOG

INPUTANALOG

CONTROL

INPUT SIGNAL(from sensor)

OUTPUT SIGNAL(to safety)

SU

PP

LY

5 V

/ +

/- 1

2 V

DATA ADDRESSCONTROL BUS

AP

PL

ICA

TIO

N M

OD

UL

EB

AS

E M

OD

UL

E

FIP

1F

IP 2

I2C

an

dR

S2

32

MEZZANINE CONNECTOR(64 Pin)

4 32

AP

PL

ICA

TIO

NC

ON

NE

CT

OR

RESET

SUPPLY

I2C

5V+/-12V

FPGA

u CPU : 80C51u Fieldbus : MICROFIPu RAM : 64Kbu Flash EPROM 64bu Analog I/O 12BIT) :

•Input : 32 channels (ADC & MPX)

•Output : 2 channels(DAC)

u Digital :I/O Busu Watchdog


Schneider’s new ArchitectureEthernet/WorldFIP Module

BUS_XCPU

PREMIUM

Agent (1) Agent (n)

Ethernet

WorldFIP (31.25 Kb/s, 1 & 2.5 Mb/s)

Top-Synchro From IRIG-B Module(10,20,50,100,200,500ms...)

Supervision OpérationConfiguration

Ethernet

Ethernet

Agent (2) . . . . .

SNTP Server

Alspa VNTC/WNTC

C E G E L E C

(Optional Input)

(GPS Time)


Schneider’s New ArchitectureEthernet/WorldFIP Module

MICROFIP

WorldFIP ConfigurationProgrammation (PL7)Supervision (PCVUE 32)Diagnostic

WorldFIP/Ethernet Module

PLC Premium

WorldFIP (31.25Kb/s or 1Mb/s, 2.5 Mb/s)

MomemtumMicrobox(CABTF2)

CERNApplication

WorldFIP/Fieldbus Foundation

Bridge

Fie

ldbus F

ondatio

n (3

1.2

5 K

Hz)

IntelligentActuators/Sensors

FIPIU FULLFIP FULLFIP

Ethernet

WorldFIPAnalyser

(Optional)

u Main Functions :

u Gateway between PREMIUMapplication (Bus-X ) &WorldFIP fieldbus

u Router between Ethernet and WorldFIP (TCP/IPprotocol) device (Ping, TELNET, FTP...)

u Device Synchronizationand timestamping (resolution:1ms)from IRIG-B or SNTP time


IOLINKFIPMicro-card (“Mezzanine”)

IOLINKFIP

(FPGA)

WFIP Connector

FIP Address

Address Switchs

Transfo

I/O Connectors I/O Connectors

Configuration Links

u IOLINKFIP isdedicated toradiationapplications

u IOLINKFIP isintegrated in theFPGAActel (anti-fusetechnology)

u Note : Needs evaluation phase


IOLINKFIPDirect Mode

IOLINKFIP(Direct Mode)

8 BYTES

4 BYTES

Supply

DIRECT/IO-BUSMode

Status Byte

FIP Address

FIP/WFIPFrame

CONTROLOutput :

� Read/Write� Enable� Synchro-A� Synchro-B� Clock (1Mhz)

TrSerial Line

( RS232 & Modbusprotocole)

CONFIGURATION APPLICATION

RS232Speed

CONTROLInput :� Ready

I/O Registers

InputRegisters

OuputRegisters

Rx & Tx Registers(RS232)

I/O-Conf


IOLINKFIPBus-I/O Mode

DATA(1 Byte)

ADDRESS(1 Byte)

CONTROLOutput :� Read/Write� Enable� Synchro-A� Synchro-B� Chip Select

(72 lines)� Clock (1Mhz)

Supply

Direct IO-BUSMode

Var-P Size

Var-C Size

Status Byte

FIP/WFIPFrame

Tr

Serial Line( RS232 & Modbus

protocole)

Input Data

RAM

Output Data

Rx & Tx Registers(RS232)

FIP Address

CONFIGURATION APPLICATION

IOLINKFIP(I/O-Bus Mode)

RS232Speed

CONTROLInput :

� Data Ready


Technical Advantages of WorldFIPFor LHC Controls 1/2

u Redundancy at Medium, Receiver and Transmitter Levels FullySpecified in the Standard.

u Communication Concept of One Producer to N Consumers.

u Distance only Limited by Medium Quality on Not by Propagation Time.

u Transformer Coupling and Not Radiation Sensitive Optocouplers

u Concept of Data Freshness (Producer) and Promptness. (Consumer)


Technical Advantages of WorldFIPFor LHC Controls 2/2

u Qualified to LHC Machine Radiation Environment.

u Bandwidth Sharing: Periodic, Aperiodic and Message Traffic (Data Pipe Concept). u Synchronization of the Transmission with Jitter<1uS for: - Universal Time Distribution

- High Precision Time-Stamping - LHC Machine Event Propagation/Recognition - Possibility to Synchronize Devices All over LHC.

u TCP/IP Communication/Configuration Down to the Sensors.

u Embedded TCP/IP Stack and Web Server.

fip protocole jcop short4 - cern

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