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Mansour Keramat Electrical & Computer Engineering Department University of Connecticut Fall 2000

Design and Test of Data Converters

Fall 2000

Mansour Keramat

Electrical & Computer Engineering Department University of Connecticut

Contents

Introduction

Part I:

Applications of Data Converters 1.1. Why Data Converters

1.2. Wireless Communications

1.3. Wired Digital Communications

1.4. Voiceband Digital Communications

1.5. Smart Sensors

1.6. Data Storage

1.7. Digital Imaging

1.8. Video Systems

1.9. Test of Integrated Circuits

1.10. Motor Control

1.11. Digital Control

1.12. References and Further Reading

Part II:

Design of Track and Hold 2.1. Types of Analog Input Signals

2.2. Signal Conditioning

2.3. Bandwidth Issues

2.4. Sampling Theory

2.5. Simple Track and Hold Circuits

2.6. Performance Measures of Track and Hold

2.7. NMOS Switches

2.8. Bottom-Plate Sampling

2.9. Bootstrapped Switch

2.10. CMOS Switches

2.11. Diode Switches

2.12. Practical Track and Hold Implementations

2.13. References and Further Reading

Part III:

Nyquist Rate Analog-to-Digital Converters 3.1. General Usage of Analog-to-Digital Converters

3.2. Input/Output Characteristic

3.3. Signal-to-Noise Ratio (SNR)

3.4. Static Performances of ADCs

3.5. Dynamic Performances of ADCs

3.6. Flash A/D Architecture

3.7. Bipolar and CMOS Comparators

3.8. Subranging A/D Architecture

3.9. Pipelined A/D Architecture

3.10. Non-Ideal Effects in Pipelined Architecture

3.11. Op-Amp Issues

3.12. Commercial Flash/Pipelined ADCs

3.13. Folding and Interpolating Architecture

3.14. Interpolation Techniques

3.15. Folding Techniques

3.16. Successive Approximation ADC

3.17. Recycling A/D Architecture

3.18. Interleaved Architecture

3.19. MATLAB Toolbox for Data Converters

3.20. References and Further Reading

Part IV:

Oversampling A/D Converters 4.1. Advantages of Sigma-Delta Architecture

4.2. History of Sigma-Delta Converters

4.3. Conventional and Oversampling ADC

4.4. Advantages of Oversampling

4.5. Block Diagram of Sigma-Delta Converters

4.6. Simulation Tool of Sigma-Delta Converters

4.7. First Order Continuous-Time Modulators

4.8. Resolution of Sigma-Delta Converters

4.9. Discrete- and Continuous-Time Modulators

4.10. Equivalent Discrete-Time for Continuous-Time Filters

4.11. High-Speed Second Order Sigma-Delta Modulator

4.12. Modeling of Quantizer

4.13. Notion of Quantizer Linearization

4.14. Effect of Dither Frequency on In-Band-Noise (IBN)

4.15. Describing Function (DF) Method

4.16. Generalized Describing Function Method

4.17. Prediction of Oscillations by Root Locus

4.18. Effect of Delay on Quantizer Gain

4.19. Effect of Delay on Limit Cycle

4.20. Effect of Delay on Resolution

4.21. Compensation of Loop Delay

4.22. Decimation Filter

4.23. References and Further Reading

Part V:

Digital-to-Analog Converters 5.1. Reconstruction of Analog Signals

5.2. Ideal Digital-to-Analog Converters

5.3. DAC Output

5.4. Multiplying DAC (MDAC)

5.5. DAC Transfer Function

5.6. DAC Inherent Distortion

5.7. Static Performance of a DAC

5.8. Dynamic Performance of a DAC

5.9. Resistor Ladder Architecture

5.10. Current Steering Architectures

5.11. DAC with Differential Output

5.12. Architecture of a Communication DAC

5.13. Differential-to-Single Ended Output

5.14. Tips for Op-Amp Selection

5.15. Commercial DACs

5.16. Charge Redistribution Architectures

5.17. Sigma-Delta Architecture

5.18. Interpolation Filter

5.19. Noise Shaping Filter

5.20. Decimation Filters

6.1. References and Further Reading

Part VI:

Test of Data Converters 6.2. Test Goals

6.3. Test of Different Types of Circuits

6.4. Analog and Mixed Signal Test Issues

6.5. Built-In-Self-Test (BIST)

6.6. Importance of Test Methodology

6.7. Errors of Test Setup

6.8. Introduction to Static Testing

6.9. Ramp Test Method

6.10. Servo-Loop Test

6.11. Result of Static Testing

6.12. Introduction to Dynamic Testing

6.13. Histogram Testing

6.14. Fast Fourier Transform (FFT) Testing

6.15. Pulse Test

6.16. References and Further Reading

Introduction

Analog-to-digital (A/D) converters and digital-to-analog (D/A) converters are needed in

all Digital Signal Processing (DSP) applications, which interface with the analog signal.

As DSP continues to gain ground over analog signal processing, the importance of these

converters increases correspondingly. The high-speed and high-resolution A/D converters

are required in numerous applications, such as wireless communications, ADSL, and

VDSL systems. Two key performance criteria are sampling rate and precision or bit

resolution. In general case, we deal with a trade-off between these criteria. Different

types of converter architectures offer system designers a range of choices in speed and

resolution for optimal use in their applications. Among the choices in A/D architectures

are flash, pipeline, successive-approximation register (SAR), and sigma-delta converters.

D/A architectures include resistorstring converters, current-mode converters, and well-

known sigma-delta converters that are used in high resolution applications. In addition,

the test of the data converters is becoming more and more important issue in mixed signal

applications. The test of A/D and D/A converters can be carried out by using the DSP

unit. Some mixed mode test architectures like Built-In-Self -Test (BIST) are described.