Flipping Bits in Memory Without Accessing Them:DRAM Disturbance

ErrorsYoongu Kim

Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur

Mutlu

DRAM Chip Row Row Row Row Row

Wordline

DRAM Chip Row Row Opened Row Row Row

Wordline VHIGH

DRAM Chip Row Row Closed Row Row Row

Wordline VLOW

DRAM Chip Row Row Opened Row Row Row

Wordline VHIGH

DRAM Chip Row Row Opened Row Row Row

Wordline VHIGH

DRAM Chip Row Row Opened Row Row Row

Wordline

Repeatedly opening and closing a row induces disturbance errors in adjacent rows

VHIGH

DRAM Module

x86 CPU

Y

X

loop: mov (X), %eax mov (Y), %ebx clflush (X) clflush (Y) mfence jmp loop

DRAM Module

x86 CPU

loop: mov (X), %eax mov (Y), %ebx clflush (X) clflush (Y) mfence jmp loop

Y

X

DRAM Module

x86 CPU

loop: mov (X), %eax mov (Y), %ebx clflush (X) clflush (Y) mfence jmp loop

Y

X

DRAM Module

x86 CPU

loop: mov (X), %eax mov (Y), %ebx clflush (X) clflush (Y) mfence jmp loop

Y

X

Most Modules At Risk86% 83% 88%

Most Modules At Risk86% 83% 88%

After After After

Most Modules At Risk86% 83% 88%

After After After

Errors Errors Errors

Flipping Bits in Memory Without Accessing Them:DRAM Disturbance

Errors

4:30 PM