front end electronics for actar
DESCRIPTION
Front End Electronics for ACTAR. What Are Our Specs? - Simulation Energy Deposit Particle dynamic range – p U Stopping of particle in gas Pad density … Particle Multiplicity Channels Number of channels Power consumption … External/Internal Trigger On-Line processing … - PowerPoint PPT PresentationTRANSCRIPT
ACTAR Nov 05 Lolly Pollacco CEA Saclay
What Are Our Specs? - Simulation• Energy Deposit
– Particle dynamic range – p U– Stopping of particle in gas– Pad density– …
• Particle Multiplicity• Channels
– Number of channels– Power consumption– …
• External/Internal Trigger• On-Line processing• …
What Are Our Inputs?• Budget• Manpower
– Engineers – Electronics– Physicists - Simulations
ACTAR Nov 05 Lolly Pollacco CEA Saclay
Possible Soln
• GASSIPLEX– DRIFT/SeD/MAYA – CERN– 16 cannels
• T2K– Neutrino TPC– DSM/SEDI – Saclay – Can modify eventually & local experts– 64 channels– 2 msec
• ALTRO– ALICE TPC Readout Chip– CERN– 16 channels– No dead-time
• …
ACTAR Nov 05 Lolly Pollacco CEA Saclay
T2K SpecsPARAMETER VALUE
Number of Channels 72
Number of Time Bins 512
MIP value (MICROMEGAS) 12fC to 60fC
MIP value (GEM) Need values
MIP to noise ratio 100
Dynamic Range 10 MIPS on 12 bits
I.N.L 1% 0-3 MIPS; 5% 3-10 MIPS
Gain Adjustable (4 values)
Sampling Frequency 1MHz to 50MHz
Shaping Time 200ns to 4us
Readout Frequency 20 MHz to 25MHZ
Polarity of the detector signal Positive or Negative
Calibration Selection 1 / 72
Test Internal Test capacitor for each channels
Power < 3mW / Channel
ACTAR Nov 05 Lolly Pollacco CEA Saclay
T2K Chip components
Serial Interface Trigger CKIn Test
512 cells
SCAFILTER
Tpeak;Gain
CSA
1 channel
X724
BUFFER
SLOW CONTROLTEST SCA MANAGER
Stop CK
ADC
Asic T2K
GAIN
ACTAR Nov 05 Lolly Pollacco CEA Saclay
ALTRO
• PA (PASA) +System Chip(ALTRO)
• System chip– ADC + Correction + …
• ADC 10 bits • 10 & 40 MHz• Operated at IPN Orsay and Saclay• Expensive• Power hungry (35 mW/channel)
• It is built & it works