full-system simulation & virtutech simics

27 February 2006 Copyright © 1998-2006 Virtutech, All rights reserved. CONFIDENTIAL 1

Full-System Simulation & Virtutech Simics

Jakob Engblom, PhDBusiness Development Manager

[email protected]


Our Technology

• Software that simulates hardware, so that software can run on the virtual hardware– All software: operating system, drivers, firmware,

and applications• And do R&D work with the software, hardware, and

software/hardware interface

Backplane

CPU

RAM

Device

FLASH

Device

DSP

Device

CPU

RAM

Device

FLASH

Device

Enet

Device

Enet

DevelopmentHardware

Virtual DevelopmentPlatform

Simics Model

CPU

RAM

Device

FLASH

Device

DSP

Device

CPU

RAM

Device

FLASH

Device

Enet

Device

Enet

Backplane

, PhD


The Scope of Interesting Systems

• Interesting systems not just single-CPU stand-alone• Multiprocessors

– Homogeneous like servers– Heterogeneous like mobile phones

• Distributed systems– Local-Area Networks– Embedded Systems– Network-on-Chip

• Need to simulate– Shared memory computers– Multiple computers– Networks of computers


Network

Server

Simics is a Systems Simulator

PC

PC

Phone

Internet


Simics

Simics/PhoneSimics/Phone

SimicsSim Network

SimicsSimics/Server


Simics

Trafficgeneration Simics

Simics/PC

SimicsSimics/PC

Simics/Phone


Simics

Simics/PhoneSimics/Phone

SimicsSim Network

SimicsSimics/Server


Simics

IPSimics

Simics/PC

SimicsSimics/PC

Simics/PhoneHardware model

RTOS

Applications


Scope is Proportional to Abstraction

Scope of model

Leve

lof a

bstr

actio

n

String theory

Atom The Universe

Galaxies

Reasonable to simulate: scope

proportional to abstraction

Reasonable to simulate: scope

proportional to abstraction

Or largesystems at

coarse detail

Or largesystems at

coarse detail

We can simulatesmall systems at

great detail

We can simulatesmall systems at

great detail


Simulation Levels

Functional instruction-set & device behavior

Timing-correct cycle-level (SystemC)

Implementation-level (VHDL/Verilog)

Operating system API (VxSim)

Service API (Java library)

Operating System API Standard (POSIX)

Abs

tract

ion

HW/SW interfaceHW/SW interface

Stable & narrow interface, enables

fast simulation

Stable & narrow interface, enables

fast simulation

Excessive details gives

very slow simulation

Excessive details gives

very slow simulation

Not same binaries as

target

Not same binaries as

target

Too abstract to provide information on actual

target behavior

Too abstract to provide information on actual

target behavior

Cycle-accurate instruction-set


Full-System Simulation with Simics


Hardware

Our Technology: Full-System Simulation

CPU

Operating system

User program

RAM FLASH

MiddlewareDBServer

Completeproductionsoftware

LCD

ASICROM

PCI

I2C

BusCPU

Drivers Firmware

The software can’t tell the difference

Network net

Identical build tools chain

Timer

DiskSimulatedhardware

Runs binaries from real target


Simics Modeling Level: Processor

• Instruction-set simulation (ISS)• Complete and correct processor functionality

– All instructions semantics bit-correct vs real machine– Supervisor-mode & user-mode– Runs the complete target instruction set

• Including Altivec, SSE, 3dNow, VIS, etc. extensions

– All accessible values represented• User-level registers• Supervisor-level registers• Model-specific registers, ASIs, debug registers, etc.

• Memory-management unit• Timing abstracted

– Add details if required


Timing Accuracy with Simics

• Basic model– 1 instr = 1 cycle– No cache, perfect memory– 100 MIPS+ speed

• Cache model– Compute instr = 1 cycle– Memory instr = cache time– Cache statistics & traces– 1 MIPS+ speed

• Detailed model (MAI)– Pipeline model in processor– Cache model– Wealth of statistics possible– Very slow speed

1 CPI Processor Memory

x CPIProcessor MemoryCaches

PipelineModel

ProcessorMemoryCaches


Simics Modeling Level: Devices

• Hardware modeled as a set of devices– Memory map of machine (as seen by processor)– At the programming register level

• Model the program-visible behavior– Configuration registers– Control registers– Buffers in memory, etc.

• Transaction-level modeling– Reads, writes, DMA transfers, network packets

• ASICs & FPGAs– Model programming interface behavior– Not detailed implementation

• Unless that is needed, we’ll get back to that later• Detailed timing can be added if required


Simics Timing Concepts

Time

CPU

Interrupt controller

Timer

I/O

Timer: driven by the global time, posts interrupt to intr.ctrl.

Timer: driven by the global time, posts interrupt to intr.ctrl.

Asynchronous input from outside

Asynchronous input from outside

Global virtual time, paced by the

processor

Global virtual time, paced by the

processor

I/O with completion interrupt, starts with CPU programming

the device

I/O with completion interrupt, starts with CPU programming

the device

Get back to device and trigger interrupt after operation completes

Get back to device and trigger interrupt after operation completes


SimicsSimics SolutionDebugging

Profiling

Fault Injection

Simics Product Structure

Tracing

Test Driving

Timing Models

GUI Interface

Real Network

Simics Core

Processors Standard Devices Custom Devices

Multiprocessor

Multiple Machines

ScalabilityDistribution

Virtual Memory

Checkpointing

Determinism

Visibility

Advanced Breakpoints

Events

Proven API

Virtual Time

Configuration

32/64-bit Handling

EndiannessHandling

Networks

Target Operating System

Programs


CardCardCardCard

Example Models Built with Simics: Telecom

• Telecom Switch– ATM Backplane– 10+ different card types

• Control cards• Timer units• Line cards• Backplane switch cards• Multiprocessor compute cards• DSP Multimedia cards

– 20+ cards in a rack• Combined arbitrarily

Rack Backplane

Control

PPC

FLASHPQ

Compute

PPC

Line Card

PPC

atmasic

PPC

PPC PPC

– Multiple processor types• PowerPC 750fx• PowerPC 750gx • PowerPC 440• PowerPC 405• PowerPC 403• PowerQUICC II 8260, 8280• TI C64 DSP

– Multiple network types• ATM, Ethernet, Serial


CPU cardCPU card

Example Multiprocessors with Simics

• Sun server– Backplane + cards

• CPU cards• I/O cards

– 1-24 CPUs• 2 CPUs per card

– Up to 192 GB RAM

CPU card

USIIIRAM

Cache-coherent Backplane

USIII

IO card

Sbus SCSI

PCI eth

– I/O cards• SCSI• S-Bus• PCI• Disks• Ethernet• Fibre Channel

– Solaris, Linux OS


Example Simics Models: Single-CardSystems• Aerospace board

– Single processor• PowerPC 750gx

– Integrated system unit• Memory controller• Ethernet network• Serial ports• PCI

– On-board memory• FLASH• RAM

– PCI/X connections– VxWorks, in-house OS– Multiple cards networked

Board

PPC

FLASH

mem RAM

eth

ser

PCI

Board

PPC

FLASH

mem RAM

eth

ser

PCI


Networks: Building Big Systems


Network Simulation with Simics

Real network of physical machines

Interface to real network: mix simulated &

real machines

Interface to real network: mix simulated &

real machines

Simulated network of simulated machines:

no topologicalrelation to the

physical network

Simulated network of simulated machines:

no topologicalrelation to the

physical networkSimulatedmachines, one or

more per hostmachine

Simulatedmachines, one or

more per hostmachine


Simics Network Timing

• Globally synchronized timing– Across processors– Across machines– Across the network– One processor stops all stop

• Correct relative speed– 500 MHz processor will execute 10 times more

instructions than a 50 MHz processor, in the same time• Virtualized & controlled time

– Insulated from external time– Time does not advance when simulation is stopped– Slower or faster than real world time– Global across the simulated network


Network Simulation with Simics: Node View

SimicsSimics

Simulated machine

OS

Application

Simulated machine

OS

Application

Simulated machine

OS

Application

Simulatedmachine sends

packets onto the simulated network

Simulatedmachine sends

packets onto the simulated network

Simics Network Link

Simulation

Simulated machine

OS

Application

Regular OS networking API for

the applications

Regular OS networking API for

the applications

OS talks to the network device,

like on a real machine

OS talks to the network device,

like on a real machine


Network Instrumentation

SimicsSimics

Simulated machine

OS

Application

Simulated machine

OS

Application

Packets travel on the simulated

network(s)

Packets travel on the simulated

network(s)

Network instrumentation

moduleSimics

Network LinkSimulation

Simulated machine

OS

ApplicationInstrumentation at network coreInstrumentation at network core

Simulated machine

OS

Application

Packets can be inspected, killed,

corrupted, delayed, bandwidth limited

Packets can be inspected, killed,

corrupted, delayed, bandwidth limited

Instrumentation at network

devices

Instrumentation at network

devices


Simics

Simics

Simics/IP PhoneSimics/IP Phone

Simics

Varying the Level of Simulation

Simics

Simics/Router

Simics

IP trafficgen

Simics/IP Phone

Hardware model

RTOS

Applications

Simics/Server

Hardware model

RTOS

Applications

Network simulation

Simulated function

Test system

Fully modelednode, running

the real software

Fully modelednode, running

the real software

Simplifiedrepresentation of the node functionality, no real software running

Simplifiedrepresentation of the node functionality, no real software running

Real-world test system runningagainst the fullysimulated nodes

Real-world test system runningagainst the fullysimulated nodes

Simple trafficgeneration injectingpackets into network

Simple trafficgeneration injectingpackets into network


Host hardwareHost hardware

Host operating systemHost operating system

SimicsSimics



SimicsSimics

Distributed & Local Network Links

HW

OS

Programs

CentralServer

link0 HW

OS

Programscentralclient

HW

OS

Programs

HW

OS

Programslink1

link0

link2

Local link, not affected by

distribution latency

Local link, not affected by

distribution latency

Distributed link with higher latency

Distributed link with higher latency

HW

OS

Programs

centralclient

HW

OS

Programs

HW

OS

Programs


Connecting to Debuggers



SimicsSimics

Simulated target hardware

Target operating system

User programOS debug

kernel

debug module

Connect directly to Simics, with no debug kernel on the target. Allows debugging a

stopped target.

Connect directly to Simics, with no debug kernel on the target. Allows debugging a

stopped target.

Debugger

Connect over the networkjust like to a real target.

Target has to be executing. No special

Simics support needed.

Connect over the networkjust like to a real target.

Target has to be executing. No special

Simics support needed.


Connecting to External Stimuli Generation



SimicsSimics



User program

test injection module

Inject test data into the simulated hardware directly

Inject test data into the simulated hardware directly

Tester

Inject test data via a special driver &

pseudodevice in the simulated machine

Inject test data via a special driver &

pseudodevice in the simulated machine

test device

test driver

Inject test data via a network connectionInject test data via a network connection


The Beauty of Virtualization


Complete Virtualization



SimicsSimics



User program

PC (32- & 64-bit) or Sparc

PC (32- & 64-bit) or Sparc

Linux, Solaris, Windows

Linux, Solaris, Windows

Arbitrary; currentlysupports Alpha, AMD64,

ARM, IA64, MIPS, PowerPC, Sparc, x86,

TI C6400

Arbitrary; currentlysupports Alpha, AMD64,

ARM, IA64, MIPS, PowerPC, Sparc, x86,

TI C6400

All software: arbitrary & unmodified. Same as on a

real system.

All software: arbitrary & unmodified. Same as on a

real system.


Virtualization = Infinite Longevity

Host hardwareToday: 32-bit PC

Host operating systemWindows

SimicsSimics for x86/win

PPC 750fx Card

Target OS

Applications

Host hardwareTomorrow: 64-bit PC

Host operating systemLinux

SimicsSimics for AMD64/linux

PPC 750fx Card

Target OS

Applications

Host hardwareFuture: X Hardware

Host operating systemY OS

SimicsSimics for X/Y

PPC 750fx Card

Target OS

Applications

Time

...but the simulatedtarget hardware stays

the same

...but the simulatedtarget hardware stays

the same

And the targetsoftware keeps

working

And the targetsoftware keeps

working

The host machinesavailable change over

time...

The host machinesavailable change over

time...


Handy Features of Simulation

• Checkpointing – Store current state; pick up and continue later– Position workload once, use many times– Spread a system state to multiple developers

• Determinism– Same initial state gives same execution; – Repeat the same execution any number of times– Investigate a problem time after time



• Visibility (insight without intrusion)– All state can be observed– All events can be traced and logged

• Controllability– Any part of machine or state can be changed– Fault injection

• Virtual time– Time is completely virtual – Global synchronization across all machines



• Configurability– Any parameter of system can be changed

• Sandboxing– Simulated machine complete isolated– Allows investigating ”nasty code”

• Backwards debugging– Roll back execution to previous state– Reverse breakpoints– Investigate details of program errors


Ultimate Debug Tool – Simics Hindsight

• Going forwards: any debugger

• Back up and find out what happened: Hindsight


Reverse Debugging Techniques

• Trace-based– Record system execution– Special hardware support

or simulator – Use as “tape recorder,”

fixed execution observed– Hard to extend to multipro

• Simulation-based– Record in simulator– Replay in same simulator– Can change state and

continue execution– More powerful solution

BackupGo forward

Backup

And go somewhere else


Using Full-System Simulation


Virtutech Simics: A Broader Simulation Platform

Software developmentArchitecture

Hardware design

HW Platform

SW StackDrivers

Firmware

Applications

RTOSMiddleware

DesignHDL

SystemCHW platform

ASIC FPGA CPU

EDA Tools Software Tools

Simics

Traditional simulators


Hardware Replacement

• Embedded hardware systems– Often 10000+ USD development platforms– Simulation:

• Cheaper• More convenient, easily replicated • Early availability

• Virtual testlabs– Replace custom hardware with PCs– Cheaper than custom hardware– Easier setup– Checkpoint & replicate setups– Sufficient performance

• “Virtual hardware”: – Better than the real thing!


This is what you replacewith simulation!

This is what you replacewith simulation!


Parallellize SW & HW Development

Board design Board prototype

Software development

Handoff to the software team, when ”working”

hardware exists

Handoff to the software team, when ”working”

hardware exists

Board design & build simulator

Board prototype

Software development

Handoff to the software team, using a simulation of the hardware platform

Handoff to the software team, using a simulation of the hardware platform

Time saved


Software Development

• Low-level software development– Boot rom– Device drivers– Operating systems

• Features– Supervisor-level & interrupt code debug– Complete system freeze, including networks– Device access breakpoints– Total inspection of system state

• Example course:– www.it.uu.se/edu/course/homepage/datsystDV/ht04/project


Hardware Development

• Model hardware– Architecture– Devices– Processors

• Test hardware models– Real OS & device drivers– Real workloads– Not just fixed test patterns

• HW/SW cosimulation– At various levels of detail

• Shortens time to market dramatically


Computer Architecture

• Academic research & industrial development– Large part of our academic user base

• Detailed processor simulation– Classic comp.arch– In a system context– Multiprocessor systems

• Detailed memory system simulation– Cache designs– Memory performance studies

• Interconnect simulation– SMP, NUMA, distributed systems

• Speed is always an issue for these studies!– Months of simulation run-time!


Computer Architecture and Full-System Simulation• “Classic” computer arch

studies:– Simulate the SPEC

benchmarks– Use only user-level code,

no OS taken into account• “Full-system” studies:

– Take account of the effect of the OS

– Requires something like Simics to be feasible

• Does the OS matter? – Yes!– DB & desktop apps spend

significant time in the OS– OS code very different

from user-space code

Benchmark % OSdb init 39.54db query 78.04acroread 19.50powerpoint 24.22SpecInt-crafty 0.79SpecInt-gcc 2.48SpecFp-art 0.05SpecFp-equake 0.05gcc+acroread 4.19

source: Bhargava et al, “Understanding the Impact of X86/NT Computing on Microarchitecture”


Networks

• Develop network stacks & protocols– Synchronous stop– Single-step network code– Instrument the network

• Test network configurations– Size– Topologies– Unbalanced nodes

• Fault Injection– Program arbitrary fault models & fault patterns– Disconnect nodes– Drop packets– Corrupt packet contents– Radio mobility network models


Fault Injection

• Fault injection– Fault tolerant systems – Safety critical systems

• Advantages– No physical damage– Repeatable regression– Full insight

• Tasks– Corrupt CPU registers– Corrupt memory– Corrupt bus transfers– Disconnect subsystems– etc.


Boundary Case Testing

• Boundary case testing– Simulator configurability, laziness, & controllability– Virtualization: no hard boundaries: trade time for size

• System configuration– Memory: ”264 bytes of RAM”– Fully-equipped racks

• Not limited by physical availability

– Very many network nodes• System behavior

– Interrupt arrival rates– Network packet arrival rates– Network packet size– Long sleep times (space missions)


Teaching

• Enable hands-on experience• Computer architecture• Embedded systems programming• Operating systems

– Debug half-finished systems– Same setup for all students– Easy handin– Easy to work at home

• System management– Easy to restore system state– No risk to real machines and networks


Stimulating a Simulation


Stimuli

• Without proper stimuli, model is useless

• Feed mechanism– How to get information into the simulation

• Data generation– What to supply to the simulation – Can get tricky


Regular Computers

• Fixed inputs– ”Spec benchmarks”: loaded from disk

• Network– Load generation on simulated machines– Interface to a real network

• Interactive use• Load generators on real machines

• Keyboard & mouse– Map directly to real device– Easy for PC-on-PC-style– Interactive user


Non-traditional Interactive Computers

• Mobile phones, navigation computers, PDAs, etc.

• Application development– Use GUI to provide interactive

sessions with user– Keyboard, joystick, touch screen– Not radio data etc.

• Specialized companies provide UI simulation

• We have not done this with Simics (yet)


Configuration as Stimuli

• Stimuli = hardware configuration

• Booting an operating system– Test of OS software vs hardware– Reconfigure hardware, alter devices

• Self-configuring systems– Networks & other distributed systems– Master election, device discovery, etc.– Adding/removing simulated nodes


Workload Scaling

• Simulation can be is slow– Detailed architectural simulation:

• Slowdown 10000: • 1 minute real time = 7 days simulation time

– Single-MIPS speed (slowdown 1000):• 1 minute = 17 hours

– GIPS speed (slowdown 2-3):• 1 minute = 2-3 minutes

• Scale (down) workloads to fit – Smaller data sets– How to make representative of full runs?– Tricky problem in its own right


Simulate with Care


Obtaining Significant Results

• Computer architecture research– 90% or more done in simulation– Measure of success:

effect of modification to a reference machine– What is a significant result? -5%?+10%?

• How real is the machine modified?– SimpleScalar is not a real processor

• = need for quite extensive modeling• = need for validation of simulators


Wisconsin Experiments

• Mark Hill et al, IEEE Computer Feb 2003• Investigating potential pitfalls of simulation• Detailed microarchitectural modeling

– Pipeline, caches, reordering, the works– Randomized L2 miss time (80-89 cycles)

• Several runs with same workload• Variable results!



• WCR (16,32) = 18% (“Wrong Conclusion Ratio”)• WCR (16,64) = 7.5%• WCR (32,64) = 26%

16 32 64

ROB Size

2.5

3.0

3.5

4.0

Cyc

les P

er T

rans

. (m

illio

ns)

maxavgmin



5 10 15 20

Sample Size (number of runs)

2.6

2.8

3.0

3.2

3.4

Cycle

s Per

Tran

s. (m

illion

s)

3264



• Conclusions:– Simulation no different from runs on real HW– Use standard statistics– Non-overlapping confidence intervals

• Danger of determinism in simulation– Testing a single path of a program– Induce variability by randomization


About the Virtutech Company


Virtutech History

• Founded in 1998 in Stockholm, Sweden– Based on research begun in 1991– Spin-off from Swedish Institute of Computer Science

• Early Customers– Ericsson and Sun Microsystems were first customers

• US Company since 2004– Requirement to get Venture Capital from US– Headquarters in San Jose– Engineering in Stockholm

• Expanding rapidly– About doubled in last two years– Market is opening up for us


Value to Our Customers

Significantly Reduce Development Hardware Costs– Immediately reduce capital and operational costs by

replacing development hardware with virtual development platforms.

Accelerate Software and Hardware Development– Provide software teams with virtual hardware many months

prior to the availability of physical hardware.

Increase Quality, Performance, and verify High Availability– Complete, non-intrusive control and visibility of the software

running on Simics virtual hardware.


Getting Simics


Simics Academic Licensing

• Simics is offered to academia for free• Academia gets the full Simics tool, all targets

• Personal licenses– Free, renewable yearly– All Simics features, all public machine models– Node-locked to a single computer

• Site licenses– Free, 10000 licenses included– All Simics features, all public machine models– Much cheaper than buying specialized hardware labs


Exjobb


Exjobbare sökes!

• Vi har ett antal intressanta exjobb utannonserade• http://www.virtutech.com/about/careers/masters-

thesis.html

• Placering i Göteborg eller Stockholm, flexibelt

• Examinator från Chalmers, så att CTH får sina student-poäng

http://www.virtutech.com/about/careers/masters-thesis.html

http://www.virtutech.com/about/careers/masters-thesis.html


Demo


Host hardwareHost: PC

Host operating systemHost OS: Windows XP (32-bit)

SimicsSimicsebony1: 10.10.0.70

3 Ebony + 1 PMPPC, 4 OSes (checkpoint)

Ebony PPC440GP Card

VxWorks

shell

pmppc0: 10.10.0.12

Artesyn PMPPC 750 Card

Montavista Linux

bash

ebony0: 10.10.0.50

Ebony PPC440GP Card

Montavista Linux

bash/web server

Simics Network

Simulation

ebony2: 10.10.0.78

Ebony PPC440GP Card

OSE

shell


Opening a Checkpoint & Controlling Time


Host operating systemHost OS: Windows XP

SimicsSimics

Pentium 4 PC + Voodoo3 GPU

Windows NT 4.0

Date and Time

Simics Simics consoleconsole


More than One Billion Instructions per Second

Speedometer


Host operating systemHost OS: Windows XP

SimicsSimics

Artesyn PM-PPC PowerPC 750 Board

Montavista Linux 2.1

Shell

Simics Simics consoleconsole

Target Target consoleconsole



Host operating systemHost OS: Windows XP (32-bit)

SimicsSimics

blue, 375 MHz

green, 500 MHz

System-Level Performance Metering

yellow, 350 MHz


Montavista Linux

bash

Simics Network

Simulation


Montavista Linux

bash


Montavista Linux

bash


Extra slides


Why is Simics Fast Enough?

• Raw power of PC hardware– Typical x86 server/PC faster than embedded CPU– Current hardware much faster then legacy systems

• Simulation technology– Binary translation from target to host

• Fast simulation of quiet time– Simulation skips idle time (OS idle loops, for example)

• Faster turn-around times– Less setup hassle compared to real hardware– Use checkpoints to quickly get to interesting points

• Selectable level of instrumentation– Only instrument interesting details of system


Actual screenshotfrom within Simics, simulating a P4 PC

running Windows XP

Actual screenshotfrom within Simics, simulating a P4 PC

running Windows XP


Simulating Systems of Systems

Network

Network


SimicsSimics

Simulating Systems of Systems

Network

Network

Interface Card

Rack Backplane Network Simulation

Data planecardData plane

cardData planecard


cardControlcard

SimicsSimics

Network simulation

Network model

SimicsSimics

Interface Card

Rack Backplane Network Simulation


cardData planecard


cardControlcard

Network model

Each rack is a network, with each

card a networknode.

Each rack is a network, with each

card a networknode.

The externalnetworks are

simulated as a separate network

simulation

The externalnetworks are

simulated as a separate network

simulation

Network interface cards are connected

to both networks.

Network interface cards are connected

to both networks.


SimicsSimics

Default Model: Perfect Switch

• Sends packets to relevant nodes

– Based on MAC address

• Broadcast supported– For packets with

broadcast address

• Real switch: – Needs to learn/unlearn

MAC addresses

Target HW

Target OS

Programs

Target HW

Target OS

Programs

Target HW

Target OS

Programs

Target HW

Target OS

Programs

link0

Single cast packet: point-to-point transmission

Single cast packet: point-to-point transmission


SimicsSimics

Shared Media Model

• Shared media

• All nodes see all packets

• Filtering of packets– Not in network– Network card– OS

Target HW

Target OS

Programs

Target HW

Target OS

Programs

Target HW

Target OS

Programs

Target HW

Target OS

Programs

link0

All packets are logically broadcast

All packets are logically broadcast


Services on a Simulated Network

• Service node– Separate light-weight node

on the network with its own IP-address

• Provides basic IPv4 services– RARP– BOOTP/DHCP– DNS– TFTP– Ping

SimicsSimics

Target HW

Target OS

Programs

link

Target HW

Target OS

Programs

service node

Target HW

Target OS

Programs

10.10.0.50

10.10.0.51

10.10.0.5210.10.0.2


Simulated Router for Simulated Networks

• Implemented in service node

• Member of multiple simulated networks

• Can route to the outside world using a real-network connection

SimicsSimics

Target HW

Target OS

Programs

link0

Target HW

Target OS

Programs

service node

Target HW

Target OS

Programs

10.10.0.5010.10.0.51

10.11.0.10

10.10.0.2

10.11.0.3

Target HW

Target OS

Programs

10.11.0.11

link1


SimicsSimics SolutionDebugging

Profiling

Fault Injection


Tracing

Test Driving

Timing Models

GUI Interface

Real Network

Simics Core

Processors Standard Devices Custom Devices

Multiprocessor

Multiple Machines

ScalabilityDistribution

Virtual Memory

Checkpointing

Determinism

Visibility

Advanced Breakpoints

Events

Proven API

Virtual Time

Configuration

32/64-bit Handling

EndiannessHandling

Networks


Programs



• Simics Core– Holds a simulation together– Provides basic Simics API – Set up machine, manage time & events, etc.

• Standard Devices & Processors– Provided by Virtutech

• Custom Devices– Developed by customer or third parties

• Networks– Provided by Virtutech

• Features– Implements user features of simulation– Invisible to running software – Technically identical to devices modules

All modules are equivalent!

All modules are equivalent!


Simics Programming Model

• Object oriented– Objects instantiated from classes– Any number of each class can be used

• Core API– Access to core functions like time, memory simulation,

event scheduling, breakpoints• Module/Object Interfaces

– Attributes that can be read by other objects– Interfaces expose functions for direct calling

• Simics API = core API + supported module interfaces


API Exported from Simics Core

SimicsSimics Solution

Inspection Module

Device Model


Programs

Simics Core

Read memory

Find objects

Schedule callback

Events

Virtual Time

ConfigurationMemory


API Exported from Modules

SimicsSimics Solution

Inspection Module

Device Model


Programs

Simics Core

Call interface functions

Visibility

Configuration

Read registered attributes

AttributesInterfaces

full-system simulation & virtutech simics

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