gaas optoelectronic neuron arrays · we examine general trade-offs between the need to provide gain...

GaAs optoelectronic neuron arrays

Steven Lin, Annette Grot, Jiafu Luo, and Demetri Psaltis

A simple optoelectronic circuit integrated monolithically in GaAs to implement sigmoidal neuronresponses is presented. The circuit integrates a light-emitting diode with one or two transistors and oneor two photodetectors. The design considerations for building arrays with densities of up to o4 cm-2 arediscussed.

1. IntroductionThe two components required for the implementa-tion of a neural network are neurons and connections.In an optical implementation the neurons are typi-cally arranged as two-dimensional arrays that areinterconnected via the third dimension.14 The inter-connections are realized with holograms or spatiallight modulators. We describe neuron arrays fabri-cated monolithically on gallium arsenide (GaAs) sub-strates, with each neuron circuit consisting of alight-emitting diode (LED), one or two photodetec-tors, and one or more transistors. The use of opto-electronic circuits provides the flexibility of imple-menting complex neuron response functions and offine tuning the properties of the neurons, as isrequired by the neural-network algorithm that isbeing implemented.

LED's and laser diodes are the two choices foron-chip light sources. Laser diodes have higher quan-tum efficiency and a more directed beam than LED's,which means higher light efficiency.5 6 Unfortunate-ly, electrical power dissipation is a limiting factor forhigh-density circuits. The maximum current thatcan be drawn to drive either an individual LED or alaser diode is

PmaxA

(VD

where VD is the power supply voltage for each neuron,

When this work was performed the authors were with theDepartment of Electrical Engineering, California Institute ofTechnology, Pasadena, California 91125. S. Lin is now withVitesse Semiconductor, 241 Calle Plano, Camarillo, California93012.

Received 17 June 1992.0003-6935/93/081275-15$05.00/0.© 1993 Optical Society of America.

N is the maximum number of elements, Pmax is themaximum power dissipation per unit area, and A isthe area of the array. The optical power generatedby each laser diode is

Popt,LD = '9LD(I - Ith), (2)

where iLD is the external efficiency and Ith is thethreshold current of the laser diode. Substituting inthe expression for the maximum current, we obtainthe following expression for the total optical powerfrom the chip:

Popt,LDN = 1LD VD -Ith_ -

For typical values (Pma = 1 W/cm 2, VD = 2 V, andIth 5 600 ,uA) the total output power reduces to zerowhen N = 103 and A = 1 cm2 . This is clearly themaximum density of neurons we can achieve if we optfor laser diodes. Because of the absence of a thresh-old current, LED's can operate with small currents,permitting a density of up to 105/cm 2. Thereforethe conclusion is that, if one is interested in high-density arrays that operate with relatively slow switch-ing time, then LED's are preferred.

The other option for the optical output is an opticalmodulator.7-9 The principle advantages of modula-tors derive from the fact that the light source isoff-chip, so that the optical gain can be increasedsimply by making the source brighter without increas-ing appreciably the power consumption on the chip.This permits us to build a higher-density array or toobtain a faster switching time. Moreover, the exter-nal source makes a spatially coherent array possible,which is a necessary property for most adaptiveneural-network architectures. 0 Light sources, suchas LED's or laser diodes, on the other hand, have ahigh contrast ratio, require small driving voltages,have simpler epitaxial structure, and require fewer

10 March 1993 / Vol. 32, No. 8 / APPLIED OPTICS 1275

(3)

critical fabrication steps.7 Moreover, with on-chiplight sources it is generally much easier to build asystem because no external light source, no accompa-nying beam splitter, and no beam-forming optics arerequired, nor is it necessary to tune the sourcewavelength to match the modulators. Therefore, incomparing quantum-well modulators with LED's forbuilding optoelectronic neuron arrays, in principle,modulators outperform LED's in most respects.However, in practical terms, both for building asystem and for fabricating a large array, LED's havestrong advantages. Therefore LED-based neuronscan make it possible in the near future to fabricatelarge dense neuron arrays for applications such asearly vision processing, which do not require holo-graphic adaptation. 1

2. Design ConsiderationsThe neuron performs two basic tasks. First, it calcu-lates a simple nonlinear function, mapping the inputsignal it receives on its photodetector(s) to the outputLED intensity. The most commonly used nonlinear-ity is the threshold function or its close relative, thesigmoidal response.' 2 Other commonly used nonlin-earities are polynomial mappings and bump functions.The neurons we describe perform the nonlinearitywith simple transistor circuits that transform thephotocurrent from the detector to a current that isdrawn through the LED. The circuit shown in Fig. 1implements a sigmoidal response. The LED is drivenby a metal-semiconductor field-effect-transistor(MESFET) whose gate voltage is controlled by aninput circuit consisting of a photodetector and abiasing element. The second function performed bythe neuron is optical gain. This is necessary becauseoptical interconnections are generally lossy, and there-fore the signal level must be restored by the neuralplanes at each stage in order to make the implementa-tion of multilayer networks possible. In this sectionwe examine general trade-offs between the need toprovide gain and the desire to have large dense

vC

Pout

neuron arrays. In Section 3 we describe specificmethods for implementing the threshold function.

A. Interconnection LossThe interconnection loss is determined by a numberof factors, including the type of light source used(coherent versus incoherent), the type of device usedas the interconnection medium (e.g., holographicversus nonholographic), and the architecture of thenetwork (e.g., the number of connections per neuron).The LED circuits that we describe produce spatiallyincoherent illumination. In general, incoherent sys-tems are relatively inefficient because they radiateenergy into a large cone angle, and only a portion ofthe radiated energy is captured by the numericalaperture of the optical system. To determine thedependence of the light efficiency on the number ofconnections per neuron, C, we write the strength ofthe optical interconnection between the ith and jthneurons, 'ij, as follows:

s1ij = noH(C)wqj, (4)

where 9ro is the optical loss (in intensity) obtainedwhen only two neurons are connected, which includesthe numerical aperture loss mentioned above as wellas reflections, the insertion loss of spatial light modu-lators, or the limitation on the diffraction efficiencyowing to the holographic medium. H(C) [H(1) = 1]is a function that contains the dependence on C, and 0

wi < 1 is the normalized weight of the connec-tion.'0

The nonholographic interconnection system isshown in Fig. 2(a). Light with intensity x is emittedfrom the ith LED and is divided into C beams thatimpinge on C different spatial locations on the inter-

0

xVD

Pin

40400

.

000

(a)

00Threshold

X

SWITCHINGCIRCUIT

000DRIVING

CIRCUIT

Fig. 1. Schematic diagram of the optoelectronic thresholdingneuron circuit: VD, power supply voltage; V, decector circuitvoltage; VG, LED-driving MESFET gate voltage.

0

A0

000

Yj

(b)Fig. 2. (a) Nonholographic and (b) holographic interconnectionoptical neural-network implementations.

1276 APPLIED OPTICS / Vol. 32, No. 8 / 10 March 1993

-jvv-

connection medium, one location for each neuronconnected to the ith unit. The interconnectionstrength wij is recorded as the intensity transmit-tance of the medium at each location. The jthneuron collects light from C spatial locations on theinterconnect medium to form its input as follows:

C

Zi = IThijxii=1

C

i= noH(C) : wijxii__l

In this case H(C) = 1/C, since the light from eachLED is divided evenly. The output is at maximumwhenxj=Pandwij= 1for alliandj. Thenzj= LIjP,which implies that the maximum efficiency of theoptical connection is limited essentially by the lossowing to the finite numerical aperture of the system.The best known example of such an interconnectionscheme is the vector-matrix realization of a neuralnetwork.' 3

A schematic diagram for holographic interconnec-tions is shown in Fig. 2(b). Here, light from the ithinput LED is collimated and illuminates a hologramon which G gratings are superimposed. The intercon-nection between the ith andjth neurons is realized byone of the gratings stored in the hologram by redirect-ing the light that is incident from the ith neurontowards the jth neuron. The interconnection weightwij is encoded in the strength of the grating. For aplanar amplitude hologram, its effective amplitudetransmittance as a/function of position x is

tH(X) = 2 [wgjH(C)]'/ 2exp(j2rruix), (6)G

where uij is the spatial frequency of the holographicgrating that connects the ith and jth neurons. Since0 < tH < 1, the amplitude of each grating must besmall enough to enforce this constraint. Since thehologram is formed as an incoherent sum of Gvariables, tH grows in proportion to A/G.2 The re-quirement that tH < 1 is enforced if

H(C) < 17G. (7)

In the simplest case the total number of gratings Gthat are superimposed on the hologram equals C.This is the case of a completely shift-invariant inter-connection pattern with each neuron connected to Cothers that have the same set of weights. In thiscase the efficiency of the connections is identical tothe nonholographic efficiency. On the other hand, ifeach neuron connected by the hologram has a distinctreceptive field, then we need to record a separategrating for each pair of neurons. Therefore G = CN,where N is the number of neurons. In this case,holographic interconnections are inferior to the non-holographic interconnections in terms of light effi-ciency by a factor N, which is typically in excess of 103.Since holographic interconnections are more efficientwith coherent illumination,2 the LED neuron circuitsthat we describe are best suited for holographicshift-invariant circuits (e.g., early vision tasks) or for

nonholographic interconnection schemes for whichspatial incoherence is actually preferable. For theremainder of the discussion we assume that H(C) =1/C.

B. Density of Neurons

The most important consideration in designing theneuron arrays is the density N/A with which they canbe fabricated, where A is the array area. One factorthat limits the density is the geometric limit owing tolithography. For simple thresholding circuits thisgeometric limit can be in excess of 105 neurons/cm 2 .In practice, the maximum permitted electrical powerdissipation per unit area, Pmac, is the limitation.Thus it is important to reduce the power dissipationof each neuron in order to achieve high neurondensities. Since the electrical power dissipation isdue mostly to current flowing through the LED, thismeans that we must be able to use low currents andhence low optical power from the LED. Consequent-ly, the input-light sensitivity needs to be designed tobe as low as possible. The minimum acceptable lightlevel at the input of each neuron is determined by twofactors: the noise level at the input (detector) part ofthe circuit and the nonuniformity in the setting of thethreshold level owing to fabrication imperfections.In the following we present a simple statistical analy-sis that illustrates how the proper input light level isdetermined and that also provides us with an esti-mate for the density of neurons.

We estimate the minimum acceptable input powerlevel by calculating the probability that a neuronmakes an error, Pe, as a function of the optical powerlevels in the system. As the optical input power isreduced, we eventually reach the noise plateau of thecircuit at which Pe increases beyond an acceptablelevel. We assume that the noise can be modeled as aGaussian random variable with zero mean and stan-dard deviation q,, that is added to the signal photocur-rent. To calculate Pea we also need to characterizestatistically the input signal. We assume that eachelement in the previous layer is on, with probabilitypand intensity P. The strength of a connection wi1 is 1with probability q, and it is zero with probability1 - q. The input signal photocurrentyj = pDz3 is thesum of C independent random variables. For largeC, its distribution can be approximated by a Gaussianowing to the central limit theorem.'4 ID is thedetector efficiency in amperes per watt. Using Eq.(5), we can then calculate the mean py and thevariance UY2 of the photocurrent as follows:

PUY = C E WijXi = TjDTOPpq,

(DI 02

= ( C)E p( -)( ) -

- (,qDq0p pq(1- pq).


I.- , �j 11

With these assumptions, Pe can be written as follows:

PI= 2 [oror exp- 2 2]

X PE 2y2]

1 [ (n - t)21

Ifexp [ - 2 dn (9)oy2

where t is the threshold level for the photocurrent.We can find a closed form solution for Eq. (9) for thespecial case (which is incidentally the worst case) inwhich the threshold t is set at the mean of the inputdistribution py. In this case the probability of erroris

Pe tan-' (10)

Pe is specified by algorithmic considerations,whereas on is affected by the device fabrication process.Given Pe and Un, we can either solve Eq. (9) or use Eq.(10) to determine numerically the ncessary Uy. FromEq. (8) we see that with 'ro, NrD, p, and q given, weadjust Uy so that it satisfies the required probability oferror P by selecting the appropriate value for thequotient P/JV/. The variables N and P are alsoconstrained by the maximum permissable electricalpower dissipation per unit area Pma:

Pm.A = NPVD/'qLED, (11)

where VD is the power supply voltage in the LEDcircuit, A is the area of the array, and riLED is the LEDefficiency in watts per ampere. From Eqs. (8), (10),and (11) the maximum density of neuron circuits N/Ais obtained by

N/A = |1 A [pq(l - pq)]1/2tan(1rrPe) .

and q). As an example, suppose that we want tobuild a network with N = 104 neurons and C = 103connections per neuron in an area A = 1 cm2.Suppose further thato = 0.1 ,qLED = 0.01 W/A, N1D =0.5 A/W, Pmax = 10 W/cm2 , V = 2 V, p = q = 0.5, andPe = 0.1. Then we must have the capability tofabricate the neuron arrays with sufficient unifor-mity and low enough noise so that ,, 1 nA with acorresponding P = 5 W.

C. Speed ConsiderationsThe analysis in Subsection 2.B leads us to the conclu-sion that we must use as low an optical power aspossible to maximize the density of neurons, in whichthe minimum acceptable power is determined by thenoise in the circuit. The price that we must pay forthe higher density is slower speed. This trade-offmanifests itself in two ways. First, the time re-quired to charge the various components of thecircuit (the detectors and the gate of the MESFET) isinversely proportional to the available photocurrent.15

Second, since the detector noise is proportional to thesquare root of the bandwidth and since we use smallsignal levels, we are forced to use slow speeds toreduce the noise to satisfy Eq. (9). We made prelimi-nary temporal measurements, which indicate thatthe switching time of these devices is of the order of10 jis for input optical powers that are consistentwith the density requirement obtained by Eq. (11).

3. Optoelectronic CircuitIn this section we describe the fabrication and theperformance of three different implementations ofthe circuit shown in Fig. 1. We begin with a descrip-tion of the LED and MESFET fabrication and designbefore describing the complete circuit.

A. Light-Emitting-Diode FabricationThe light source in our optoelectronic neurons isimplemented with double Zn-diffusion LED's; theLED cross-sectional structure is shown in Fig. 3.The epitaxial layers consist of a double-heterojunc-tion n-AlGaAs/p-GaAs/n-AJGaAs sandwiched be-tween two n-GaAs contact layers. The p-n dioderequired for the LED is achieved by duffusing Znselectively through the top n-AlGaAs layer to convertit from n-type to p-type. To improve the current

(12)

For a fully connected feed-forward network, eachneuron is connected to all neurons in the previouslayer, i.e., C = N. In this case

N/A = ( V a [pq(1 pq)]1/tan(7rPe)

(13)

The above equations let us determine the density ofneurons that can be fabricated with LED circuits,given the device limitations (n, Pmacx, VD, A, 1D, 10,and ILED) and the algorithmic specifications (Pe p,

n-GaAs

Fig. 3. Cross section of the LED structure, employing double Zndiffusion.


confinement so that carrier recombination takes placeunderneath the LED emitting window, a double-diffusion technique is employed. LED's fabricatedby this technique have the advantage of separatingspatially the top electrodes from the carrier recombi-nation region, thus permitting a higher externalefficiency for the LED's. This improvement is espe-cially important when one considers that the criticalangle for the photons impinging on the GaAs/airinterface is only 16.70, which accounts for most of theloss of photons. Despite this improvement, most ofthe generated photons suffer a non-negligible absorp-tion loss because the minority carrier injection takesplace at the bottom p-GaAs/n-AlGaAs heterojunction.This absorption can be minimized by decreasing theGaAs-layer thickness. However, interfacial recombi-nation, which contributes to nonradiative recombina-tion and reduces the overall quantum efficiency,becomes significant if the active-layer thickness is toosmall. Thus there is an optimal thickness for theactive layer. Figure 4 is a theoretical plot of thedependence of external efficiency on the LED active-layer thickness for typical absorption lengths andinterfacial recombination velocities.' 6 The twocurves show the improvement that can be obtained byadding an antireflection coating to the LED window.

The fabrication of the double-diffusion LED beginsby first isolating each LED electrically using a conven-tional wet etchant that stops in the bottom n+-GaAslayer, followed by a blanket deposition of Si3N4, whichserves as the diffusion mask for Zn. A window forthe Zn diffusion is defined by opening the nitride overthe LED mesa by using a CF4 dry-etching techniqueand removing the top n+-GaAs layer to minimizeabsorption. Zn diffusion is performed by placing thesample and the ZnAs2 in a quartz ampoule, which isthen sealed under high vacuum. The ampoule is

0.016

*-4"-4

9)

0.012

0.008

0.004

0.000 I '0.00000

then inserted in a 640'C furnace for 15 min. to permitZn to diffuse into the p-GaAs active layer. After thefirst diffusion is completed, a larger nitride window,which encloses the original nitride window definingthe first diffusion area, is opened using the samedry-etch technique. The LED sample and the Zn-diffusion source are again sealed in the ampouleunder high vacuum. The duration of the seconddiffusion is calculated such that the diffusion front isproperly placed in the top n-AlGaAs layer. It isextremely critical that during this step the seconddiffusion front does not extend into the p-GaAs layer,nor does it stop in the top n+-GaAs layer so thatcurrent can be channeled spatially through the mid-dle of the LED. After the double Zn-diffusion pro-cess is completed, n- and p-type ohmic contacts aredefined by first removing the nitride over the unex-posed contact area and then by evaporatingAuGe/Ni/Au and Ti/Au, respectively, to metalize thecontacts.

The external efficiency of the LED fabricated by thedouble Zn-diffusion process was measured to be 0.01W/A. This is a 55% improvement over the efficiencyof LED's with a single Zn-diffusion process (Ref. 15,p. 73). This improvement indicates the effectivenessof channeling the current through the middle of theLED, thus permitting more photons to be emittedinto the air.

B. Fabrication of Metal-Semiconductor Field-EffectTransistors

Figure 5 shows the epilayers for the recessed gateMESFET used in our circuits. The top n+-GaAslayer is added to make ohmic contacts and to reducethe parasitic gate-source resistance. The channelregion is etched through the n+ layer to the n- layerbelow it until the MESFET becomes an enhancementmode transistor; i.e., the channel is pinched off with 0V on the gate and conducting when the gate voltagebecomes positive. To fabricate the MESFET, wefirst deposit a uniform layer (102 nm) of Si3N4, andthen we open two windows in the silicon nitride witha CF 4 plasma etcher for the source and the drainohmic contact regions. AuGe/Ni/Au metals areevaporated onto the wafer for the source and thedrain contacts using a standard lift-off technique forpatterning. The ohmic contacts are alloyed at 430'Cfor 4 min. The next step defines the gate-recessregion by opening a window in the silicon nitride.Using the silicon nitride as a mask, we use a wet-chemical etchant, consisting of NH40H, H20 2, andH20, to remove the n+ layer in the gate region and the

Source Gate Drain

0.00010 0.00020 0.00030 Nitride .ntGaAs

Active-layer thickness (cm)

Fig. 4. LED external efficiency both with and without antireflec-tion coating as a function of the active-layer thickness with anonzero absorption coefficient and an interfacial recombinationvelocity.

n-GaAs -

Semi-insulating GaAs substrate

Fig. 5. Self-aligned and passivated MESFET with a recessedasymmetric gate.


V-- EnI

recess of the n-channel. The (which the channel is pinched offdetermined by measuring pericdrain current while etching. evaporate Ti/Pt/Au to form thself-aligned manner with respectdimensions of the gate are 7 pm

Figure 6 shows the I-V curvseries with a double-diffusion:

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.51-0

[A

1 2 3 4 5

Volts(a)

30 -

20-

10

0 I

-10

-20 -

-30 -

-40 -

-50 | 1 | 1 l l l

exact etch depth at described above. A transconductance of 30 mS/mmat zero gate bias is and a source-drain breakdown voltage of 4 V were

idically the source- measured. The initial offset in the drain-sourceThe final step is to voltage is due to the turn-on voltage of the LED.Le gate contact in a These results were consistent with expectations ex-to the source. The cept for the relatively low breakdown voltage of 4 V.< 100 pAm. This was probably caused by surface-induced insteade of a MESFET in of bulk-induced breakdown, and perhaps it was aLED, fabricated as result of dirt particles in the vicinity of or underneath

the gate. The transconductance of 30 mS/mm corre-sponds to a 1 mA current swing for a 0.3-V swing in

l I l l the gate voltage. For the neuron circuits that we arebuilding the required LED current is less than 1 mAper element, and detector circuits can be designed toproduce a 0.3-V swing. Therefore a single MESFETis sufficient to drive the LED. Moreover, the trans-conductance of the MESFET can be increased easilyby reducing the gate length and by increasing thewidth, if needed. For this reason, MESFET's areexcellent candidates as LED drivers. When we con-sider a larger two-dimensional array, gain nonunifor-mity from device to device becomes an importantconsideration. The material structure for the com-

/ _ plete circuit has the epilayers for the LED on top ofthe MESFET structure described above. Therefore

//1 we need to etch through 2.55 pm of material just toreach the n+ layer of the MESFET. This deep etch

_ introduces nonuniformity in the MESFET channelthickness, which in turn produces gain variations.

6 7 8 9 1D This can be improved by controlling the etch morecarefully or by inserting an AlAs stop-etch epilayerabove the MESFET structure. With this layer, selec-tive etchants that do not etch ALAs but do etch GaAs

l l I and vice versa can be used to define the top ofI MESFET accurately.17

-5 -4 -3 -2 -1 0 1 2 3 4

Volts(b)

Fig. 6. (a) Common-source I-V characteristicsshowning a breakdown voltage of 4 V. The

C. Switching Characteristics of the Neuron CircuitThe basic circuit for implementing a thresholdingfunction with optical inputs and optical outputs isshown in Fig. 1. The gate voltage Vg, on the drivingMESFET is controlled by the input circuit, whichconsists of a photodetector acting as an optical inputport and a biasing element, which can be either aphotodetector or a transistor. The switching charac-teristics of the circuit are determined by the I-Vcharacteristics of the photodetector and the biasingelement. Figure 7(a) shows the load-line curves forthree different light intensities illuminating the pho-todetector and two different bias levels. The intersec-tion point on the I-V curves for the photodetector andthe biasing element determines the node voltage Vg.When the current in the photodetector exceeds thethreshold current set by the biasing element, the gatevoltage switches from ground to Vdd, which, in turn,switches on the driving MESFET. This causes cur-rent to flow through the LED and the output lightintensity to increase to its high value. Vg as afunction of input light intensity is shown in Fig. 7(b).

Since the current through the LED is roughlyproportional to V, the nonlinear input-output rela-tionship is determined almost exclusively by the

5

of a MESFETinitial turn-on

voltage of 1 V is due to the LED, which is in series with theMESFET. The scales are 500 [LA/division vertically and 1V/division horizontally. (b) Reverse breakdown characteristics ofthe gate-drain Schottky diode (first quadrant) and the gate-sourceSchottky diode (third quadrant). The scales are 10 A/divisionvertically and 1 V/division horizontally.


40 I I I I

[A

Pin3

P in2

Pinl

P in= 0

I DSP in4

_ VB2

VB1

* G

(a)

(b)Fig. 7. (a) I-V characteristics of the input switching circuit in theMESFET-based neurons with a different biasing voltage applied tothe gate of the loading MESFET, (b) the gate voltage on the drivingMESFET as a function of the optical input, where IDS is the currentthrough the threshold MESFET or the photodetector, VB1 and VB2are two different gate voltages on the threshold MESFET, and A-Ein (a) and (b) indicate identical operating points.

input circuit. The sharpness of the threshold func-tion shown in Fig. 7(b) is determined by the relativeflatness of the I-V curves of the two devices in thesaturation regime. The threshold becomes sharperas the output impedance of the devices in the satura-tion regime becomes larger. Specifically, the transi-tion region of the threshold function is

RD +RBAg RD +RB I1AP ( 14)

where AVg (up to 0.5 V) is the voltage swing on thegate of the driving MESFET and RD and RB are theoutput impedances of the photodetector and thebiasing element, respectively. The leakage currentthrough the gate of the driving MESFET also affectsthe switching characteristics of the circuit. Theextra current that is drawn through the gate needs tobe supplied by extra photocurrent, which tends toincrease the optical threshold level. The gate-source leakage current that we measure in ourMESFET's (using Ti/Pt/Au Schottky contacts) is10-100 nA for gate voltages up to 0.5 V. From ourdiscussion in Section 2, noise considerations dictatethat the minimum workable photocurrent be severalmicroamperes. This becomes the limiting factor forcircuits with low detector efficiency and high leakagecurrents.

In most neural-network implementations the neu-ron outputs or the weights are bipolar values. Sincethe LED's are incoherent-light sources, only positive

values can be implemented directly with these circuits.In most cases it is possible to work with unipolarneuron activation functions. But it is necessary tohave bipolar weights.1 812 There are two ways torepresent bipolar signals in an incoherent system.The first method is to add a constant bias to all thebipolar weights before they are recorded in the opticalsystem. In this case the input signal to each neuronis a positive quantity with the desired bipolar signalriding on a bias. In our circuits the control signal(either optical or electronic) on the biasing elementadjusts the threshold of the circuit. The secondmethod for representing bipolar signals consists ofseparating spatially the recorded positive and nega-tive weights. The inner product between the inputvector to the neuron and each of the two sets ofweights is formed separately, and the results aresubtracted electronically before thresholding. Thecircuits we describe here can be used in this mode ifthe biasing element is also a photodetector, identicalto the input detector. The positive signal P isrouted to the signal port, and the negative signal P isrouted to the biasing port. The gate voltage Vgsaturates at VD (or ground) as P+ - P- gets large andpositive (or negative). When P = P-, Vg = VD/2.Therefore the circuit implements a sigmoidal func-tion on the difference P+ - P-, as desired.

In the following we describe three different mono-lithically integrated neuron circuits based on theLED as the optical output and a MESFET as theamplifying transistor. The circuits differ in the typeof photodetector used. The three photodetectorsthat we investigate are a bipolar phototransistor, ametal-semiconductor-metal (MSM) detector, and anoptical field-effect transistor (FET).

1. Phototransistor-Based Neuron CircuitThe phototransistor is a bipolar junction transistorwithout an electrical base contact.19 The structureof the phototransistor incorporated in our circuits isshown in Fig. 8. It consists of a lightly p-doped GaAsbase layer sandwiched between two higher-band-gapn-doped AlGaAs layers, which are the emitter and thecollector of the transistor. Light incident upon thephototransistor window first traverses the transpar-ent higher band-gap emitter region and then isabsorbed in the lower band-gap base layer. Thecarriers generated in the base modify the base-emitter junction potential such that more electronsare injected from the emitter to produce a largecollector current. The overall efficiency of the deviceis 'D = ', where -q' is the quantum efficiency, or thefraction of electrons generated from each incomingphoton in the base, and 3 is the transistor common-emitter current gain.20 The base-layer thickness is acritical parameter in determining the overall detectorefficiency. If the base layer is thin, the current gain13 is large, but the amount of light absorbed is small.Likewise, if the base is thick, the amount of lightabsorbed is high, but the current gain is low. Bylowering the doping concentration of the base layer,


2 0 I I I I I I I I

180 -

I

Ii.n 4JaAs Subcollector

Semi-insulating GaAs Substrate

160 F-

1401-

120 -

100 F-

Emitter 801F

60

40

20

0 L.

0 2 4 6 8 10 12 14 16 18 20

Fig. 8. Structure of a double-heterojunction phototransistor incor-porating a p-doped GaAs layer as the base.

we can increase the thickness without decreasing thecurrent gain significantly. However, one drawbackof low base doping is that the early voltage is low,which corresponds to low output impedance. Thisdecreases the sharpness of the switching curve.

The base layer was designed to be 1.5 [lm thick anddoped p-type to a concentration of 1016 cm-3. Then+-GaAs layers act as emitter and collector ohmiccontacting layers. The side wall of the phototransis-tor was passivated with a Si3N4 dielectric film. Inthe window area for detecting the incoming photonsthe absorbing n+ ohmic cap layer was removed bywet-chemical etching. The I-V characteristics of thephototransistor were obtained by illuminating thedevice with a beam from a GaAs laser diode, withknown intensity, and by measuring the emitter-collector current. The result is shown in Fig. 9.The relatively low output impedance (175 kfl) is dueto the low base doping. The external quantumefficiency NQD was approximately 1 A/W, measured fora collector-emitter voltage of 4 V and a 90-pWincident optical power. The relatively low gain isbecause of the thick base layer. In the integratedcircuit the base layer of the phototransistor is sharedwith the active layer of the LED. Thus the designedthickness for the base was a compromise between theefficiencies of the phototransistor and the LED.

Figure 10(a) shows the circuit diagram for theneuron circuit incorporating a bipolar phototransis-tor as the detector, a MESFET to set the thresholdfor the circuit, the LED-driving MESFET, and theLED. Figure 10(b) is the cross-sectional view of themonolithically integrated device.2 ' The undopedlayer on top of the semi-insulating substrate acts as abuffer. The MESFET's are fabricated in the twon-GaAs layers above the buffer layer, with the n+-GaAs layer used for source and drain contacts, and

VoltsFig. 9. I-V characteristics of the phototransistor. The intensityof the incoming laser beam is 90 ,uW. The scales for the verticaland horizontal axes are 20 pA/division and 2 V/division, respec-tively.

the n-GaAs layer used for the MESFET channel.The MESFET fabrication is described in Subsection3.B. The N-p-N heterostructure that is grown abovethe MESFET layers is used to fabricate both thephototransistor and the LED. As described in Sub-section 3.A, the LED is formed by a double Zn-diffusion process to convert selectively the top n+-GaAs and n-AlGaAs layers to p-type. The processingof the complete integrated device involves nine mask-ing steps. The first two steps are wet-chemicaletches to define and isolate the individual compo-nents, followed by two ZnAs2 diffusions for the LEDand the metalizations for the ohmic and Schottkycontacts. The connection between the LED cathodeand the MESFET drain is made through the sharedn+-GaAs, whereas metalization was used for all otherconnections. Figure 11 is a photomicrograph of asingle phototransistor-based neuron circuit.

The input-output relationship of the neuron, shownin Fig. 12, was obtained by measuring the LEDcurrent as a function of the laser power incident uponthe phototransistor. The gate on the loadingMESFET was left floating to reduce the gate-drainleakage current in the loading MESFET. The mea-sured LED current was converted to optical outputpower by using the LED efficiency of 0.01 W/A,determined from measurements on the double-diffusion heterojunction LED experiments. Measur-ing the current through the LED rather than theemitted optical power eased the practical problems ofsimultaneously detecting the output optical signaland illumating the optical input detector. The opti-cal threshold level was 1 W, and a APin = 0.2 1.Wincrease in the input power resulted in an 8-VLWincrease in the optical output power. The LED


In+GaAs Cap -

Siliconnitride

Collector

= M

1. n-AIGaAs Emitter

p-GaAs Base

.~~~~'. I P~~~~~~~~I n-AtGaAs Collector

I I I I I I I I

I

I,

200

pA

VD

Pout JVf

DoC1

Pout

Undoped GaAs

RIVING SWrICHINGRCUIT CIRCUIT

(a)

'm

GaAs Semi-insulating Substrate

LED Driving Biasing PhototransistorMESFET MSFET

(b)Fig. 10. (a) Schematic circuit diagram of the optoelectronicneuron that incorporates two MESFET's, a phototransistor, andan LED; (b) the cross-sectional view of the MESFET-based optoelec-tronic neuron monolithically integrating two MESFET's, a LED,and a phototransistor.

current during the on state of the neuron was mea-sured to be 0.8 mA. Therefore the electrical powerdissipation per neuron was 1.6 mW with a 2-V powersupply. The switching time of the neuron was mea-sured by applying an electrical square-wave signal tothe laser diode. A rise time of 65 s was obtainedwhen the neuron was illuminated with a laser pulse ofintensity slightly higher than 1 p.W.

2. Metal-Semiconductor-Metal-Detector-BasedNeuron CircuitThe disadvantage of the phototransistor is that it isfabricated in the same layers as the LED, thusmaking it difficult to optimize the circuit. We canovercome this difficulty by using MSM photodetec-tors, which we can fabricate in the undoped bufferlayer.22 The MSM's are fabricated by depositingTi/Pt Au metal Schottky contacts on the undopedGaAs. This forms two Schottky diodes back to back.Optically generated electron-hole pairs in the deple-tion region of the reverse-biased Schottky diode arecollected at the electrodes. Therefore the MSM detec-tor operation is similar to that of a p-i-n diode. As isthe case for the p-i-n diode, the external efficiency ofthe MSM detector cannot be larger than 100%.

Fig. 11. Photomicrograph of a completely fabricated optoelec-tronic neuron. The input switching circuit is on the right side ofthe picture, and the output driving circuit is on the left side of thepicture. The lower-left square is the LED, which is monolithicallyconnected to the drain of the driving MESFET. The gate of thesame MESFET is controlled by the combination of the phototrans-istor located at the lower-right corner of the picture and the loadingMESFET, which is located immediately above the phototransistor.The windows of the LED and the phototransistor are 40 pm x 40pm and 60 pim x 80 pm, respectively.

However, the MSM detector has an advantage in thatthe only epilayer required is the buffer layer, which isnot shared by any other devices in the neuron. Theelectrodes are patterned as interdigitated fingers, 4,um wide and 6 pm apart with an active area of 40pum x 40 pm. With 3 V applied to the detector the

measured external efficiency was 0.3 A/W.Figure 13(a) shows the circuit diagram with the two

MSM photodetectors, one for the optical input signaland the other for the optically controlled biasingelement. The cross section of the processed epilay-ers is shown in Fig. 13(b). To fabricate the circuit wefirst defined the LED, the MESFET, and the MSMdetectors through a series of wet-chemical etches.Then a layer of Si3N4 was deposited for surfacepassivation and insulation. The Si3N4 was removedselectively for the MESFET channel region, the LEDwindow, and the ohmic contacts. AuGe/Ni/Au lay-


-iVy- in

VC

10.0 . . . . .

0 8.0

P4I.0

01

4.0

0 20. 2.0

0.0 I

0.0 1.0

Pi., Optical InputFig. 12. Input-output relationship ofMESFET-based optoelectronic neuron.

VC VD

P1

Q\Jr\J_

2.0

Power (W)the phototransi:

Pout

/vN-,-

ers were deposited for the n-ohmic contact, followedby a deposition of AuZn/Au for the p-ohmic contact.After deposition, the contacts were alloyed at 430'C.The gate region of the driving MESFET was recessedas described in Subsection 3.B so that the MESFEToperated in the enhancement mode. The entirefabrication process requires nine masking steps.The LED in this MSM-detector-based neuron is fabri-cated directly on a double-heterojunction P-i-N struc-ture without the double-diffusion process. The max-imum efficiency obtained was 0.00 1 W/A owing to thelack of current confinement. Therefore we opted forthe double-diffusion process in all subsequent LEDdevices. The size of the gate region was 6 [im x 60Vim, the LED window was 30 jim x 30 jim, and theoverall neuron area was 200 jim x 150 jim, whichincluded the area for probe pads.

To test the circuit, we measured the output as a3.0 function of one of the optical inputs while we held the

other one constant. Figure 14 shows the resultswhen P1 and P2 are the optical signals, as shown in

stor- Fig. 13(a). When the two optical input powers areequal, the output light levels switches. The differen-tial optical input power Pin required to turn the LEDon was 0.2 jiW. The time response was not mea-sured for the MSM neurons. But we think the timeresponse is comparable with that of the phototransis-tor-based neuron. This is because the detector effi-ciencies are roughly the same, and the response of theneurons in both circuits is due mainly to the gatecapacitance charging in the MESFET's that drive the

-> LED's.

Drain Current Vs P1for different P2P2

0.20

(a)

AuZn/Au

Siliconnitride

AuGe/Ni/Au

Ti/Pt/Au

SI GaAs substrate

(b)Fig. 13. (a) Circuit diagram for the MSM-based neuron circuit, (b)the cross section of the processed epilayers for the monolithicintegration of the MSM-based neuron circuit.

EIs

C01

0.00

0 1 2 3 4 5

Optical power P (W)

Fig. 14. Output current as a function of input optical intensity fordifferent optically set thresholds.


n+ GaAsn AlGaAs

p GaAsp AlGaAs

p+ GaAsn+ GaAsn GaAs

undoped GaAs

3. Optical Field-Effect-Transistor-Based NeuronCircuitsThe two detectors considered in Subsections 3.C.1and 3.C.2 do not have gain. Thus the neuronsrequire relatively high optical input intensities (ap-proximately 1 uW). In order to increase the density,we need to be able to reduce the optical input lightlevel. This can be accomplished by using a detector,such as the optical FET, that has gain. The opticalFET can be fabricated easily in the same epilayers asthe driving MESFET in the circuit, and as describedbelow, the efficiency for such a device can be as largeas 105 A/W 23

The mechanism of operation of an optical FET isbased on photoconductivity. 24 Electron-hole pairsgenerated by the incident optical signal increase theconductivity of the channel. If the transit time forthe electrons to cross the region is short comparedwith the lifetime of the holes, then the detectorefficiency can be much greater than 1 A/W. Theexpression for drain-source current is

I Th I'Pin, (15)

where Th is the hole lifetime, t is the electron transittime, and a' is the quantum efficiency. The gain ofthe optical FET detector is maximized if the gapbetween the source and the drain is small. However,there is a trade-off since this same gap is the opticalwindow of the device, and we want this to be largeenough to permit sufficient input light to be detected.

Figure 15 shows the cross-sectional structure of anoptical FET. Since it is similar to the conventionalMESFET, its fabrication is identical to that of aMESFET, except that the gate metalization is notdefined. The channel thickness, determined by therecessed etch, controls the sensitivity and the darkcurrent. As the photoconducting channel gets thin-ner by etching, the photoconductivity starts to decreas-ing owing to the smaller absorption region. As aresult, the optical gain decreases gradually. Thedark current is proportional to the cross-sectionalarea of the channel, and therefore it also decreases asthe channel is etched. Eventually, only the surfacedepletion region remains. Figure 16 shows the mea-sured efficiency as a function of the input opticalpower for four different dark currents, which corre-spond to four different channel thicknesses.

SourcePin

in-i

ntGaAs - \ I I

n-GaAs - ids t_ d L IdsSurface depletion


Fig. 15. Cross-sectional view of an optical FET, where Ids is thedrain-source photocurrent.

400 -

350

' 300

C)

9 250c)

E5 200

L 150

c04:0 100 0~

50

10-2 lo-l 10° lo, 102

Lager input power (W)

Fig. 16. Efficiency of the optical FET as a function of input lightintensity. The four curves correspond to four different darkcurrents, which correspond to the four different recessed depths.

The fabrication steps incorporating the opticalFET as the detector and a MESFET as the biasingelement for this particular neuron circuit are similarto those of the circuits described above. The onlydifference is in the definition of the optical FET.The complete fabrication process requires nine mask-ing steps, as shown in the cross-sectional view of thecircuit in Fig. 17. Even though the MESFET's andthe optical FET's share the same epilayers, the recessetch for each device was performed separately toensure that the MESFET was correctly pinched offand that the optical FET had the proper dark current.The circuit used the double-diffusion heterojunctionLED as the optical output. In testing the neuroncircuit, we left the gate of the loading MESFET in theinput circuit floating to minimize the gate leakagecurrent. The optical input-output characteristicsare shown in Fig. 18. Because of the insufficientrecess in the gate of the output driving MESFET, thisMESFET was not pinched off at zero gate bias. As aresult, a current flowed in the output circuit with zeroinput power on the detector. This caused a nonzeroLED output power at zero input power. In a prop-erly fabricated device the channel of the LED-drivingMESFET would have been etched further until thecurrent was close to zero at zero gate bias. Neverthe-less, the output rose by 4.3 jiW over an input powerswing of 54 nW. The measured rise time of theneuron was 700 jus. The minimum input powerneeded for turning the neuron on dropped signifi-cantly, from the 1-pW regime down to the 1-nWregime. This is attributed to the higher efficiency ofthe detector. During the on state of the neuron thetotal current drawn by the LED was 0.9 mA, whichimplied an electrical power dissipation of 1.8mW/neuron with a 2-V power supply.


Pout

_ :Interconnectand gatemetalization

ntGaAs An-AIGaAsp-GaAs -.

n-AlGaAs VD

n+-GaAs -

n-GaAs --

.doped GaAs -=_

Silicon nitride

Zn diffusion

AuGe/Ni/Au

Ti/Pt/Au Pin

VC


LED Driving Biasing OPFETMESFET MESFET

Fig. 17. Complete device cross-sectional view of the MESFET-based optoelectronic neuron incorporating the optical FET (OPFET) as thedetector.

4. Bipolar Transistor-Based Neurons

Optoelectronic neuron circuits can also be fabricatedwith bipolar transistors. Bipolar transistors are ame-nable to this type of integration2 5 because theirmaterial structure is similar to that of the LED andthe phototransistor. Since the LED requires a dou-ble heterostructure for carrier confinement, the samematerial can be used to fabricate both double-heterojunction bipolar transistors and phototransis-tors. The requirements on the types of dopants forboth devices can be simultanteously met by havingthe initial structure consist of a standard N-p-NDHBT structure and then by converting the topn-type high band-gap ALGaAs layer to p-type throughZn diffusion to form the LED structure. However,there is a performance trade-off between the LED andthe transistors as a result of sharing the sameepitaxial layers required for monolithic integration.This compromise arises because the p-GaAs is sharedby all three devices.26 For the photodetector this

10.0

004

P4

Pi

9.0

8.0

7.0

6.0

5.0

4.00.0 40.0 80.0

P,., Input Power (nW)

Fig. 18. Input-output characteristics of the MESFET-based opto-electronic neuron that incorporates the optical FET.

p-GaAs is the absorption layer, which needs to bethick to permit the complete absorption of incomingphotons. However, for the transistor this layer isthe base, which should be as thin as possible tomaximize the current gain. Similarly, the LED can-not be too thick or too thin, as the self-absorption orthe interfacial recombination will dominate the pro-cess. Thus the thickness of the p-GaAs layer needsto be chosen carefully so that the overall performanceof the neuron, not of each device, is maximized.

Figure 19(a) shows the neuron thresholding circuitimplemented in a Darlington-pair bipolar transistorconfiguration. The threshold is provided by apply-ing a reverse-biased current Ibb on the base of thetransistor such that the transistor does not turn onuntil the photogenerated current has exceeded thereverse-biased current. As the photocurrent is fur-ther increased, the transistors amplify the signalreceived to produce an output current that drives theLED. This process continues until the transistorssaturate, which causes the neuron to saturate as well.Figure 19(b) shows the cross section of the epitaxiallayers shared by the three devices. Isolation be-tween devices is achieved by etching down to thesemi-insulating substrate. For the integrated tran-sistor, Zn diffusion is used to contact the base of thetransistor. This also serves as a necessary step inconverting the n-AlGaAs upper-cladding layer top-AlGaAs, thus forming a P-i-N diode for the LED, asdiscussed in Subsection 3.A.

The current gain of the circuit has to be largeenough to compensate for all losses, including thosein the hologram, the detector, and the LED. Inorder to cascade layers without any attenuation, thefollowing relationship is mandated:

(1H)(T)(rL)(I) 1, (16)

where NH is the efficiency of the hologram that


==

n-GaAs

n-AlGaAs

p-GaAs

n-AIGaAs -

n-GaAs

ud-GaAs ,Ibb

SI GaAs Substrate

(hy

Fig. 19. (a) Schematic circuit diagram of an optoelectronic neuron incorporating two bipolar transistors (Q1 and Q2) to provide the gainneeded to satisfy the loop gain requirement; (b) cross-sectional view of the monolithically integrated optoelectronic neuron that consists oftwo Zn-diffusion double-heterojunction bipolar transistors, which form a Darlington transistor pair, and an LED.

specifies the interconnection, NQD is the detector effi-ciency, and XL is the efficiency of the LED. For `IH =

0.1, QD = 0.3 A/W, and iqL = 0.01 W/A, the currentgain Ip has to be at least 3333. A logarithmic plot of 13for a single double-heterojunction bipolar transistorthat we fabricated, as a function of the collectorcurrent, is shown in Fig. 20 for two different collector-emitter voltages. The maximum current gain ob-tained is in excess of 500, but it is obtained at Ic = 102mA. The dependency of on the collector current isdue to the recombination in the depletion region ofthe transistor. Approximately, the relationship canbe expressed as

P Icl-(lln) (17)

where n is the ideality factor for the base-emitterjunction, which ranges from 1 for the ideal junction to2 for the nonideal junction.28 The case of n = 2corresponds to the situation in which the base cur-rent is dominated by recombination taking placethrough deep-level traps in the space-charge region.The dependency of onlc that we measure experimen-

103

zuJc:

ac-

ul0

z0

0

102

0-1 1 10 10 2COLLECTOR CURRENT (mA)

Fig. 20. Common-emitter current gain as a function of thecollector current at VCE = 3 V and VCE = 4.5 V.

tally conforms to the theoretical prediction with anideality factor n 1.3. With the Darlington pair wecan obtain current gains in excess of the required3000, since its current gain is the product of the gainsof the two transistors. The maximum current gainthat we were able to obtain experimentally with theDarlington pair was 6000. This gain is marginallysufficient to permit cascading of such neurons.However, the current level at which this gain isobtained is 20 mA. With a 5-V power supply theelectrical power dissipation is 102 mW/neuron, whichseverely limits the density of neurons. As a result,the MESFET-based circuits proved more suitable forthe high-density low-power low-speed operation thatis required for the neural-networks application.

5. Discussion

In Section 2 we derived Eq. (12), which obtains themaximum density of neurons that can be built giventhe parameters of the circuit and the optical systemand also the requirements of the system. Above, weexamined specific optoelectronic neuron implementa-tions; here, we re-examine Eq. (12) and discuss whatwould be a practical upper limit for the density withour approach. In the example used in subsection 2.Ba density of 104 neurons/cm 2 and 103 connections perneuron could be achieved if 'rLED = 0.01 W/A, 1D =0.5 A/W, and r, = 1 nA. We saw in Subsection 3.Athat it is possible to fabricate integrated circuits withLED's that have efficiencies equal to 0.01 W/A usingthe double-diffusion process. We also saw that NrD =0.5 A/W was achievable with MSM detectors. There-fore, if the noise level in the MSM circuit is a,, = 1 nA,then the density of 104 neurons/cm 2 can be achieved.However, we also saw that it is possible to obtain1D >> 1 with the optical FET's. Therefore, if thenoise were the same when optical FET's are used, wecould build arrays that are much more dense.Unfortunately, the situation is complicated by thefact that an, does depend on the choice of detector.The principal contributions to a,, are thermal noise,shot noise, and nonuniformities in device sensitivity


VCE=4.5V

VCE =3.0V

101-

, ,

-V\J-pout

{a

1

across the array. If we increase the device density inproportion to the increase in detector efficiency, thenthe average photocurrent [pt, in Eq. (8)] remainsconstant. Therefore the shot-noise component con-tribution to a,, stays the same. However, the ther-mal noise and the variations owing to nonuniformi-ties would be larger for the optical FET circuit. Inour current optical FET-based neurons, the domi-nant source of noise is due to the nonuniformities insensitivity. This is because we use a wet-etch pro-cess to define the channel thickness of the opticalFET, which determines the FET's sensitivity. Inthis case the average noise is proportional simply tothe average signal level, (,, = ala)y, where the propor-tionality constant a is determined by the uniformityof the etch. Combining this relationship with Eqs.(8) and (10), we can derive the following result:

C [tan(____)_ 1 -;pq (18)

which obtains a direct estimate for the connectivitythat can be supported, but not the density of neurons.To determine the density, we need to know theminimum a,, directly, which in practice is given by thedetector noise floor. Suppose that we want to imple-ment an optical FET-based neuron with N/A =10 4/Cm2 , C = 103, 'QD = 500, and with the rest of theparameters the same as before; then the necessary a,,is approximately 1 A. The a necessary to supportthis connectivity is found from Eq. (18) to be equal to0.02, which implies that the responsivity of theoptical FET's should have 2% uniformity. To obtainan estimate for the uniformity that can be obtainedwith commercial GaAs processes, we measured thedrain-source current of 20 MESFET's with the samegate voltage on a chip fabricated by Vitesse throughmetal oxide semiconductor implementations service(MOSIS). The average current was 250 pA, and thestandard deviation was 15 A, which corresonds to6% uniformity for this particular chip. This doesnot correspond directly to a, but it does give anindication of the uniformity we can expect from theoptical FET's. Thus the major challenge in fabricat-ing high-density arrays that can be densely connectedis not only minimization of the power consumption,but, equally important, the uniformity with whichthese arrays can be built.

The support of the Defense Advanced ResearchProjects Agency for this work is gratefully acknowl-edged. We thank the Jet Propulsion Laboratory(JPL) for growing some of the material used in ourwork. Annette Grot gratefully acknowledges sup-port from a National Science Foundation graduatefellowship, and Steven Lin thanks JPL for supportfrom a JPL fellowship. The authors also thank JaeKim, Joe Katz, and Francis Ho for their contributionsin the early phase of this work and Jean-JacquesDrolet for many helpful discussions.

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gaas optoelectronic neuron arrays · we examine general trade-offs between the need to provide gain...

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