gate placement paper electronics communication engineering 20732

7/29/2019 GATE Placement Paper Electronics Communication Engineering 20732

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1/12/13 GATE-Placement-Paper-Electronics-Communication-Engineer ing-20732

placement.freshersworld.com/placement-papers/GATE/Placement-Paper-Electronics-Communication-Engineering-20732 2

Resistance of the bar = [rl/A] = [ l/s . A] [ l/n e n . A]

= 10-3 / (5 * 1020 * 1.6 * 10-19 * 0.13) * 100 * 10-6 * 10-6

= 106 ohm

4. Match items in Group I with items in Group II, most suitably.

Group I Group II

A. LED

B. Avalanche photodiode

C. Tunnel diode

D. LASER

1. Heavy doping

2. Coherent radiation

3. Spontaneous emission

4. Current gain

Codes :

A B C D

(a) 1 2 4 3

(b) 2 3 1 4

(c) 3 4 1 2 (Ans)

(d) 2 1 4 3

Solution : The correct match is give below

LED Spontaneous emission

Avalanche photodiode Current gain

Tunnel diode Heavy doping

LASER Coherent radiation

5. A particular green LED emits light of wavelength 5490 A. The energy band gap of thesemiconductor material used there is

(Planck's constant = 6.626 * 10-34 J-s)

(a) 2.26 eV (Ans)

(b) 1.98 eV

(c) 1.17 eV

(d) 0.74 eV

Solution : l= [C/f] ; [C/l]

E = hf = hC/l= 6.625 * 10-34

* 3 * 108

/ 5490 * 10-10

Jules= 3.62 * 10-19 Jules.

In e V, the energy Band Gap Energy = [E/e]

= 3.62 * 10-19 / 1.6 * 10-19

= 2.26 e V

6. If P is Passivation, Q is n-well implant, R is metallization and S is source/drain diffusion,then the order in which they are carried out in a standard n-well CMOS fabrication process, is

(a) P-Q-R-S

(b) Q-S-R-P (Ans)

(c) R-P-S-Q

(d) S-R-Q-P

Solution : In n-well CMOS fabrication following are the steps

1. n-well implant

2. Source/drain diffusion

3. Metalization

4. Passivation

7. The electron concentration in sample of uniformly doped n-type silicon at 300 K varies

linearly from 1017/cm3 at x = 0 to 6 * 1016/cm3 at x = 2m. Assume a situation that elect ronsare supplied to keep this concentration gradient constant with time. If electronic charge is 1.6

* 10-19 coulomb and the diffusion constant Dn = 35 cm2/s, the current density in the s ilicon,

if no electron field is present, is

(a) zero

(b) -1120 A/cm2

(c) +1120 A/cm2 (Ans)


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(d) -1120 A/cm

Solution : Jn = + q Dn [dn/dx]

[1.6 * 10-19 * 35 * 10-4] * (6 * 1016 - 10+17) / 2 * 10-6

= 1.6 * 10-19 * 35 * 10-4 * [4/2] * 1022

= + 1120 A/cm2

8. At 300 K, for a diode current of 1 mA, a certain germanium diode requires a forward bias of0. 1435 V, whereas a certain silicon diode requires a forward bias of 0.718 V. Under theconditions stated above, the closest approximation of the ratio of reverse saturation currentin germanium diode to that in silicon diode is

(a) 1(b) 5

(c) 4 * 103 (Ans)

(d) 8 * 103

Solution : VT = 300 K

I = 1 mA

For Si, I = I0 Si [exp V/n VT - 1] ; n = 2 for Si

1 mA . = I0 Si [exp 0.718/ 2 * 0.03 -1]

For, Ge I = I0 Ge [exp 0.1435 / 1 * 0.03 -1]

I0 Ge / I0 Si = I0 Ge exp [0.1435 / 1 * 0.03 - 1]

I0 Si = [exp 0.718 / 1 * 0.03 - 1]

I0 Ge / I0 Si = exp [0.718 / 0.06] 4 * 103

exp [0.435 / 0.03]

9. When the gate-to-source voltage (VGS) of a MOSFET with threshold voltage of 400 m V,

working in saturation is 900 m V, the drain current is observed to be 1 mA. Neglecting thechannel width modulation effect and assuming that the MOSFET is operating at saturation,the drain current for an applied VGS of 1400 m V is

(a) 0.5 mA

(b) 2.0 mA

(c) 3.5 mA

(d) 4.0 mA (Ans)

Solution : Given that,

For VT = 400 mV

ID = 1 mA

Vgs = 900 mV

For Vgs = 1400 mV

ID = ?

Using, ID = K(Vgs - VT)2

1 * 10-3 / ID = ( 900 - 400 )2

1400 - 400

1 * 10-3 / ID = 1/4

ID = 4 mA

10. The ac tion of a JFET in its equivalent circuit cab best be represented as a

(a) Current Controlled Current Source

(b) Current Controlled Voltage Source

(c) Voltage Controlled Voltage Source

(d) Voltage Controlled Current Source (Ans)

Solution : For a JEET in active region we have

IDs = IDs (1 - VGS/ VP)2

From above equation it is clear that the action of a JFET is voltage controlled current source

GATE - 2004 One Mark Questions

11. The impurity commonly used for realizing the base region of a silicon n-p-n t ransistor is

(a) Gallium

(b) Indium


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(c) Boron (Ans)

(d) Phosphorus

Solution : Boron is an atom of Group III element, Group III elements are used for making p-type series conducts

12. If for a silicon n-p-n transistor, the base-to-emitter voltage (VBE) is 0.7 V and the

collector-to-base voltage (VCB) is 0.2 V, then the transistor is operating in the

(a) Normal active mode (Ans)

(b) Saturation mode

(c) Inverse active mode

(d) Cutoff modeSolution :

If, VBE = 0.7 V --- Forward biased

VCB = 0.2 V ---- Reverse biased

Transistor operate in normal act ive mode

13. Consider the following statements S1 and S2.S1 : The b of a bipolar transistor reduces if the base width is increased

S2 : The b of a bipolar transistor increase if the doping concentration in the base is increased.

Which one of the following is correct ?

(a) S1 is FALSE and S2 is TRUE

(b) Both S1 and S2 are TRUE

(c) Both S1 and S2 are FALSE

(d) S1 is TRUE and S2 is FALSE (Ans)

Solution : bis the current gain of transistor

1. of a bipolar transistor increase with decrease in base width

2. Thebof the Bipolar transistor increase with lightly doped concentration in base with i.e. iflightly doped less base current

bis high only when base is lightly doped & very thin

GATE - 2004 Two Marks Questions

14. The drain of an n-channel MOSFET is shorted to the gate so that VGS = VDS. The

threshold voltage (VT) of MOSFET is 1 V. If the drain current (ID) is 1 mA for VGS = 2 V, then

for VGS = 3 V, 1D is

(a) 2 mA

(b) 3 mA

(c) 9 mA

(d) 4 mA (Ans)

Solution : VT = 1 V, ID = 1 mA, VGS = 2 V

VT = 1, VGS = 3 V, ID = ?

ID = k (VGS - VT)2

ID2/ID1 = (VGS2 - VT)2/(VGS1 - VT)

2= (3 - 1)

2/(2-1)2

ID2 = [4 / 1] * 1 = 4 mA

15. In an abrupt p-n junction, the doping concentrations of the p-side and n-side are NA = 9

* 1016 / cm3 respectively. The p-n junction is reverse biased and the total depletion width is3 m. The depletion width on the p-s ide is

(a) 2.7 m

(b) 0.3 m (Ans)

(c) 2.25 m

(d) 0.75 m

Solution : Doping width of depletion layer
http://placement.freshersworld.com/placement-papers/sites/default/files/image%20-%20EC%20Egg.%20-%20ED%20-%20Ans%20No.%2012.png


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NA XP = ND (X - XP)

Where, X = Total depletion width

Or, 9 * 1016 XP = 1 * 1016 (3 - XP)

Or, 9 XP = 3 - XP

Or, 10 XP = 3

XP = [3 / 10] = 0.3 m

16. The resistively of a uniform doped n-type silicon sample is 0.5 -cm. If the electron

mobility (n) is 1250 cm2/ V- sec and the charge of an elec tron is 1.6 * 10-19 Coulomb, the

donor impurity concentration (ND) in the sample is

(a) 2 * 1016/cm3

(b) 1 * 1016/cm3 (Ans)

(c) 2.5 * 1015/cm3

(d) 5 * 1015/cm3

Solution : Conductivity for N-type Semi conductor is

sN = eND n

ND = sN/ n e = 1 / 0.5 * 1.6 * 10-19 * 1250

= 1 * 1016/cm3

17. Consider an abrupt p-junction. Let Vbi be the built-in potential of this junction and VR be

the applied reverse bias. If the junction capacitance (Cj) is 1 pF for Vbi + VR = 1 V, the for

Vbi + VR = 4 V, Cj will be(a) 4 pF

(b) 2 pF

(c) 0.25 pF

(d) 0.5 pF (Ans)

Solution : Cj [1 / (Vbi + VR)] = i.e. [1 / Vj]

[C2 / C1] (1 / 4)

C2 = 0.5 pF

18. Consider the following statement S1 and S2.

S1 : The threshold voltage (VT) of a MOS capacitor decreases with increase in gate oxide

thickness

S2 : The threshold voltage (VT) of a MOS capacitor decreases with increase in substrate

doping concentration

Which one of the following is correct ?

(a) S1 is FALSE and is S2 TRUE

(b) Both S1 and S2 are TRUE

(c) Both S1 and S2 are FALSE (Ans)

(d) S1 is TRUE and S2 is FALSE

Solution : For N-Channel MOSFET

VT = Threshold voltage

ND = Doner concentration

C = Capacitance

t = thickness = d

VT (ND)

VT 1/C = 1 t

(e0 A) / d

VT VD and

VT t

VT of a MOS capac itor increase with increase substrate doping conc entration

19. The longest wavelength that can be absorbed by silicon, which has the band-gap of 1.12eV, is 1.1 m. If the longest wavelength that c an be absorbed by another material is 0.87 m,then the band-gap of this material is

(a) 1.416 eV (Ans)

(b) 0.886 eV

(c) 0.854 eV

(d) 0.706 Ev


6/13



Solution : Eg(ev) = [hC / l]

Eg(ev) = 12400 / l(A0) = 12400 / 0.8700 * 10-6 * 10-4

= 1.416 eV

Second Method

E= hc/ l = 6.626 * 10-34 * 3 * 108 / 0.87 * 10-6

= 22.85 * 10-20Joules

E= 22.85 * 10-20/ 1.6 * 10-19eV= 1.42 eV

20. The neutral base width of a bipolar transistor, biased in the active region, is 0.5 m. The

maximum electron concentration and the diffusion constant in the base are 1014

/cm3

and Dn= 25 cm2/sec respectively. Assuming negligible recombination in the base, the collec tor

current density is (the electron charge is 1.6 * 10-19 coulomb)

(a) 800 A/cm2

(b) 8 A/cm2 (Ans)

(c) 200 A/cm2

(d) 2 A/cm2

Solution : Diffusion current density

Jn = e. Dn. [dn / dx]

Where, dx = 0.5 m = 0.5 * 100 cm

dn = 1014 / cm3

Dn = 25 cm2 / s

e = 1.6 * 10-19 C

Jn = e. Dn . [dn / dx]

= 1.6 * 10-19 * 25 * 1014 / (0.5 * 10-6) * 102

= 1.6 * 50 * 10-1 = 8 A/m2


21. The band gap of Silicon at room temperature is

(a) 1.3 eV

(b) 0.7 eV

(c) 1.1 eV (Ans)

(d) 1.4 eV

Solution : Eg(Si) = 1.21 - 3.6 * 10-4 T (290)

= 1.1 eV

Eg(Ge) = 0.785 - 2.23 * 10-4 T (290)

= 0.76 eV

22. A Silicon PN junction at a temperature of 200C has a reverse saturation current of 10

pico-Amperes (pA). The reverse saturation current at 400C for the same bias is approximately.

(a) 30 pA

(b) 40 pA (Ans)

(c) 50 pA

(d) 60 pA

Solution : Reverse saturation current becomes doubles for every 10 degree, rise in

temperature.

Is = 10 pA at 200 C ; Is = 20 pA at 30

0 C

Is = 40 pA at 400 C

23. The primary reason for the widespread use of Silicon in semiconductor device technologyis

(a) Aboundance of Silicon on the surface of the Earth

(b) Large band-gap of Silicon in comparison to Germanium

(c) Favorable properties of Silicon-dioxide (Si O2) (Ans)

(d) Lower melting point



7/13



24. A Silicon sample A is doped with 1018 of Boron. Another sample B of identical dimensions

is doped with 1018 atoms/cm3 of Phosphorus. The ratio of conductivity of the sample A to B is

(a) 3

(b) [1/3] (Ans)

(c) [2/3]

(d) [3/2]

Solution : Boron group - III element

phosphoron group - V element

Conductivity is proportional to doping concentration

NA = 1018, NB = 1018, [A / B] = [1 / 3]

s= n q

Where, n Carrier concentration

sA/ sB = A / B = 1/3

25. A silicon PN junction diode under reverse bias has depletion region of width 10 m. The

relative permittivity of Silicon, eT = 11.7 and the Permittivity of free space e0 = 8.85 * 10-12

F/m. The depletion capacitance of the diode per square meter is

(a) 100 F

(b) 10 F (Ans)

(c) 1 F

(d) 20 F

Solution : C = eA/d = e0erA/d[C / A] = e0er = 11.7 * 8.85 * 10

-12 / 10 * 10-6

[C / A] = 10.35 F

26. For an n-channel MOSFET and its transfer curve shown in the figure, the thresholdvoltage is

(a) 1 V and the device is in active region

(b) - 1 V and the device is in saturation region

(c) 1 V and the device is in saturation region (Ans)

(d) -1 V and the device is in active region

VDS = 5 - 1 = 4 ; VGS = 3 - 1 = 2

VGS - Vth = 2 - 1 = 1

In present c ase : VDS >, VGS i.e. 4 > 1

So device is in saturation


27. The value of voltage (VD) across a tunnel-diode corresponding to peak and valley

currents are VP and VV respectively. The range of tunnel diode voltage VD for which the slope

of its I- VD characteristics is negative would be.

(a) VD < 0

(b) 0 VD < VP
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(c) VP VD < VV (Ans)

(d) VD VV

Solution : The tunnel diode has characteristic

28. The conc entration of minority carriers in an extrinsic semiconductor under equilibrium is

(a) Directly proportional to the doping concentration

(b) Inversely proportional to the doping concentration (Ans)

(c) Directly proportional to the intrinsic concentration

(d) Inversely proportional to the intrinsic concentration

Solution : If it is extrinsic then n + Na = Nd + p

for N-type ------n = Nd

So here n.p = ni2 p = [ni/ Nd]

29. Under low level injection assumption, the injected minority carrier current for an extrinsicsemiconductor is essentially the

(a) Diffusion current (Ans)

(b) Drift current

(c) Recombination current

(d) Induced current

Solution : Under forward bias conduction the majority current flow i.e. drift current & underno bias conduction or low level injection the minority current flow i.e. diffusion current.

30. The phenomenon known as "Early Effect'" in a bipolar transistor refers to a reduction ofthe effec tive base-width caused by.

(a) Electron-hole recombination at the base

(b) The reverse biasing of the base-collector junction (Ans)

(c) The forward biasing of emitter-base junction

(d) The early removal of stored base charge during saturation to cutoff switching.

Solution : Due to Reverse bias of collector junction the depletion layer in base regionincrease & base width decreases


31. In the circuit shown below, the switch was connected to position 1 at t < 0 and at t =0, it is changed to position 2 Assume that the diode has zero voltage drop and a storage timets.

For 0 < t ts, VR is given by (all in Volts)

(a) VR = -5 (Ans)

(b) VR = +5

(c) 0 VR < 5

(d) -5 < VR < 0

Solution : For diode forward biased and VR = 5. At t= 0 diode abruptly changes to reverse

biased and current across resistor must be 0, but in storage time 0 < t< ts diode retain its

resistance of forward biased. Thus for 0 < t< ts it will be on and VR = -5 V

32. The majority carriers in an n-type semiconductor have an average drift velocity v in adirection perpendicular to a uniform magnetic field B. The electric field E induced due to Hall
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effect acts in the direction.

(a) v * B (Ans)

(b) B * v

(c) along V

(d) opposite to V

Solution : Force direction will charge, due to electron or hole, not induced electric field

33. Find the correct match between Group 1 and 2.

Group 1 Group 2

A. Varactor diode 1. Voltage reference

B. F-PIN diode 2. High frequency switch

C. G-Zener diode 3. Tuned circuits

D. H-Schottky diode 4. Current controlled attenuator

(a) A-4, B-2, C-1, D-3

(b) A-2, B-4, C-1, D-3

(c) A-3, B-4, C-1, D-2 (Ans)

(d) A-1, B-3, C-2, D-4

Solution : The correct match is given below

Varactor diode Tuned circuitsF-PIN diode Current controlled attenuatorG-Zener diode Voltage referenceH-Schottky diode High frequency switch

34. A heavily doped n-type semiconductor has the following data.

Hole - electron mobility ratio : 0.4

Doping concentration : 4.2 * 108 atoms/m3

Intrinsic concentration : 1.5 * 104 atoms/m3

The ratio of conductance of the n-type semiconductor to that of the intrinsic semiconductorof same material and at the same temperature is given by.

(a) 0.00005

(b) 2,000

(c) 10,000

(d) 20,000 (Ans)

Solution : sN-type/ sintrinsic = nee/ nie+ nih (h/ e)

= 4.2 * 108

e/ 1.5 * 104

e + 1.5 * 104

h = 20,000


35. The electron and hole concentrations in an intrinsic semiconductor are ni per cm3 at 300

K. Now, if acceptor impurities are introduced with a concentration of NA per cm3 (where NA

>>ni), the electron concentration per cm3 at 300 Kwill be

(a) ni

(b) ni + NA

(c) NA - ni

(d) ni2 / NA (Ans)

Solution : Intrinsic concentrations = ni/ cm3

Acceptor (Hole) concentrations = NA / cm3 i.e.

P NA

Electron-concentrations n = ?

According to mass action law, ni2 = n. . p

Electron concentrations n = ni2/ P = ni

2/ NA

36. In a P+ n junction diode under reverse biased, the magnitude of electric field is maximumat

(a) The edge of the depletion region of the p-side

(b) The edge of he depletion region on the n-side

(c) The p+n junction

(d) The centre of the depletion region on the n-side (Ans)


10/13



Solution : When P+ n junction diode is reverse biased the magnitude of field is maximum at

Junction of P+ n i.e. lightly doped side i.e. the centre of the depletion region on the n-side


37. Group I Lists Four type of p-n junction diodes. Match each device in Group I with one ofthe options in Group II to indicate the bias condition of the device in its normal mode ofoperation

Group I Group II

A. Zener Diode 1. Forward bias

B. Solar cell 2. Reverse biasC. LASER diode D. Avalanche Photodiode

Codes :

A B C D

(a) 1 2 1 2

(b) 2 1 1 2 (Ans)

(c) 2 2 1 1

(d) 2 1 2 2

Solution :

Zener diode operates in reverse bias

Solar Cell Forward bias

Laser diode Forward bias

Avalanche Photodiode Reverse bias

38. Croup I List four different semiconductor devices. Match each device in Group I with itscharacteristic property in Group II

Group I Group II

A. BJT 1. Population inversionB. MOS capacitor 2. Pinch-off voltageC. LASER diode 3. Early effect

D. JFET 4. Flat-band voltage

Codes :

A B C D

(a) 3 1 4 2

(b) 1 4 3 2

(c) 3 4 1 2 (Ans)(d) 3 2 1 4

Solution :

BJT Early effec t (base width modulation)

MOS capacitor Flat-band voltage

Laser diode Population inversion

JFET Pinch-off voltage

39. A P+ n junction has a built-in potential of 0.8 V. The depletion layer width at a reversebias of 1.2 V is 2 m. For a reverse bias of 7.2 V, the depletion layer width will be

(a) 4 m (Ans)

(b) 4.9 m

(c) 8 m

(d) 12 m

Solution : P+ n junction built in volt = 0.8 V for applied 1.2 V reverse bias, width = 2 m

Diode voltage = Va+ Vb

Where, Va = applied volt

Vb = built in volt

Also w Vdiode

w1/w2 = V1/V2

w1 = 2 m, w2 = ?

V1 = 1.2 + .8 = 2 V

V2 = 7.2 + .8 = 8 V

2 * 10-6/ w2 = 2/8


11/13



w2 = 4m

40. The DC current gain (b) of a BJT is 50. Assuming that the emitter injection efficiency is0.995, the base transport factor is

(a) 0.980

(b) 0.985

(c) 0.990

(d) 0.995

(Ans -d/b)

Solution : DC current gain = b= 50

Emitter injection efficiency = 0.995base transportation factor = ?

Emitter efficiency = IPE/ IETOT

Base transportation factor, PT = IPC/ IPE

= Emitter efficiency * Base transportation factor

bT= /0.995 = b/1 + b * 1 /0.0995

= 50 / 51 * 1 / 0.995 = 0.980

Common Date for Questions 41, 42, 43

The figure shows the high-frequency capacitance voltage (C-V) characteristic of a

Metal/SiO2/silicon (MOS) capac itor having an area of 1 * 10-4 cm2. Assume that the

permittivities (e0er) of silicon and SiO2 are 1 * 10-12 F/cm and 3.5 * 10-13 F/cm respect ively.

41. The gate oxide thickness in the MOS capacitor is

(a) 50 nm (Ans)

(b) 143 nm

(c) 350 nm

(d) 1 m

C = e0erA/ w

w= 3.5 * 10-13 * 10-4 / 0.7 * 10-12 = 5 * 10-5 cm

= 50 * 10

-9

m = 50 nm

42. The maximum depletion layer width in silicon is

(a) 0.143 m

(b) 0.857 m

(c) 1 m (Ans)

(d) 1.143 m

43. Consider the following statements about the C-V characteristic plot :

S1 : The MOS capacitor has an n-type substrate

S2 : If positive charge are introduced in the oxide, the C-V plot will shift to the left

The which of the following is true ?

(a) Both S1 and S2 are t rue
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gate placement paper electronics communication engineering 20732

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