generic losses model for traditional inverters and neutral point … · 2018. 12. 11. · generic...
TRANSCRIPT
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392–1215, VOL. 20, NO. 5, 2014
1Abstract—This paper presents a model of two very commoninverters, a traditional inverter and neutral point clampedinverter, for calculating the losses in function of the parametersof the inverter datasheet. The model allows simulating theinverter branch under any conditions, not only nominalsinusoidal, and monitoring its losses at the same time, so themost significant parameters could be determined in lossesterms. The optimization of the losses in inverters could createan important energy saving since it is present in most of thepower applications, mainly renewable energies. Obviously, themodel is based on the electrical equations of bothsemiconductors inverters so the mathematical development isexposed. Finally, the model is validated by solving the equationsanalytically together with the model simulation under nominalsinusoidal environment.
Index Terms—Power system modelling, multilevel systems,inverters.
I. INTRODUCTION
Year after year, mankind increases amounts of energydemand due to the continuous increase in their level ofdevelopment. Conventional energy resources are limited, sothe authorities and governments are promoting energy savingand efficiency. Nor should we forget the support that theseentities are making for renewable energy as an alternative toconventional energy resources.
Taking into account the number of the output possibilitiesof one inverter branch, one of the most used convertertopologies is the traditional two level Voltage SourceInverter (VSI) (Two Level Inverter, TLI), which is used tointegrate the main renewable energy sources (wind andphotovoltaic generation power plants) and to control typicalelectrical loads (most of them, AC motors). Anotherincreasingly used topology is the three level voltage sourceinverter with clamping diodes (Neutral Point Clampedinverter, NPC), as it allows working with high power whileoffering improved quality waveform [1] [2]. Theoptimization of the losses in VSI could have a great impacton energy savings due to the large number of existingconverters in power applications. There have been studies oflosses in converters for different applications in recent years
Manuscript received October 18, 2013; accepted January 26, 2014.This work was supported by the Government of Extremadura (Spain)
and the European Regional Development Fund (project PCJ1004 and grantGR10117).
[3]–[6], including multilevel inverters.There is free software that offers the possibility of
calculating losses, such as “Semikron” webpage, theMitsubishi “Melcosim” application or the Fuji “IGBTsimulator” program, but they are limited to sinusoidalmodulations for traditional inverters.
Two methods for calculating the losses for TLI and NPCconverters have been developed, an analytical one and themodel one. In the first section an analytical losses study ofboth converters is done in order to obtain a generalexpression for calculating conduction and switching losses,although some simplifications are needed depending on themodulation technique. Secondly, the losses equations of thesemiconductors are implemented in a model without anysimplification in order to calculate the losses regardless ofthe inverter operation, that is, no simplifications areintroduced. Finally, sinusoidal currents case is analysed withboth methods validating the model and comparing the resultsobtained for each converter.
II. VOLTAGE SOURCE INVERTER OPERATION
The losses produced by the semiconductor devices of thetwo level inverter (Fig. 1(a)), the three level inverter withclamping diodes (Fig. 1(b)) and, in general, the n levelinverter could be calculated through a branch analysis.
a) b)Fig. 1. Single-phase inverter topology: (a) Traditional two level inverter;b) Three level neutral point clamped inverter (NPC).
Considering a single branch, the output current, iA, willpass from it to the load through A terminal. Usually, thetransistors of a branch switch in a complementary waytechnique to avoid DC link short circuits (excepting shootthrough strategies). The output current will always pass
Generic Losses Model for Traditional Invertersand Neutral Point Clamped Inverters
V. Minambres-Marcos1, M. A. Guerrero-Martinez1, E. Romero-Cadaval1, M. I. Milanes-Montero1
1Power Electrical & Electronics Systems, Escuela de Ingenierias Industriales, Universidad deExtremadura,
Avda. Elvas s/n, 06006, Badajoz, [email protected]
http://dx.doi.org/10.5755/j01.eee.20.5.7106
84
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392–1215, VOL. 20, NO. 5, 2014
through a single semiconductor in the case of a TLI. Theconducting semiconductor depends on the branch state andthe direction of the current:
,TLI
,TLI
0 ,0 St. 2
0 ,2TLI 0 ,
1 St.10 ,2
A AdAo
A AA
A AdAo
A A
i DVV
i Qsi QV
Vi D
(1)(2)
(3)
(4)
where sA+ is the switching signal of the transistor QA+
(complementary to QA-), Vd is the DC link voltage and VAo,TLI
is the TLI output branch voltage with respect to the middlepoint of the DC link.
The current will flow through two differentsemiconductors in the case of the NPC:
2 1,NPC
2 12
3 1,NPC1
3 2
2 1,NPC
2 1
0 , ,0St. 3
0 , ,0 20 , ,0
St. 6 00 , ,1
NPC0 , ,1
St.120 , ,1 2
A A AdAo
A A AA
A A AAoA
A A A
A A AdAo
A A A
i D DVV
i Q Qs
i D QVs
i D Q
i Q QVV
i D D
(5)(6)(7)(8)(9)
(10)
where sA2+ and sA1+ is the switching signal for transistorsQA2+ and QA1+ respectively (Complementary to QA2- and QA1-
), and VAo,NPC is the NPC output branch voltage with respectto the middle point of the DC link.
The use of complementary signals switching involves theuse of the branch valid states, so that the non-allowed statesare avoided and the rest are used only for transitions. Table Iand Table II shows the whole possible states of the branchfor a TLI and NPC respectively.
TABLE I. POSSIBLE STATES ON A TLI BRANCH.State QA+ QA- Comments
0 OFF OFF Only transitions1 ON OFF Valid state2 OFF ON Valid state3 ON ON Not allowed
TABLE II. POSSIBLE STATES ON A NPC BRANCH.State QA2+ QA1+ QA2- QA1- Comments
0 OFF OFF OFF OFF Only transitions1 OFF OFF OFF ON Only transitions2 OFF OFF ON OFF Only transitions3 OFF OFF ON ON Valid state4 OFF ON OFF OFF Only transitions5 OFF ON OFF ON Only transitions6 OFF ON ON OFF Valid state7 OFF ON ON ON Not allowed8 ON OFF OFF OFF Only transitions9 ON OFF OFF ON Only transitions
10 ON OFF ON OFF Only transitions11 ON OFF ON ON Only transitions12 ON ON OFF OFF Valid state13 ON ON OFF ON Only transitions14 ON ON ON OFF Not allowed15 ON ON ON ON Not allowed
III. ANALYTIC LOSSES CALCULATION
Defining dA+ as the duty cycle for TLI transistor QA+ and(1-dA+) for its complementary one, the output mean voltage
in a switching period is
,TLI 2 1 ,2d
Ao AV
V d (11)
where Vd is the DC link voltage.Subsequently, the duty cycle of QA+ is
,TLI1 .2
AoA
d
Vd
V
(12)
For the NPC the switching period is divided into the threepossible valid states, so d+ is defined as the cycle fraction onstate 12, do on state 6 and d- on state 3
,NPC 02 2
,2 2
d dAo o
d d
V VV d d d
V Vd d
(13)
where 1od d d . Supposing a control techniquebased on PWM (see Fig. 2), a simplification could beintroduced by taken into account the states when the outputvoltage is positive or negative. In the first case the state 12 isnot used, and in the second case the state 3 is not used:
,NPCInt. +: 0 1
1 ,2
o Ao
do
d d d V
Vd
(14)
,NPCInt. -: 0 1
1 .2
o Ao
do
d d d V
Vd
(15)
The NPC duty cycles could be obtained in the twointervals:
,NPC2Int + 1 ,Ao
od
Vd
V (16)
,NPC2Int - 1 .Ao
od
Vd
V (17)
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.50
1
2
Car
riers
and
mod
ulat
ing
sign
als
Time (s)
Fig. 2. PWM modulation in the NPC.
A. Conduction LossesThe semiconductor of an electronic switch (ES) presents a
voltage drop that is function of the current flowing.Considering the first order function one has
, , ,ES ES on ES on Av V r I (18)
where VES,on is the voltage drop of the ES when conducting
85
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392–1215, VOL. 20, NO. 5, 2014
and res,on is the conducting resistance. The conduction lossesof an ES are
2, , .on ES A ES on A ES on Ap v i V i r i (19)
The instantaneous conduction losses could be divided intotwo terms, one for the transistor with ES = Q and other forthe diode with ES = D. Then, supposing identicalsemiconductors, the conduction losses for the TLI are:
2
2
,TLI 2
2
,0
1 ,
1 ,0
.
QA onQ A onQ A A
DA onD A onD A AA
QA onQ A onQ A A
DA onD A onD A A
P V I r I d
P V I r I dI
P V I r I d
P V I r I d
(20)
(21)
(22)
(23)
Doing the same way for the NPC and taking into accountthe positive and negative intervals:
22
21
23
21
23
22
21
,NPC
1 ,
Int. + ,
,
0 ,
,Int. -
1 ,
1 ,
QA onQ A onQ A o
QA onQ A onQ A
DA onD A onD A o
QA onQ A onQ A o
DA onD A onD A o
DA onD A onD A o
DA onD A onD A o
A
P V I r I d
P V I r I
P V I r I d
P V I r I d
P V I r I d
P V I r I d
P V I r I dI
22
23
22
21
22
21
3
,
,Int. +
1 ,
1 ,0
,
Int. - 1 ,
QA onQ A onQ A o
DA onD A onD A o
DA onD A onD A o
DA onD A onD A o
QA onQ A onQ A
QA onQ A onQ A o
DA on
P V I r I d
P V I r I d
P V I r I d
P V I r I d
P V I r I
P V I r I d
P V
2 .D A onD A oI r I d
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
The conduction losses in the k-th switching period couldbe determined through expression (20)–(21) for TLI andthrough (24)–(30) for NPC when the current is flowing outof the branch:
,TLI
2
1
1 ,
on QA DA
A onQ A onD A
A onQ A onD A
P k P P
I V d V d
I r d r d
(38)
,NPC 2 1 3
2 1
on QA QA DA
DA DA
P k P P P
P P
2
2 2
2 2 ,
A onQ A o onD o
A onQ A o onD o
I V d d V d d
I r d d r d d
(39)
Substituting the duty cycle obtained in (12) into (38)
2
2
.2
onQ onD onQ onDon A Ao
dTLI
onQ onD onQ onDA Ao
d
V V V VP k I k V k
V
r r r VI k V k
V
(40)
Knowing that the positive interval is symmetric withrespect to the negative interval in most of the PWM, theNPC conduction losses are calculated with (16) and (39)
NPC
2
2
2.
on A onQ onD
onQ onDAo
d
onQ onDA onQ onD Ao
d
P k I k V V
V VV k
V
r rI k r r V k
V
(41)
The expressions (40) and (41) obtained are similar whenthe current flows into the branch, so a general expression istaken for each converter:
2
2
,2
onQ onD onQ onDon A Ao
dTLI
onQ onD onQ onDA Ao
d
V V V VP k I k V k
V
r r r VI k V k
V
(42)
NPC
2
2
2.
onQ onDon A onQ onD Ao
d
onQ onDA onQ onD Ao
d
V VP k I k V V V k
V
r rI k r r V k
V
(43)
The difference between the expression of the NPC and theTLI is a factor of 2, so the conduction losses will be thedouble for the same semiconductor.
B. Switching LossesThe switching losses could be determined by knowing the
energy a semiconductor needs to switch on and switch off,which is a parameter that could be found in the datasheet.These parameters are Eon and Eoff for the transistor switchingand Err for the diode reverse energy recovery. Theseenergies depend on the current that flows through thesemiconductor and they are usually defined for a referencevoltage, Vref, and a reference current, Iref.
Calculations could be simplified here by assuming a linealrelation between the energies and the current, so in anyswitching period one has: The TLI presents the switching transitions detailed inTable III. The switching losses are then
86
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392–1215, VOL. 20, NO. 5, 2014
,A d
sw on off rr sref ref
I k VP k E E E f
I V (44)
where fs is the switching frequency. The NPC has more switching transitions as it can beseen in Table IV. However, only switching 0, 2, 3 and 5are used with symmetric PWM modulation. The switchinglosses for the NPC are
(1 ) ,A d
sw on off rr sref ref
I k VP k E E s E f
I V (45)
where s is a boolean that is one when two diodes switch in aswitching period.
C. Total LossesTotal losses are obtained with the next expression:
1
1 .N
on swks
P P k P kNT (46)
where N is the number of switching periods in a modulatedwaveform period and Ts is the switching period.
TABLE III. POSSIBLE SWITCHES OF A TLI BRANCH.Switch Transition ia Switch ON Switch OFF
0 1 → 2 > 0 QA+, DA+ QA-, DA-
< 0 QA+, DA+ QA-, DA-
1 2 → 1 > 0 QA-, DA- QA+, DA+
< 0 QA-, DA- QA+, DA+
TABLE IV. POSSIBLE SWITCHES OF A NPC BRANCH.Switch Transition ia Switch ON Switch OFF
0 3 → 6 > 0 QA1+, DA1+, DA3+ QA1-, DA1-
< 0 DA3- QA1-, DA1-
1 3 → 12> 0 QA2+, DA2+,
QA1+, DA1+
QA2-, DA2-,QA1-, DA1-
< 0 QA2+, DA2+,QA1+, DA1+
QA2-, DA2-,QA1-, DA1-
2 6 → 3 > 0 QA1-, DA1- QA1+, DA3+
< 0 QA1-, DA1- DA3-
3 6 → 12 > 0 QA2+, DA2+ DA3+
< 0 QA2+, DA2+ QA2-, DA2-, DA3-
4 12 → 3> 0 QA2-, DA2-,
QA1-, DA1-
QA2+, DA2+,QA1+, DA1+
< 0 QA2-, DA2-,QA1-, DA1-
QA2+, DA2+,QA1+, DA1+
5 12 → 6 > 0 DA3+ QA2+, DA2+
< 0 QA2-, DA2-, DA3- QA2+, DA2+Note: Semiconductors that switches in black, and the rest in grey.
If the switching period, Ts, is much smaller than thewaveform period, T, one has
01 .T
on swP P t P t dtT (47)
IV. LOSSES MODEL
Fig. 3 and Fig. 4 depict the designed conduction andswitching losses model. These models calculate the losses ina more exhaustive way, that is, no symmetric PWM intervalsfor conduction and switching losses simplification areadded. Both figures details the losses calculation for bothTLI and NPC (symbol “\” separates each case).
onQ onQ AV r I
onD onD AV r I
Fig. 3. Designed conduction losses model for TLI and NPC.
A don ss
ref ref
I VE fI V
A doff ss
ref ref
I VE fI V
A drr ss
ref ref
I VE fI V
Fig. 4. Designed switching losses model for TLI and NPC.
The conduction losses model (Fig. 3) solves expressions(18) and (19) depending on the conducting semiconductor,which is identified through (1)–(4) and (5)–(10) by indexingthem with c for each converter. The voltage drop is used inthe voltage applied to the load.
The switching losses model (Fig. 4) identifies theswitching semiconductor by means of Table III and Table III(where the first columns are the s selector) and adds thepower losses of each one (see (44) and (45)).
V. INVERTER LOSSES WITH SINUSOIDAL PWMA sinusoidal PWM technique for single phase inverters
with inductive loads (Fig. 5) has been studied to evaluate thelosses. The values of the system are resumed in Table V, andthe parameters of the semiconductors correspond to theSK80GB125T device [7] for the TLI and theSK75MLI066T device [9] for the NPC.
0.46 0.47 0.48 0.49 0.5-1000
0
1000
Out
put v
olta
ge (V
)
0.46 0.47 0.48 0.49 0.5-200
0
200
Out
put c
urre
nt (
A)
Time (s)
0.46 0.47 0.48 0.49 0.5-1000
0
1000
Out
put v
olta
ge (V
)
0.46 0.47 0.48 0.49 0.5-200
0
200
Out
put c
urre
nt (A
)
Time (s)
a) (b)
Fig. 5. Voltage and current of a branch modulated with PWM togetherwith the fundamental component voltage and the current referencerespectively: (a) TLI; (b) NPC.
0.46 0.47 0.48 0.49 0.50
0.5
1
Con
duct
ion
(kW
)
Time (s)
0.46 0.47 0.48 0.49 0.50
10
20
30
Switc
hing
(kW
)
Time (s)
0.46 0.47 0.48 0.49 0.50
0.5
1
Con
duct
ion
(kW
)
Time (s)
0.46 0.47 0.48 0.49 0.50
5
10
Switc
hing
(kW
)
Time (s)
a) b)
Fig. 6. Conduction and switching losses of a single phase inverter withPWM modulation. (a) TLI and (b) NPC.
TABLE V. OPERATION CONDITIONS.DC Link voltage 1200 V Power factor 0.8
Load current 75 A Modulation index 0.8Inductor resistance 7 Switching frequency 1 kHz
Inductance 18 mH Waveform frequency 50 Hz
87
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392–1215, VOL. 20, NO. 5, 2014
A. Analytic SolutionExpressions (42)–(45) could be applied here assuming the
next voltage and current components with a φ gap and amodulation index of ma:
,1
,1
2 sin ,
2 sin ,A A
Ao A
I I
V V
(48)
,TLI 2 4,Ao a dV m V (49)
,NPC 2 2,Ao a dV m V (50)
so, integrating the expressions one has the losses:
,TLI
2
0.9 cos2
8 2 cos ,2 3
onQ onD Aoon A onQ onD
dc
onQ onD AoA onQ onD
dc
V V VP I V V
V
r r VI r r
V
(51)
,NPC
2
0.9 2 cos
16 2 cos ,3
Aoon A onQ onD onQ onD
dc
AoA onQ onD onQ onD
dc
VP I V V V V
V
VI r r r r
V
(52)
,TLI 0.9 ,dAsw on on rr s
ref ref
VIP E E E fI V
(53)
,NPC 1 0.9 .dAsw on on rr s
ref ref
VIP E E E fI V
(54)
where the NPC s term is the fraction of time when is one.
B. Model SimulationThe model has been simulated with the same
configuration the analytical solution had, so it could bevalidated. The instantaneous conduction and switchinglosses are shown in Fig. 6(a) and Fig. 6(b) for the TLI andfor the NPC. By doing the mean value of the total losses, aresult with a deviation of tenths with respect to the analyticalsolution ((51)–(54)) is obtained, so the model is validated.
VI. CONCLUSIONS
In this work a generic model for calculating the losses of atraditional inverter and a neutral point clamped inverter. Themodels are based on the semiconductors equations so anydevice could be evaluated by introducing their parametersfrom the datasheet.
The model was validated by matching the results with the
ones obtained analytically for a typical symmetrical PWM.The model could allow optimizing power application byanalysing the inverter losses. A great benefit of the designedmodels is that they provide a result whatever the controlstrategy is, not only PWM, as they did not need anysimplification, something that is very hard to achieve with ananalytical development. Also, the method could be appliedto an inverter of n levels in general.
The models also allow comparing the losses of eachstudied converter in order to evaluate which is better for theuser. The conduction losses seems the double for the NPChowever the semiconductors could be the half blockingvoltage with respect to the TLI so it presents betterparameters. With the same premise one has that theswitching losses will be less for the NPC so it will have lesssemiconductor stress at the same switching frequency. Asthe switching frequency increases, the conduction losses arethe less important term so the NPC could be a better choice.
REFERENCES
[1] J. Rodriguez, S. Bernet, P. Steimer, I. Lizama, “A survey on neutralpoint clamped inverters”, IEEE Trans. Industrial Electronics, vol. 57,n. 7, pp. 2219–2230, 2010. [Online]. Available: http://dx.doi.org/10.1109/TIE.2009.2032430
[2] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, M. A.M. Prats, “The age of multilevel inverters arrives”, IEEE IndustrialElectronics Magazine, vol. 2, n. 2, pp. 28–39, 2008. [Online].Available: http://dx.doi.org/10.1109/MIE.2008.923519
[3] J. Munoz, C. Baier, J. Espinoza, M. Rivera, J. Guzman, J. Rohten,“Switching losses analysis of an asymmetric multilevel Shunt activepower filter”, 39th Annual Conf. IEEE Industrial Electronics Society,(IECON 2013), 2013, Vienna, Austria, pp. 8534–8539.
[4] M. Rashed, C. Klumpner, G. Asher, “Power losses evaluation of threemultilevel converter topologies for direct interface with mediumvoltage grids”, in Proc. 14th European Conf. Power Electronics andApplications (EPE 2011), 2011, Birmingham, pp. 1–10.
[5] F. Gebhardt, H. Vach, F. W. Fuchs, “Analytical derivation of powersemiconductor losses in MOSFET multilevel inverters”, 15th Int.Power Electronics and Motion Control Conf. (EPE/PEMC 2012),Novi Sad, 2012, pp. 1–6. [Online]. Available: http://dx.doi.org/10.1109/EPEPEMC.2012.6397218
[6] M. Zygmanowski, B. Grzesik, M. Fulczyk, R. Nalepa, “Analyticaland numerical power loss analysis in modular multilevel converter”,39th Annual Conf. IEEE Industrial Electronics Society, (IECON2013), 2013, Vienna, Austria, pp. 465–470.
[7] M. Perez-Romero, J. Gallardo-Lozano, E. Romero-Cadaval, A.Lozano-Tello, “Local Energy Management Unit for ResidentialApplications”, Elektronika ir Elektrotechnika, vol. 19, no. 7, pp. 61–64, 2013. [Online]. Available: http://dx.doi.org/10.5755/j01.eee.19.7.5164
[8] Datasheet parameters for SEMITOP modules, Semikron. [Online]Available: http://www.semikron.com/products/data/cur/assets/SK_80_GB_125_T_24912030.pdf
[9] Datasheet parameters for SEMITOP modules, Semikron. [Online]Available: http://www.semikron.com/products/data/cur/assets/SK_75_MLI_066_T_24914460.pdf
88