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Graphene nanopore field effect transistorsWanzhi Qiu and Efstratios Skafidas Citation: Journal of Applied Physics 116, 023709 (2014); doi: 10.1063/1.4889755 View online: http://dx.doi.org/10.1063/1.4889755 View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/116/2?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Substrate dielectric effects on graphene field effect transistors J. Appl. Phys. 115, 194507 (2014); 10.1063/1.4879236 High carrier mobility in suspended-channel graphene field effect transistors Appl. Phys. Lett. 103, 193102 (2013); 10.1063/1.4828835 Transfer-free fabrication of graphene field effect transistor arrays using solid-phase growth of graphene on aSiO2/Si substrate Appl. Phys. Lett. 103, 183114 (2013); 10.1063/1.4829137 Hysteretic response of chemical vapor deposition graphene field effect transistors on SiC substrates Appl. Phys. Lett. 103, 053123 (2013); 10.1063/1.4816426 Phonon limited transport in graphene nanoribbon field effect transistors using full three dimensional quantummechanical simulation J. Appl. Phys. 112, 094505 (2012); 10.1063/1.4764318
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Graphene nanopore field effect transistors
Wanzhi Qiu1,2 and Efstratios Skafidas1,2,a)
1Centre for Neural Engineering, The University of Melbourne, 203 Bouverie Street, Carlton, Victoria 3053,Australia2Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville, Victoria 3010,Australia
(Received 27 March 2014; accepted 27 June 2014; published online 11 July 2014)
Graphene holds great promise for replacing conventional Si material in field effect transistors
(FETs) due to its high carrier mobility. Previously proposed graphene FETs either suffer from low
ON-state current resulting from constrained channel width or require complex fabrication processes
for edge-defecting or doping. Here, we propose an alternative graphene FET structure created on
intrinsic metallic armchair-edged graphene nanoribbons with uniform width, where the channel
region is made semiconducting by drilling a pore in the interior, and the two ends of the nanoribbon
act naturally as connecting electrodes. The proposed GNP-FETs have high ON-state currents due
to seamless atomic interface between the channel and electrodes and are able to be created with
arbitrarily wide ribbons. In addition, the performance of GNP-FETs can be tuned by varying pore
size and ribbon width. As a result, their performance and fabrication process are more predictable
and controllable in comparison to schemes based on edge-defects and doping. Using first-principle
transport calculations, we show that GNP-FETs can achieve competitive leakage current of
�70 pA, subthreshold swing of �60 mV/decade, and significantly improved On/Off current ratios
on the order of 105 as compared with other forms of graphene FETs. VC 2014 AIP Publishing LLC.
[http://dx.doi.org/10.1063/1.4889755]
I. INTRODUCTION
Field effect transistors (FETs) are electronic current
controlling devices that play an important role in amplifiers,
digital circuits, and memory devices. As FETs are scaled
down to nano-meter sizes, it becomes very difficult for current
CMOS technology using conventional material Si and its oxide
(SiO2) to keep leakage current to an acceptably low level.1
Alternative materials with high carrier mobility have been con-
sidered for the replacement of Si so that power dissipation due
to leakage current can be minimized. One of the most promis-
ing materials in this regard is graphene due to its extraordinar-
ily high electron mobility and low carrier effective mass.1
Graphene is a flat monolayer of carbon atoms tightly
packed into a two-dimensional (2D) honeycomb lattice.2 In
order to achieve certain transport properties for interconnect-
ing and sensing applications, a range of 1D graphene
structures has been proposed3–8 that include graphene nano-
ribbons (GRs), L-shaped junctions, constrictions, wedge-
shaped junctions, and graphene nanopores (GNPs).
Studies have shown that due to quantum confinement,
zigzag-edged GRs are always metallic and armchair-edged
GRs can be either metallic or semiconducting depending on
the width. In particular, armchair-edged GRs with
Na¼ 3pþ 2 atoms in its width, where p is a positive integer,
are metallic, and otherwise semi-conducting.9 It has also
been shown that for a semi-conducting armchair-edged GR,
its bandgap is inversely proportional to its width.10
Graphene FETs utilizing these bandgap properties of
GRs have previously been proposed.1,11–16 One form uses
semiconducting armchair-edged GRs as channel and zigzag-
edged GRs as electrodes with angled-ribbons between,
resulting in a Z-shaped nanoribbon junction structure.12,13
This structure requires extremely narrow GRs to open a gap
wide enough for good switch-off and, therefore, suffers from re-
stricted ON-state current. Other schemes of graphene FETs
introduce carefully designed edge defects or doping into zigzag-
edged GRs to create semiconducting channels. 11,14,15 These
designs bring in additional complexity into the fabrication pro-
cess and uncertainty in the performance of resulting FETs.
Here, we propose an alternative graphene FET structure
that is created on intrinsic metallic armchair-edged GRs with
uniform width, where the channel region is made semicon-
ducting by drilling a pore in the interior, and the two ends of
the nanoribbon act naturally as connecting electrodes. The
proposed GNP-FETs will be shown to have remarkable ON-
state currents due to seamless atomic interface between the
channel and electrodes and the option of being created with
arbitrarily wide ribbons. In addition, the performance of
GNP-FETs can be tuned by varying pore size and ribbon
width. As a result, their performance and fabrication process
are more predictable and controllable than that of schemes
based on edge-defects and doping.
II. THE PROPOSED GNP-FETs
Fig. 1 depicts the proposed GNP structure for FETs,
where L and W are the length and width, respectively, of the
metallic armchair-edged ribbon with M hexatomic rings in its
length and N atoms in its width. The pore is created in the
center of the ribbon and its length (Lp) and width (Wp) are
determined by the number of hexatomic rings (Mp) in its
length and number of atoms (Np) in its width, respectively. In
a)Author to whom correspondence should be addressed. Electronic mail:
0021-8979/2014/116(2)/023709/4/$30.00 VC 2014 AIP Publishing LLC116, 023709-1
JOURNAL OF APPLIED PHYSICS 116, 023709 (2014)
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our quantum transport simulations, we employ the density
functional theory (DFT)17 and non-equilibrium Green’s func-
tion method,18 where the local density approximation (LDA)
is used and mesh cutoff of carbon atoms is chosen to be100
Ry. All dangling bonds are passivated by hydrogen atoms.
Prior to transport calculations, the geometries are optimized
(i.e., energy relaxation) by relaxing the atom coordinates so
that the forces on individual atoms are minimized to be
smaller than 0.05 eV/A. The commercial package Atomistix
ToolKit (ATK) from QuantumWise19 was utilized in our study.
Although the transport properties calculated using these models
can be affected by the non-equilibrium states and uncertain
boundary conditions associated with low-dimensionality of 1D
electrodes,20 the adopted methodology has been successful in
simulating various graphene nanostructures.19 Unless stated
otherwise, the following default GNP parameters were adopted:
M¼ 14 (corresponding to ribbon length L¼ 5.8 nm), N¼ 17
(corresponding to ribbon width W¼ 2.0 nm), Mp¼ 4 (corre-
sponding to pore length Lp¼ 1.6 nm) and Np¼ 7 (correspond-
ing to pore width Wp¼ 0.7 nm).
Supplementary information Figs. S1-S321 show three
optimized passivated GNPs with pore lengths Mp¼ 3, 4, and
5, respectively. Fig. 2 shows the transmission spectrum of
these GNPs. It can be seen that the introduction of the nano-
pore into the metallic armchair-edged ribbon opens the
bandgap effectively. To understand this effect, we examine
the microscopic distribution of local density of states
(LDOS) using the GNP with Mp¼ 4 as an example. Fig. 3(a)
shows the LDOS distribution at the Fermi level, where non-
zero LDOS only appear around the two vertical pore-edges.
It is these nonbonding states7 that give rise to the transmis-
sion valley around the Fermi level (EF). As the energy devi-
ates >�0.2 eV from EF, significantly more energy states
exist that open hopping paths for electrons to cross the chan-
nel and thus provide substantial transmission, as shown in
Fig. 3(b) for energy 0.3 eV above the Fermi level.
We now investigate the switching performance of the
GNPs when used as FETs, starting with the above-
mentioned three GNPs that differ only in pore length with
Mp¼ 3, 4, and 5, respectively. Fig. 4 shows their current vs.
gate voltage curves under a bias voltage of Vbias¼ 20 mV.
The extracted subthreshold swing (SS) for these FETs are
[70.0 66.8 65.2] mV/decade, which are close to the theoreti-
cal limit of conventional Si-based FETs (Ref. 22) and com-
parable to what obtained with other forms of graphene
FETs.11–13 The sufficiently low OFF-state leakage currents
are [0.12 0.07 0.06] nA and impressively high ON-state cur-
rents are [1.34 1.23 1.26] uA, leading to ION/IOFF ratios of
[1.14 1.70 1.95]� 104. This ION/IOFF performance signifi-
cantly exceeds those achieved by most other schemes of gra-
phene FETs.11–13 The large ON-state currents manifest
FIG. 1. Geometry of the proposed GNP structure for FETs prior to passiva-
tion. M and Mp are numbers of hexatomic rings in length of the ribbon and
pore, respectively. N and Np are numbers of atoms in width of the ribbon
and pore, respectively. Shown in this figure are M¼ 10 and N¼ 17 (corre-
sponding to a ribbon of length L¼ 4.1 nm and width W¼ 2.0 nm), and
Mp¼ 4 and Np¼ 7 (corresponding to a pore of length Lp¼ 1.6 nm and
width Wp¼ 0.7 nm).
FIG. 2. Transmission spectrum of GNPs with different pore lengths. GNP
parameters are M¼ 14 (i.e., ribbon length L¼ 5.8 nm), N¼ 17 (i.e., ribbon
width W¼ 2.0 nm), Np¼ 7 (i.e., pore width Wp¼ 0.7 nm), and Mp¼ 3, 4,
and 5 (i.e., pore length Lp¼ 1.1 nm, 1.6 nm and 2.0 nm), respectively. EF
denotes the Fermi level.
FIG. 3. LDOS at different energies of the GNP with M¼ 14, N¼ 17,
Mp¼ 4 and Np¼ 7. (a) E¼EF. (b) E¼EFþ 0.3 eV. EF denotes the Fermi
level.
023709-2 W. Qiu and E. Skafidas J. Appl. Phys. 116, 023709 (2014)
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seamless atomic interface between the channel and electro-
des in GNP-FETs. These results also indicate that increasing
the pore length leads to slight reduction of leakage current
and increase in ION/IOFF ratio. Fig. 5 plots the currents vs.
bias voltage curves under different gate voltages (Vg) for the
case Mp¼ 4, where good Ohmic behaviour is observed for
relatively large gate voltages (0.3–0.5 V) and small bias
(<0.2 V).
We now study the situations when the same pore is cre-
ated in increasingly wider ribbons. This is done by keeping
the pore size and ribbon length constant and setting N to 17,
29, and 41, respectively (corresponding to ribbon widths
2.0 nm, 3.4 nm, and 4.9 nm, respectively). Supplementary in-
formation Figs. S2, S4-S5 (Ref. 21) show the geometries of
these GNPs, and Fig. 6 shows the resulting current vs. gate
voltage curves. We see that increasing the ribbon width
raises ON-state current and, more significantly, OFF-current,
leading to performance degradation. The extracted SS and
ION/IOFF ratios for the three ribbon widths are [66.8 68.9
74.2] mV/decade and [1.701 0.056 0.013]� 104, respec-
tively. This effect can be understood by viewing the trans-
mission spectrum of these GNPs, shown in the
supplementary information Fig. S6.21 There it can be seen
that bandgap decreases when ribbon width is increased. In
other words, the effectiveness of bandgap-opening of the
pore is reduced for wider ribbons.
Next, we demonstrate how the performance of wide-
ribbon GNP-FETs can be improved by enlarging the pore. In
particular, we increase the pore width of the 4.9 nm wide
GNP-FET. Fig. 7 shows the current vs. gate voltage curves
for Np values 7, 19, and 31 (corresponding to pore widths
0.7 nm, 2.2 nm, and 3.7 nm). Supplementary information
Figs. S5, S7-S8 (Ref. 21) show the geometries of these
GNPs. It can be seen that enlarging the pore significantly
reduces the OFF-state current, leading to improved perform-
ance. The extracted SS and ION/IOFF ratios for the three pore
FIG. 4. Current vs. gate voltage of the GNP-FETs with different pore
lengths under a bias voltage of Vbias¼ 20 mV. GNP parameters are M¼ 14
(i.e., ribbon length L¼ 5.8 nm), N¼ 17 (i.e., ribbon width W¼ 2.0 nm),
Np¼ 7 (i.e., pore width Wp¼ 0.7 nm), and Mp¼ 3, 4, and 5 (i.e., pore
length Lp¼ 1.1 nm, 1.6 nm and 2.0 nm), respectively.
FIG. 5. Current vs. bias voltage curves of the GNP-FET with M¼ 14 (i.e.,
ribbon length L¼ 5.8 nm), N¼ 17 (i.e., ribbon width W¼ 2.0 nm), Mp¼ 4
(i.e., pore length Lp¼ 1.6 nm), and Np¼ 7 (i.e., pore width Wp¼ 0.7 nm).
FIG. 6. Current vs. gate voltage curves of the GNP-FETs with different rib-
bon widths under a bias voltage of Vbias¼ 20 mV, where the pore size
(Lp¼ 1.6 nm, Wp¼ 0.7 nm) and ribbon length (L¼ 5.8 nm) are kept con-
stant. N¼ 17, 29 and 41 corresponds to ribbon widths W¼ 2.0 nm, 3.4 nm,
and 4.9 nm, respectively.
FIG. 7. Current vs. gate voltage curves of the GNP-FETs with varying pore
width under a bias voltage of Vbias¼ 20 mV, where the ribbon size
(L¼ 5.8 nm, W¼ 4.9 nm) and pore length (Lp¼ 1.6 nm) are kept constant.
Np¼ 7, 19 and 31 corresponds to pore widths Wp¼ 0.7 nm, 2.2 nm, and
3.7 nm, respectively.
023709-3 W. Qiu and E. Skafidas J. Appl. Phys. 116, 023709 (2014)
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widths are [74.2 65.5 63.2] mV/decade and [0.013 0.21 18.6]
� 104, respectively. The transmission spectrum of these
GNPs, shown in the supplementary information Fig. S9,21
reveals that larger pores are more effective in bandgap-
opening. As can be seen from these results, as long as the
pore is adequately large, good OFF-state current and SS per-
formances are achieved. In addition, the ION/IOFF ratio can
be made increasingly large by simultaneously widening the
ribbon and pore, which is a unique feature of GNP-FETs.
Finally, we evaluate the effects of graphene edge
defects. Three GNPs with vacancy defects are considered
where GNP_D1 has one broken pore-edge, GNP_D2 has two
broken pore-edges, and GNP_D3 has a circular pore.
Supplementary information Figs. S10-S1321 depict the geo-
metries of these GNPs and their transmission spectra. There
it can be seen that all the three irregular pores are able to
open the bandgap. The defect-induced performance changes
can be observed in Fig. 8, where the current vs. gate voltage
curves of the corresponding GNP-FETs are shown. It can be
seen that, as compared to its perfect edge counterpart,
GNP_D1-FET has a deterioration of �15 mV/decade in SS
and an order of magnitude drop in ION/IOFF ratio due to
increased leakage current. While GNP_D2-FET and
GNP_D3-FET exhibit reasonably good SS and Ion/Ioff
ratios, the curves are no longer symmetric in respect to the
current minimum and there are low-slope regions where the
current changes slowly in response to gate voltage change.
In practice, the effects of possible edge defects due to limita-
tions on the precision of fabrication processes need to be
properly evaluated and addressed.
III. SUMMARY
The proposed GNP-FET structure achieves comparable
OFF-state leakage current and switching speed as compared
with other graphene FET proposals and significantly outper-
forms them in the ION/IOFF ratio. In addition, they can be cre-
ated on arbitrarily wide ribbons and do not require complex
fabrication process involved in doping or edge-defecting.
However, defect-induced performance changes need to be
taken into account when fabricating real devices.
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FIG. 8. Current vs. gate voltage (Vbias¼ 20 mV) of the perfect-edge
GNP_PER-FET (with GNP structure shown in supplementary information
Fig. S1) and GNP-FETs with vacancy defects (with GNP structures shown
in supplementary information Figs. S10–S12).
023709-4 W. Qiu and E. Skafidas J. Appl. Phys. 116, 023709 (2014)
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