guest editorial special section on the advanced semiconductor manufacturing conference
TRANSCRIPT
562 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 17, NO. 4, NOVEMBER 2004
Guest EditorialSpecial Section on the Advanced
Semiconductor Manufacturing Conference
S INCE 1990, the Advanced Semiconductor ManufacturingConference (ASMC), which is sponsored by Semicon-
ductor Equipment and Materials International (SEMI), theIEEE Components, Packaging, and Manufacturing TechnologySociety (CPMT), and the IEEE Electron Device Society (EDS)is discussing solutions that improve the semiconductor man-ufacturing process. For equipment and materials suppliers,and device manufacturers, ASMC provides unparalleled op-portunities for semiconductor professionals to network andlearn the latest in manufacturing strategies and methodologiesto achieve manufacturing excellence. ASMC presents solu-tions in the areas of advanced metrology, advanced processes,contamination free manufacturing (CFM), cost reduction,equipment reliability & productivity, factory automation, fac-tory dynamics, industrial engineering, 300 mm manufacturing,MEMS, discrete and power devices, photolithography chal-lenges, and advances, time-to-market, yield enhancement, andyield modeling.
The purpose of this Special Section of the IEEETRANSACTIONS ON SEMICONDUCTOR MANUFACTURING isto provide a wider dissemination of selected material presentedat the 2002 ASMC to the semiconductor manufacturing com-munity. The first paper will discuss line-profile and criticaldimension measurements using a normal incidence opticalmetrology system. To enhance yield and reliability, a paperwill describe DFM methods using automated minor layout
Digital Object Identifier 10.1109/TSM.2004.835730
modifications. One paper will study the effect of hafnium orzirconium contamination on MOS processes while anotherpaper investigates yield learning and the sources of profitabilityin semiconductor manufacturing and process development.Then, a paper will characterize copper voids in dual damasceneprocesses. The sidewall clean effect upon titanium salicidefilaments is described in one paper, while another one willintroduce comprehensive and easy to use SEM analysis struc-tures for BiCMOS process development. Also, an efficientthree-dimensional wafer inspection simulator is presented fornext generation lithography. Finally, an historical perspectiveof in-line defect reduction will be evaluated with respect on itsimplications for future integrated circuit manufacturing.
ASMC rotates between North America and Europe everyother year. The 2004 meeting was held in Boston, MA, andnext year’s meeting will be held in Munich, Germany startingApril 11, 2005 in conjunction with SEMICON Europe.
We would like to thank the authors and the reviewers for theircontribution in preparing, reviewing, and refining the papers inthis issue. Without their important participation, this special sec-tion on advanced semiconductor manufacturing would not havebeen possible.
CHRISTOPHER HESS, Guest EditorPDF Solutions Inc.San Jose, CA 95110 USA
LARG H. WEILAND, Guest EditorPDF Solutions Inc.San Jose, CA 95110 USA
0894-6507/04$20.00 © 2004 IEEE
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 17, NO. 4, NOVEMBER 2004 563
Christopher Hess (S’94–A’98–M’00) was born in Wiesbaden, Germany. He received thediploma degree in electrical engineering from the University of Karlsruhe, Germany, in 1992,and the Dr.-Ing. (Ph.D.) degree in computer science from the University of Karlsruhe, Germany,in 1998.
In 1992, he joined the Institute of Computer Design and Fault Tolerance at the University ofKarlsruhe as a founding member of the Defect Diagnosis Group. In 1998, he moved to the USand joined PDF Solutions in San Jose, CA. As a Fellow, he is currently responsible for Yield andPerformance Characterization. His research interests include defect detection and localizationtechniques as well as defect analysis in semiconductor manufacturing processes. Since 1992, hehas been involved in the design of more than 50 test chips for the microelectronics industry in sev-eral areas which include copper metallization processing, yield, and performance enhancement,as well as microelectronic test structures for the extraction of defect size distributions and thecharacterization of failure modes in integrated circuits. He has developed yield ramp test struc-
tures that allow fast and efficient testing which is key to wafer level and lot level data acquisition and analysis that is required forstatistical process control targeting yield and performance improvements. He has published more than 30 conference and journalpapers.
Dr. Hess is a Member of the IEEE Electron Device Society. He is a technical committee member of several semiconductormanufacturing related conferences. He has served as Technical Chairman of the 2000 International Conference on MicroelectronicTest Structures (ICMTS) and General Chairman of ICMTS in 2003.
Larg H. Weiland (M’93) was born in Konstanz, Germany. He received the diploma degree inphysics from the University of Karlsruhe, Germany, in 1992, and the Dr.-Ing. (Ph.D.) degree incomputer science from the University of Karlsruhe, Germany, in 1998.
In 1993, he joined Institute of Computer Design and Fault Tolerance at the University of Karl-sruhe. There, he was co-founder of the Defect Diagnosis Group. In 1998, he joined PDF SolutionsInc., San Jose, CA. Since 2000, he is managing the test structure design automation group at PDF.He has authored or coauthored over 30 journal and conference papers. His research interests in-clude physics of defect mechanisms in semiconductor manufacturing processes. He is involvedwith the microelectronics industry in several areas, which include metallization processing, teststructure design automation, digital and optical measurements on test chips, and fast defect diag-nosis from digital tester data.
Since 1993, Dr. Weiland is a Member of the IEEE Electron Device Society. In 1998, he joinedthe organizing committee of the SPIE Microelectronic and MEMS Technologies conference. He
has chaired a number of test structure and manufacturing related conferences like ICMTS, ASMC, and SPIE’s MicroelectronicManufacturing.