halbleiterlabor der max-planck- institute für physik und extraterrestrische physik lothar strüder...

Halbleiterlaborder Max-Planck-

Institutefür Physik und

extraterrestrische Physik

Lothar Strüder SRON, Utrecht 26.10.2004

Front end electronics @ low Temperature

1. Parallel processing of analog signals

■ Time continuous filtering

■ Time discrete filtering

2. Readout strategies

■ Multiplexing

■ Readout chain per channel

3. Complexity of frontend ASICS

■ Preamplification ■ Signal Shaping

■ S&H and further amplification

■ Multiplexer

■ ADC, etc.

4. Expertise @ MPE, potential contributions

■ ASICs operated @ 30 K to R.T.

■ Test facilities





The XEUS WFI





Prototype matrices

Ceramic Hybrid

64 x 64 pixel arrays with 75 x 75 m2 pixel size Complete set of control & readout electronics





0 1 2 3 4 5 6 71

10

100

1000

10000

Si-KAl-K

Mn-KMn-K

Cou

nts

Energy (keV)

Escape Peak

Energy resolution of DEPMOSFET arrays

Energy resolution: 126 eV FWHM @ Mn-Ka Line

corresponding to 5.8 e- ENC@ 400 frames per second

T = - 35o C





World record of room temperature spectroscopy

Recorded @ τ = 6 µs, continuous signal shaping, single pixel with 75 x 75 µm 2





Imaging

500 m

800 m4.5 mm

15 mm

Illumination from backside Baffle: 300 m thick silicon Minimal structure size: 150 m Exposure ca. 100000 frames Readout speed: 400 fps

10 20 30 40 50 60

10

20

30

40

50

60

Column #

Row

#

0225.0450.0675.0900.01125135015751800202522502475270029253150337536003825405042754500

# Hits

Hitmap with 100 ADU threshold

10 20 30 40 50 60

10

20

30

40

50

60

Column #

Row

#

-1.370E5-9.255E4-4.810E4-36504.080E48.525E41.297E51.742E52.186E52.631E53.075E53.520E53.964E54.409E54.853E55.298E55.742E56.187E56.631E57.076E57.520E5

Values

Contour plot from ADU maps





Frontend ASIC‘s – CAMEX block diagram

CD

S-

filt

er

JF

ET

-a

mp

lifi

er

sa

mp

le&

ho

ld

ca

ble

dri

ver

control (digital, shiftregister)

communication

se

rial

ize

r

cu

rren

t s

ou

rce

INOUT





Signal Filtering - CDS weighting function

-30

-20

-10

0

10

20

30

-2.25 -2 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0

time [µs]

Ws

(t)

[arb

. un

its

]

0

0.2

0.4

0.6

0.8

1

1.2

-2.25 -2 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0

time [µs]

Wp

(t)

[arb

. un

its

]

0

0.5

1

1.5

2

0 2 4 6 8 10

frequency [MHz]

Hs(

f) [

arb

. un

its]





Signal Filtering – triangular shaping (integration)

What filter function leads to the best SNR ?

» with a given measurement time

» with real detector signals

» with real noise contributions

» with a practical ASIC implementation(power constrain, ktc reset noise ...)

0

0.2

0.4

0.6

0.8

1

1.2

-2.25 -2 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0

time [µs]

Wp

(t)

[arb

. u

nit

s]

-1.5

-1

-0.5

0

0.5

1

1.5

-2.25 -2 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0

time [µs]

Ws

(t)

[arb

. un

its

]

0

0.5

1

1.5

2

0 2 4 6 8 10

frequency [MHz]

Hs

(f)

[arb

. u

nit

s]





Signal Filtering – CDS & shaping time

RMS serial white noise over shaping time per 1nV/sqrt(Hz)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0 10 20 30 40 50

shaping time in µs

RM

S n

ois

e @

inp

ut 8xCDS BW=2.5MHz

8xCDS BW=1.0MHz

8xCDS BW=0.5MHz

triangular





Frontend ASIC‘s in Use

» CMX132 (CCD)

» CMXDUO (CCD)

» CMX64G (DEPFETs)

» SWITCHER II (DEPFETs)

» CURO (DEPFETs)

» DRAGO-ASIC (SDD)

» SYS48 (SDD)

developed in cooperation with• Politecnico di Milano & INFN• University Bonn• Ingenieurbuero Buttler





Test facilities at the MPE

1. Test facility PANTER

Length: 130 m, big vacuum vessel (4 x 4 x 9 m3)

Energy bandwidth: 178 eV to 17.5 keV

Flat fields and pencil beams

High monocromacy (transmission gratings, crystal

monocromater ...)





Test facilities at MPE

2. The test facilities

PUMA

ROESTI

CALIFA





Potential MPE contributions to the European cryogenic activities

1. Cooperation in the field of cryogenic frontend

electronics

(ASIC preamp, shaper, S&H, ADC, DAQ,

Sequencing, ...)

2. Testing of ``cold electronics´´ and

test of devices and systems (supplying test

facilities)

3. MPE does not have plans to develop own

cryogenic

detectors, but . . .





Frontend ASIC‘s - FTD ASIC

The FTD ASIC is a multichannel readout ASIC

• For use with asynchronous detectors like SDD‘s

• The ASIC targets detectors with a „small“ number of pixels (like multichannel drift detectors)

• Includes CRRC shapers in parallel architecture

• Variable shaping time allows application specific trade-off between count rate and noise

FTD

analog output signals

MCDRIFT

CR

RC

filte

r

JFET

-am

plifi

erpole zero

cancelation

curr

ent s

ourc

e high pass

low pass





Frontend ASIC‘s - CAMEX

CAMEX is a multichannel readout ASIC

• For use with synchronous detectors like

CCD and DEPFET PIXEL

• Filtering carried out in parallel architecture

• S&H stage and output serialiser

• Integrated programable timing generator

(modular and low pincount)

• Cascadeable

CCD

CMX CMXclk

PHIsignals

analog output signals

CD

S-

filt

er

JFE

T-

amp

lifie

r

sam

ple

& h

old

cab

led

rive

r

control (digital, shiftregister)

communication

seri

aliz

er

curr

ent

sou

rce

INOUT

halbleiterlabor der max-planck- institute für physik und extraterrestrische physik lothar strüder...

Documents

time folie

test facilities folie

adu maps folie

xeus wfi folie

o c folie

frontend asics ftd asic

multichannel readout

asic targets detectors