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(12) EUROPEAN PATENT APPLICATION

(43) Date of publication: 30.06.2010 Bulletin 2010/26

(21) Application number: 08291230.4

(22) Date of filing: 23.12.2008

(51) Int Cl.:H04B 15/02 (2006.01)

(84) Designated Contracting States: AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TRDesignated Extension States: AL BA MK RS

(71) Applicant: Motorola, Inc.Schaumburg, IL 60196 (US)

(72) Inventors: • Chance, Gregory W.

Round Lake Beach, Illinois 60073 (US)

• Peyrusse, Olivier31000 Toulouse (FR)

• Zirphile, Lionel J.31200 Toulouse (FR)

(74) Representative: Cross, Rupert Edward BlountBoult Wade Tennant Verulam Gardens 70 Gray’s Inn RoadLondon WC1X 8BT (GB)

(54) Method and apparatus for spur cancellation

(57) A method (500) and apparatus (400) of clockharmonic spur removal entails calculating (502) an exactfrequency of a clock harmonic spur from Automatic Fre-quency Control (AFC) values, measuring (504) a spur

magnitude and a spur phase of the clock harmonic spur,and canceling (506) a clock harmonic causing the clockharmonic spur and a processor (402) that is operable toperform these functions.

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Description

FIELD

[0001] This subject matter herein relates generally tospur cancellation and more particularly to methods anddevices for removing spurs.

BACKGROUND

[0002] Modern multimode radios utilize multiple digitalclocks of different frequencies. These digital clocks pro-duce undesired clock harmonics, known as spurs or clockharmonic spurs that can fall within desired radio channelsand desense the radio receiver. Clock harmonics are sig-nals at multiples of given clock frequencies in a system.In many cases it is impossible to set the clock frequenciesto avoid having the spurs fall within desired radio chan-nels. Reducing the spurs to an acceptable level is notalways possible or requires hardware changes which canbe expensive and extend development time.[0003] Most modern techniques for spur removal re-quire the calibration of the spur frequency, magnitude,and phase "offline". In other words, the spur is calibratedwithout any desired signal present in order to accuratelyestimate the spur. Several existing techniques removethe spur in the frequency domain by subtracting the mag-nitude and phase of the calibrated spur from the associ-ated FFT bins rather than removing the spur in the timedomain. Furthermore, existing techniques fail to accu-rately calculate the frequency of the spur or accuratelyestimate the magnitude and phase thereof, and hencefail to provide an accurate cancellation of the spur. SUM-MARY[0004] Embodiments in accordance with the presentinvention can provide a method and apparatus of cance-ling spurs that result from clock harmonics or other pre-dictable sources.[0005] In a first embodiment of the present invention,a method of clock harmonic spur removal entails calcu-lating an exact frequency of a clock harmonic spur fromAutomatic Frequency Control (AFC) values, measuringa spur magnitude and a spur phase of the clock harmonicspur, and canceling a clock harmonic causing the clockharmonic spur.[0006] In a second embodiment of the present inven-tion, a method of spur removal involves calculating anexact frequency of a predictable spur from known param-eters, measuring a spur magnitude and a spur phase ofthe predictable spur, and canceling a harmonic causingthe predictable spur.[0007] In a third embodiment of the present invention,a device can include a controller operable to calculatean exact frequency of a clock harmonic spur from Auto-matic Frequency Control (AFC) values, measure a spurmagnitude and a spur phase of the clock harmonic spur,and cancel a clock harmonic causing the clock harmonicspur.

[0008] The terms "a" or "an," as used herein, are de-fined as one or more than one. The term "plurality," asused herein, is defined as two or more than two. The term"another," as used herein, is defined as at least a secondor more. The terms "including" and/or "having," as usedherein, are defined as comprising (i.e., open language).The term "coupled," as used herein, is defined as con-nected, although not necessarily directly, and not neces-sarily mechanically.[0009] The terms "program" or "software application"are defined as a sequence of instructions designed forexecution on a computer system. A program, computerprogram, or software application may include a subrou-tine, a function, a procedure, an object method, an objectimplementation, an executable application, an applet, aservlet, a source code, an object code, a shared library/dynamic load library and/or other sequence of instruc-tions designed for execution on a computer system. Theterm "predictable spur" can mean spurs that not onlycome from clock harmonics, but that have a predeter-mined frequency or presence in a received signal. A pre-dictable spur can also be any constant sine wave-likeinterfering signal.[0010] Other embodiments, when configured in ac-cordance with the inventive arrangements disclosedherein, can include a system for performing and a ma-chine readable storage for causing a machine to performthe various processes and methods disclosed herein.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1 is a flow diagram illustrating a method ofspur in accordance with an embodiment of the presentinvention.[0012] FIG. 2 is device providing sources of clock har-monics in accordance with an embodiment of the presentinvention.[0013] FIG. 3 is a block diagram of an electronic devicein accordance with an embodiment of the present inven-tion.[0014] FIG. 4 is flow chart illustrating a method of spurcancellation in accordance with an embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE DRAWINGS

[0015] While the specification concludes with claimsdefining the features of embodiments of the inventionthat are regarded as novel, it is believed that the inventionwill be better understood from a consideration of the fol-lowing description in conjunction with the figures, in whichlike reference numerals are carried forward.[0016] Embodiments herein can be implemented in awide variety of ways using a variety of technologies thatenable not only cancellation of clock harmonic spurs butcancellation of any constant sine wave-like interferingsignal, regardless of its source. The presence and fre-quency of the spur in the received signal should be known

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beforehand. The actual source does not matter in theprocessing performed.[0017] More particularly in one embodiment, channelscorresponding to reference clock harmonics (e.g.18*52MHz = 936MHz) typically have issues with receiverdesense due to clock harmonic interference. The clockharmonic spur frequency can be calculated from an au-tomatic frequency control (AFC) value that is applied.Clocks with the same AFC value as the radio frequencylocal oscillator or RF LO can be downconverted to DC(for example, after very low intermediate frequency orVLIF downconversion). Thus, clocks using the same AFCcorrection as the RF LO can use a DC offset removalalgorithm to remove spurs.[0018] Clocks that are not AFC corrected (for examplea temperature controlled crystal oscillator or TCXO) orcorrected by a different AFC value may show up as anin-band spur. This can present a problem if the spur isoutside of DC offset removal algorithm bandwidth.[0019] Spur estimation can be done by calculating anexact frequency of the spur using AFC values. In partic-ular

Harmonics of uncorrected clocks have a frequencyoffset equal to the AFC value applied to the RF LO.Harmonics of clocks corrected by a different AFCvalue have a frequency offset equal to the differenceof the AFC value applied to the clock and the AFCvalue applied to the RF LO

[0020] The magnitude and phase of a spur can bemeasured in a variety of ways. One technique uses thecorrelation of the signal with sinusoid at spur frequency.In this regard, the Goertzel algorithm could be considered(same as single bin DFT)

It is also possible to incorporate channel estimation usingan LS or Lindoff method to determine magnitude andphase with better accuracy. See "BER PerformanceAnalysis of a Direct Conversion Receiver" by Bengt Lind-off and Peter Malm, IEEE Transactions on Communica-tions, VOL. 50, NO. 5, MAY 2002.[0021] Note that a Sine wave 180 degrees out of phasecan be added to a burst signal to achieve spur cancella-tion. This technique is significantly more frequency se-lective than a notch filter and avoids any group delayissue. The techniques herein have a very accurate fre-quency for the spur since it is calculated from AFC values.The accuracy of the magnitude and phase estimation isalso significant. A correlation method may be limited dueto accuracy concerns. The LS or Lindoff method provides

better accuracy for more processing power or MIPS. Thetechniques herein are best for spurs with low phase noise(for example, TCXO harmonics), but are not necessarilylimited thereto.[0022] Referring to FIG. 1, a method 100 of spur can-cellation in the context of GSM modulation or signalingis shown that includes the steps of buffering a slot (or148 symbols) of received I and Q data samples at 102and estimating at 106 the magnitude (M) and the phase(φ) of the clock harmonic spur using a calculated frequen-cy of the spur based on AFC values obtained at 104. Acomplex sine wave or waves can be generated at 108.The complex sine wave or waves can be added at theexact spur frequency at the estimated spur magnitudeand at 180 degrees out of phase with the estimated spurphase to the received data at 110 to cancel the clockharmonic spur.[0023] Referring to FIG. 2, a processor 200 illustratesseveral sources of clock harmonics that come from eithercorrected clocks 202 generated by the PLL clock 204 oruncorrected clocks 201. The RF LO 206 is corrected ac-cording to AFC 207. Harmonics of uncorrected clocks201 are seen within the desired channel having a fre-quency offset equal to -AFC 207. Harmonics of correctedclocks 202 generated by the PLL clock 204 are seenwithin the desired channel having a frequency offsetequal to AFC 205 - AFC 207.[0024] In another embodiment of the present inventionas illustrated in the diagrammatic representation of FIG.3, an electronic product 401 such as a machine havinga display 410 can include a processor or controller 402coupled to the display. The device 401 can be a hand-held device selected among a cellular phone, a personaldigital assistant, a smart phone, an MP3 Player, a musicplayer, a remote controller, a wrist-worn computer, anda watch for example. Generally, in various embodimentsit can be thought of as a machine in the form of a computersystem 400 within which a set of instructions, when ex-ecuted, may cause the machine to perform any one ormore of the methodologies discussed herein. In someembodiments, the machine operates as a standalone de-vice. In some embodiments, the machine may be con-nected (e.g., using a network) to other machines. In anetworked deployment, the machine may operate in thecapacity of a server or a client user machine in server-client user network environment, or as a peer machinein a peer-to-peer (or distributed) network environment.For example, the computer system can include a recip-ient device 401 and a sending device 450 or vice-versa.[0025] The machine may comprise a server computer,a client user computer, a personal computer (PC), a tabletPC, personal digital assistant, a cellular phone, a laptopcomputer, a desktop computer, a control system, a net-work router, switch or bridge, or any machine capable ofexecuting a set of instructions (sequential or otherwise)that specify actions to be taken by that machine, not tomention a mobile server. It will be understood that a de-vice of the present disclosure includes broadly any elec-

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tronic device that provides voice, video or data commu-nication or presentations. Further, while a single machineis illustrated, the term "machine" shall also be taken toinclude any collection of machines that individually orjointly execute a set (or multiple sets) of instructions toperform any one or more of the methodologies discussedherein.[0026] The computer system 400 can include a con-troller or processor 402 (e.g., a central processing unit(CPU), a graphics processing unit (GPU, or both), a mainmemory 404 and a static memory 406, which communi-cate with each other via a bus 408. The computer system400 may further include a presentation device such theflexible display 410. The computer system 400 may in-clude an input device 412 (e.g., a keyboard, microphone,etc.), a cursor control device 414 (e.g., a mouse), a diskdrive unit 416, a signal generation device 418 (e.g., aspeaker or remote control that can also serve as a pres-entation device) and a network interface device 420. Ofcourse, in the embodiments disclosed, many of theseitems are optional.[0027] The disk drive unit 416 may include a machine-readable medium 422 on which is stored one or moresets of instructions (e.g., software 424) embodying anyone or more of the methodologies orfunctions describedherein, including those methods illustrated above. Theinstructions 424 may also reside, completely or at leastpartially, within the main memory 404, the static memory406, and/or within the processor or controller 402 duringexecution thereof by the computer system 400. The mainmemory 404 and the processor or controller 402 alsomay constitute machine-readable media.[0028] Dedicated hardware implementations includ-ing, but not limited to, application specific integrated cir-cuits, programmable logic arrays, FPGAs and other hard-ware devices can likewise be constructed to implementthe methods described herein. Applications that may in-clude the apparatus and systems of various embodi-ments broadly include a variety of electronic and com-puter systems. Some embodiments implement functionsin two or more specific interconnected hardware modulesor devices with related control and data signals commu-nicated between and through the modules, or as portionsof an application-specific integrated circuit. Thus, the ex-ample system is applicable to software, firmware, andhardware implementations.[0029] In accordance with various embodiments of thepresent invention, the methods described herein are in-tended for operation as software programs running on acomputer processor. Furthermore, software implemen-tations can include, but are not limited to, distributedprocessing or component/object distributed processing,parallel processing, or virtual machine processing canalso be constructed to implement the methods describedherein. Further note, implementations can also includeneural network implementations, and ad hoc or meshnetwork implementations between communication de-vices.

[0030] The present disclosure contemplates a ma-chine readable medium containing instructions 424, orthat which receives and executes instructions 424 froma propagated signal so that a device connected to a net-work environment 426 can send or receive voice, videoor data, and to communicate over the network 426 usingthe instructions 424. The instructions 424 may further betransmitted or received over a network 426 via the net-work interface device 420.[0031] While the machine-readable medium 422 isshown in an example embodiment to be a single medium,the term "machine-readable medium" should be taken toinclude a single medium or multiple media (e.g., a cen-tralized or distributed database, and/or associated cach-es and servers) that store the one or more sets of instruc-tions. The term "machine-readable medium" shall alsobe taken to include any medium that is capable of storing,encoding or carrying a set of instructions for executionby the machine and that cause the machine to performany one or more of the methodologies of the presentdisclosure.[0032] Referring to FIG. 4, a method 500 of spur can-cellation can entail calculating at 502 an exact frequencyof a predictable spur (such as clock harmonic spur) fromknown parameters (such as Automatic Frequency Con-trol (AFC) values), measuring at 504 a spur magnitudeand a spur phase of the predictable spur (clock harmonicspur), and cancelling at 506 a (clock) harmonic causingthe predictable spur or clock harmonic spur. The clockharmonic can be cancelled in various ways in accordancewith the embodiments. One technique at 508 can cancelthe clock harmonic using a Discrete Fourier Transform(DFT) or a Goertzel algorithm over a slot at an exact spurfrequency to estimate the spur magnitude and the spurphase of the clock harmonic spur, and add a complexsine wave at the exact spur frequency at the estimatedspur magnitude and at 180 degrees out of phase withthe estimated spur phase to received data to cancel theclock harmonic spur. Another technique at 510 can can-cel the clock harmonic using a least squares method ora Lindoff method to estimate a clock harmonic spur mag-nitude and phase over a slot and wherein a complex sinewave is added at the estimated magnitude and at 180degrees out of phase with the estimated phase to the slotto cancel the clock harmonic spur. In yet another alter-native at 512, the method can cancel the clock harmonicby downconverting an impaired received signal so thatthe clock harmonic spur is shifted to Direct Current (DC),averaging the downconverted received signal over a timeperiod (such as a time slot or a plurality of time slots) todetermine a spur magnitude and phase, canceling outthe DC to provide a resultant signal, and upconvertingthe resultant signal using a same clock harmonic spurfrequency.[0033] At 514, the method 500 can estimate the mag-nitude and the phase of the clock harmonic spur in thepresence of a desired signal, and then remove the clockharmonic spur from a same set of data samples that were

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used for the estimates of the magnitude and the phaseof the clock harmonic spur. In yet another embodiment,the method 500 at 516 can buffer a single slot of datasamples, estimate on the data samples of the single slotthe magnitude and the phase, and Cancel the clock har-monic spur on the data samples. Note that the clock har-monic spur can be cancelled in the time domain at 518.[0034] Further note that in accordance with the em-bodiments, the method 500 at 520 can accurately calcu-late the exact frequency of the clock harmonic spur basedon AFC values and estimate the magnitude and phaseof the clock harmonic spur at the exact frequency of theclock harmonic spur. Further note that multiple clock har-monic spurs can be cancelled based on different AFCvalues at 522. Finally note that the method 500 can turnoff the canceling of the harmonic spur dynamically basedon a measured or a predicted desired signal level or spurlevel at 524.[0035] Most modern techniques for spur removal re-quire the calibration of the spur frequency, magnitude,and phase "offline". In other words, the spur is calibratedwithout any desired signal present in order to accuratelyestimate the spur. The embodiments herein estimate thespur magnitude and phase in the presence of the desiredsignal, and then remove the spur from the same set ofdata samples that were used for the estimation. For thecase of GSM/EDGE, a single slot of data samples is buff-ered, the spur magnitude and phase estimated on thedata samples in that slot, and the spur is then cancelledon the same data samples.[0036] Existing art removes the spur in the frequencydomain by subtracting the magnitude and phase of thecalibrated spur from the associated FFT bins. The em-bodiments herein remove the spur in the time domain.Canceling the spur in the frequency domain for GSM/EDGE would not likely be a good option due to the band-width of the bins. Similarly, a tunable notch filter wouldnot likely be a feasible idea for GSM/EDGE.[0037] Existing art identifies the frequency of the spurby the magnitude and phase found in a full set of FFTbins during calibration. If the spur falls at exactly the cent-er frequency of a bin, only one bin will require the cali-brated spur magnitude and phase be subtracted. If thespur falls between center frequencies of FFT bins, thespur energy will leak into multiple FFT bins and thesesame multiple bins will require subtraction of spur energyfound in the bins during calibration. Embodiments hereininstead accurately calculate the frequency of the spurbased on AFC values and estimates the magnitude andphase of the spur at that exact frequency. This accuratecalculation of the frequency allows us to do a more ac-curate estimation of the magnitude and phase, and al-lows a very accurate cancellation of the spur in the timedomain.[0038] In light of the foregoing description, it should berecognized that embodiments in accordance with thepresent invention can be realized in hardware, software,or a combination of hardware and software. A network

or system according to the present invention can be re-alized in a centralized fashion in one computer systemor processor, or in a distributed fashion where differentelements are spread across several interconnected com-puter systems or processors (such as a microprocessorand a DSP). Any kind of computer system, or other ap-paratus adapted for carrying out the functions describedherein, is suited. A typical combination of hardware andsoftware could be a general purpose computer systemwith a computer program that, when being loaded andexecuted, controls the computer system such that it car-ries out the functions described herein.[0039] In light of the foregoing description, it shouldalso be recognized that embodiments in accordance withthe present invention can be realized in numerous con-figurations contemplated to be within the scope and spiritof the claims. Additionally, the description above is in-tended by way of example only and is not intended tolimit the present invention in any way, except as set forthin the following claims.

Claims

1. A method of clock harmonic spur removal, compris-ing:

calculating an exact frequency of a clock har-monic spur from Automatic Frequency Control(AFC) values;measuring a spur magnitude and a spur phaseof the clock harmonic spur; andcancelling a clock harmonic causing the clockharmonic spur.

2. The method of claim 1, wherein the clock harmonicis cancelled using a Discrete Fourier Transform(DFT) or a Goertzel algorithm over a time period atan exact spur frequency to estimate the spur mag-nitude and the spur phase of the clock harmonic spur.

3. The method of claim 1, wherein the clock harmonicis cancelled by incorporating channel estimation us-ing a least squares method or a Lindoff method toestimate a clock harmonic spur magnitude andphase over a time period and wherein a complexsine wave is added at the estimated magnitude andat 180 degrees out of phase with the estimated phaseto the slot to cancel the clock harmonic spur.

4. The method of claim 1, wherein the clock harmonicis cancelled by downconverting an impaired re-ceived signal so that the clock harmonic spur is shift-ed to Direct Current (DC), averaging the downcon-verted received signal over a time period to deter-mine a spur magnitude and phase, canceling out theDC to provide a resultant signal, and upconvertingthe resultant signal using a same clock harmonic

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spur frequency.

5. The method of claim 1, wherein the time period is asingle time slot or a plurality of time slots.

6. The method of claim 1, wherein the method esti-mates the magnitude and the phase of the clock har-monic spur in the presence of a desired signal, andthen removes the clock harmonic spur from a sameset of data samples that were used for the estimatesof the magnitude and the phase of the clock harmonicspur.

7. The method of claim 1, wherein a single slot of datasamples is buffered, the magnitude and the phaseis estimated on data samples of the single slot, andthe clock harmonic spur is cancelled on the datasamples.

8. The method of claim 1, wherein the method cancelsthe clock harmonic spur in a time domain.

9. The method of claim 1, wherein the method accu-rately calculates the exact frequency of the clock har-monic spur based on AFC values and estimates themagnitude and phase of the clock harmonic spur atthe exact frequency of the clock harmonic spur.

10. The method of claim 1, wherein the method cancelsmultiple clock harmonic spurs based on differentAFC values.

11. A device, comprising:

a controller operable to:

calculate an exact frequency of a clock har-monic spur from Automatic Frequency Con-trol (AFC) values;measure a spur magnitude and a spurphase of the clock harmonic spur; andcancel a clock harmonic causing the clockharmonic spur.

12. The device of claim 11, wherein the clock harmonicis cancelled using a Discrete Fourier Transform(DFT) or a Goertzel algorithm over a predeterminedtime period at an exact spur frequency to estimatethe spur magnitude and the spur phase of the clockharmonic spur, adding a complex sine wave at theexact spur frequency at the estimated spur magni-tude and at 180 degrees out of phase with the esti-mated spur phase to received data to cancel theclock harmonic spur.

13. The device of claim 12, wherein the predeterminedtime period is a single time slot or a plurality of timeslots.

14. The device of claim 11, wherein the controller esti-mates the magnitude and the phase of the clock har-monic spur in the presence of a desired signal, andthen removes the clock harmonic spur from a sameset of data samples that were used for the estimatesof the magnitude and the phase of the clock harmonicspur.

15. The device of claim 11, wherein controller is operableto cancel multiple clock harmonic spurs using multi-ple AFC values.

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REFERENCES CITED IN THE DESCRIPTION

This list of references cited by the applicant is for the reader’s convenience only. It does not form part of the Europeanpatent document. Even though great care has been taken in compiling the references, errors or omissions cannot beexcluded and the EPO disclaims all liability in this regard.

Non-patent literature cited in the description

• Bengt Lindoff ; Peter Malm. BER PerformanceAnalysis of a Direct Conversion Receiver. IEEETransactions on Communications, May 2002, vol. 50(5 [0020]