1

HF mixer, switch & modulator design HF mixer, switch & modulator design

2

OutlineOutline

Mixer fundamentals & topologiesMixer fundamentals & topologies

Mixer design methodologyMixer design methodology

Example of up- and down-convert mixersExample of up- and down-convert mixers

SwitchesSwitches

Phase shifters Phase shifters

ModulatorsModulators

3

Mixer fundamentals (i)Mixer fundamentals (i)

The mixer is a multiplier used as a frequency The mixer is a multiplier used as a frequency translation device:translation device:

up-converter from IF to RFup-converter from IF to RF

down-converter from RF to IFdown-converter from RF to IF

Two input signals and one output signalTwo input signals and one output signal

Image frequency (undesired)Image frequency (undesired)

ω1

ω2

ω3

A cos1 t × B cos2 t =AB2

[cos1−2 tcos12 t ]

4

Mixer fundamentals (ii)Mixer fundamentals (ii)

Requires non-linear device:

diode,

HBT,

MOSFET

or time varying device (switch)

to generate "mixing" terms at sum and difference frequencies

Requires filtering at RF, LO and IF to select desired signal frequency

I V =IS[exp qVnKT −1 ]

iDS=

2[vGSt −VT ]

2

RFIF

LO

VBIAS

Lchoke

5

How do we get a non-linear deviceHow do we get a non-linear device

[ CSICS-2005 Primer Course]

6

Mixer fundamentals (iii)Mixer fundamentals (iii)Single-, two-port or three-port implementation

Present IC mixers use Gilbert-cell multiplication

ω1= ω

R F , ω

2= ω

L O and ω

1-ω

2= ω

I F

ω1= ω

Ι F , ω

2= ω

L O and ω

1+ω

2= ω

R F

A cos1 t Bcos2 t =AB2

[cos 1−2 tcos 12 t ]

VDD

LO+RF

IF

VDD

LO RF

IF

VDD

LO+

LO-

RF+

RF-

IF+

IF-

A

CQ

1

Q2

RL

QTAIL

RL

Q3

ITAIL

ITAIL

2iRF

ITAIL

2−iRF

Q'1

Q'2

Q'3

U

V

7

From CSICS-2005Primer Course

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Mixer topology: Gilbert (multiplier) cellMixer topology: Gilbert (multiplier) cell

I=IQ2−IQ3=IQ1×tanh U/2VT

VDD

LO+

LO-

RF+

RF-

IF+

IF-

A

CQ

1

Q2

RL

QTAIL

RL

Q3

ITAIL

ITAIL

2iRF

ITAIL

2−iRF

Q'1

Q'2

Q'3

U

V

VDD

LO+

LO-

RF+

RF-

IF+

IF-

A

CQ1

Q2

RL

QTAIL

RL

Q3

ITAIL

ITAIL

2iRF

ITAIL

2−iRF

Q'1

Q'2Q'

3

U

V

9

Mixer specificationMixer specification

RF, LO, IF frequencies

Conversion (power) gain

Linearity

Noise Figure (receive mixers only)

Isolation

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Conversion gainConversion gain

Conversion (power) gain (depends on LO power and mixing quad device type):

RF to IF in down-converters

IF to RF in up-converters

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Gilbert-cell mixer conversion gainGilbert-cell mixer conversion gain

Output (IF) voltage in BJT mixer

Voltage conversion gain for large square wave LO signal is (valid for HBT & MOSFET):

v IF=−2 RL Ibias tanh vRF

2 V T tanh vLO

2 VT

v IF

vRF

=−2

gm RL

tanh VLOcosLO t = 4

cosLO t 4

3 cos 3LO t

45

cos 5 LO t . .

12

LinearityLinearity

Linearity: – depends on transconductor (input amplifier) linearity and V

DS/V

CE of mixing quad transistors.

The 1 dB compression point: P1dB

Third-order intercept point: IIP3, OIP3

Second-order intercept point: IIP2, OIP2

Linearity in a cascade of stages:

1IIP3

=1

IIP31

G1

IIP32

G1×G2

IIP33

...G1×G2×...Gn−1

IIP3n

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Gilbert cell with degenerationGilbert cell with degeneration

Improves linearity

Inductive degeneration does not degrade noise figure

VDD

LO+

LO-

RF+

RF-

IF+

IF-

A

Q1

Q2

RL

QTAIL

RL

Q3

ITAIL

Q'1

Q'2

Q'3

RE

REC

VDD

LO+

LO-

RF+ RF-

IF+

IF-

A

CQ1

Q2

RL

QTAIL

LE

LE

RL

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Noise FigureNoise Figure

Double-sideband noise figure

NFDSB

= NFSSB

-3dB (if no image rejection)

Single-sideband noise figure (temperature)

NFDSB

= NFSSB

(if image rejection )

FDSB=1⟨v nout

2 ⟩kT G1G2

FSSB=1⟨v nout

2 ⟩kT G1

+

TSSB

TS

TS

TOUT

IM

RF

IF

G1

G2

TDSBT

S

TS

TOUT

+T

DSB

IM

RF

IF

G1

G2

+

IM

RF

IF

G1

G2

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Noise Figure (cont)Noise Figure (cont)

Mixer shot noise sources

@ DC

@ harmonics of LO (currents at LO harmonics comparable to DC currents).

0 3fosc

LO

Cur

rent

Freqfosc 2f

osc

⟨ in2⟩=2 q[

IDC˙ILO

˙I2LO

ILO IDC˙ILO

I2LO ILO IDC]×[

f LO−IF

f IF

f LOIF]

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Noise Figure (cont.)Noise Figure (cont.)

Frequency translation of noise sources

Large signals at harmonics of LO,

Small signals on either side of LO harmonics,

Hence noise from nfLO

+/- fIF translates to IF and to

the output

0 3fLO Freq2f

LOf

LOIF

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IsolationIsolation

Want it as high as possible

Implemented through choice of topology and/or filtering:

LO to IF

LO to RF

IF to LO

In Gilbert-cell mixer isolation is built-in

gmLO−IF=IQ1−IQ ' 1

2V T

×sech2 U2V T

≈0

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Transmit (up-converter) mixer topologyTransmit (up-converter) mixer topology

Doubly balanced

MOS, BJT and BiCMOS

IF linear input amplifier + mixing quad

IF signal applied to bottom pair

LO signal applied to mixing quad

RF BPF (tuned) output at top

Image rejection must be placed after mixing quad or built into the topology

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Receive (down-converter) mixer topologyReceive (down-converter) mixer topology

Doubly balanced

Good for MOS, BJT and BiCMOS

RF (low-noise) linear input amplifier + mixing quad

RF signal applied to bottom pair

LO signal applied to mixing quad

IF LPF output

LO and or RF trap at IF output

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Receive (down-converter) mixer topologyReceive (down-converter) mixer topology

Image rejection must be placed before mixing quad or

built into the topology.

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Improved-mixer topologiesImproved-mixer topologiesGilbert cell with transformer coupling of RF and IF signals: lower supply voltage but higher noise and conversion loss

Folded cascode Gilbert cell (lower supply voltage)

BiCMOS Gilbert cell with MOS input and HBT quad (better linearity, lower LO swing)

VDD

LO

RF

IF

VDD

VRF

LD

CD

LS

LD

Q1

Q2

LG

LS

LG

CD

LSS

CSS

RL

RL

VLO

Q3

Q4

Q5

Q6

VIF

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mm-Wave image reject mixer topologiesmm-Wave image reject mixer topologies

Use 90o and 180o hybrid couplers.

90o coupler: Lange or branchline

180o coupler: ratrace (Marchand) balun

In-phase Wilkinson power splitter

00

900IN

I

Q

00

900

IN

Z0

+

I

Q

00

900

IN

Z0

[S]=−1

2 [0 j 1 0j 0 0 11 0 0 j0 1 j 0

]

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From CSICS-2005Primer Course

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909000 and 180 and 1800 h0 hybrid couplers (broadband)ybrid couplers (broadband)

Lange Coupler180o Ratrace Coupler

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909000 phase shifter (lumped) phase shifter (lumped)

[ VOI+ , -

VOQ+ , -]=V i n× [

±s22

0

Qs−0

2

s220

Qs0

2

∓s2−20

Qs−0

2

s22

0

Qs0

2]

Q= L

CR

and 0=1

LC

C

C

L 2R

2RL

Vin+

Vin-

VOI+

VOI-

VOQ-

VOQ+

L=1.414k=0.707

CM

=1 CM

=1

CG=0.414C

G=0.414 C

G=0.414

0 =1

LC 1−k 2

C =C MC G , C M

C=k

Z 0 = LC

VIN

VCPL

VTHRU

VISO

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Low noise mixer design methodology Low noise mixer design methodology (as for LNA) (as for LNA) (S. Voinigescu & M.Maliepaard, ISSCC-1997)(S. Voinigescu & M.Maliepaard, ISSCC-1997)

Bias @ minimum NF current density (if power gain is still

adequate at fosc

.

Size transistor for optimal noise resistance - active matching

"Source" impedance is the LNA output impedance

Add inductive emitter degeneration LE to meet linearity target

(more important than noise and conversion gain). MOSFET

input is more linear.

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Low noise mixer design methodology (II)Low noise mixer design methodology (II)

If mixer is designed for noise matching to impedance Zo

then linearity is given by:

LO swing must be large enough to fully switch the

mixing quad, yet not too large to cause transistor

saturation. MOSFET quad is inferior to HBT quad due

to larger LO swing requirement.

IIP3∝gm Z0

2 f T

; where LE=Z0

2 f T

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5-GHz single-chip SiGe radio 5-GHz single-chip SiGe radio (S.Voinigescu et al. IEEE MTT-S 1999)(S.Voinigescu et al. IEEE MTT-S 1999)

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5-GHz single-chip SiGe radio 5-GHz single-chip SiGe radio

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5-GHz SiGe Radio: Rx and TX linearity5-GHz SiGe Radio: Rx and TX linearity

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mm-Wave Gilbert cell mixer examplesmm-Wave Gilbert cell mixer examples

3kΩ

50Ω

60nX48X1u

85nX120X1u85nX2X1u1pF

IFOUT

VCS

50Ω

100pH

30pH 30pH

VBIAS

60nX24X1u

140pH 140pH

60nX24X1u

140Ω 140Ω

4kΩ

4kΩ

2kΩ

50pH

50pH

45pH

45pH

VDD

RFIN

LOIN

71-95 GHz

140-GHz Down-Conversion Mixer140-GHz Down-Conversion Mixer

• Consumes 12 mA from 1.2V (14.4 mW)Consumes 12 mA from 1.2V (14.4 mW)

[S. Nicolson RFIC-08]

33

100-GHz IQ Down-Conversion Mixer 100-GHz IQ Down-Conversion Mixer

IF_QIF_I LO_QLO_I

RF

24mA, 29mW

[M. Khanpour, M.A.Sc. Thesis 2008IEEE Trans. MTT, Dec. 2009]

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SwitchesSwitches

PIN and Schottky diodes, FETs

Ideally:

Ron

=0, Roff

= ∞, C=0

High isolation when off

low insertion loss when on

Topologies:

Shunt, series, series-shunt

Used as antenna switches

VCNTR

VCNTR

35

SwitchesSwitches

VCNTR

VCNTR

IL=−20⋅log101RSW

2Z 0

I=−20⋅log10 2RSW

2 RSWZ0

I=10⋅log10 [14 f CSW Z 0−2]

IL=10⋅log10 [1 f CSW Z 02]

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CMOS mm-wave switch examples CMOS mm-wave switch examples

Out1

Out2

OutN

In

VC1

VC1

VC2

VC2

VCN

VCN

Out1

Out2

OutN

In

VC1

VC1

VC2

VC2

VCN

VCN

Out1

Out2

OutN

In

VCNTR

VCNTR

VCNTR

VCNTR

Binary-Weighted GeometryBinary-Weighted Geometry

Idea:Idea: Shared source and drain, segmented gates Shared source and drain, segmented gates

• varactor, PA varactor, PA (R.B. Staszewski, 2006)(R.B. Staszewski, 2006)

• transistor: digitally-controlled attenuatortransistor: digitally-controlled attenuator

• Gilbert-cell biased at constant JGilbert-cell biased at constant JDSDS

– digitally-controlled gain cells

– digitally-controlled phase shifters

– mm-Wave IQ DACs

S

0<VG

<1

b0, b

1, .. b

n =”0” or “1”

b0 b1

D

S

G0.2mA/µm

D

bn

Jopt

0/Jopt

Binary-Weighted Atten./SwitchBinary-Weighted Atten./Switch

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CCOFFOFF = 1fF/ = 1fF/µµm, 42m, 42µµmm

RSHUNT=Runit

b0b12b222...bn−12n−1

IL=20⋅log1 Z0

2RSW=20log[1 25

Runitb0b1 2b2 22..bn−12n−1 ]

[A. Tomkins et al. CSICS-08]

b0 b1 b5

11µm 1µm 1µm

b0b1b5

11µm1µm1µm

L

39

IL<2 dB, ISOL>20dB up to 94 GHz

P1 d B

>+10dBm

Measurement ResultsMeasurement Results

40

Improving the CMOS switchImproving the CMOS switch

• Use deep N-well to reduce Use deep N-well to reduce

capacitance capacitance

• Use large resistor is series Use large resistor is series

with gate, substrate and n-with gate, substrate and n-

well to reduce loss and well to reduce loss and

improve linearityimprove linearity

• Stack transistors for Stack transistors for

improved linearityimproved linearity

VC N T R

RB

RN – W E L L

DeepN-WELL

RG

GND

IN OUT

p-well p-SUB

VC N T R

RB

RN – W E L L

DeepN-WELL

RG

IN OUT

p-well

VC N T R

RB

RN – W E L L

RG

GND

p-well

41

Phase shiftersPhase shifters

Each cell can be implemented as:

Switched line

Hybrid-coupled

Loaded line

High-pass low-pass

Can have analog or digital control

bo=(0,1)b

1=(0,1)b

2=(0,1)b

3=(0,1)

Vin

Vout

=Vine-j φ

=b0 22.50b1 4 50

b2 9 00b3 1800

00

900

l/2

l/2

l0

l0 + l

Port1 Port2

Port1

Port2

Port2Port1

-jB jB -jB jB

∆φ=βl

∆φ=βl

=2

=2

BN=BZ

0

λ/4

=2tan−1 BN

1−0.5 BN2

jX jX

-jX -jX

jB-jB

Port1 Port2

XN=tan

2 XN=XZ0

XN=XZ0

BN=sin

2

[S]PS=[ 0 e−j

e− j 0 ]

42

Cartesian and VGA-based phase shiftersCartesian and VGA-based phase shifters

00

900

+VCA

VCB

B

AI

Q

OUTIN

Z0

+VCA

VCB

B

A

OUT

IN

+VCA

VCB

B

A

OUT

IN

I

Q

φ

OUT=I jQ=∣OUT∣e j ∣OUT∣=I2Q2

=tan−1 QI

43

ModulatorsModulators

Require: phase shifters, hybrid couplers or isolators or a Gilbert cell

0-900

mod0-1800

mod

00

900

00

900

0-900

mod

0-1800

mod

0-1800

mod

0-1800

mod

900

00

900

0-1800

mod

0-1800

mod

a) b)

IN OUTIN OUT

OUTININ

OUT

b0b0

b0 b0

b1b1

b1

b1

44

Transformer-Coupled Gilbert Cell Transformer-Coupled Gilbert Cell

BPSK ModulatorBPSK Modulator MixerMixer

[A.Tomkins CICC-08] [A.Tomkins CICC-08] Xfmr coupling favoured over capacitor coupling

45

QPSK, m-ary QAM modulatorsQPSK, m-ary QAM modulators

VDD

OUT

QI

DataBIT1

DataBIT2

90 degree phase shifter

IN

b0 b1

I

Q

φ

1

2,

1

2

1

2,−1

2

−1

2,

1

2

−1

2,−1

2

aQ=I

T(Q)a

I=I

T(I)

Binary-weighted DAC/VGA Binary-weighted DAC/VGA V

DD

LO

bi

IB

LO

bi

Nf0=1

Nf1=2

Nf2=4

Nfn-1

=2n-1i=0..n-1

n

n n nn

OUT

Q1 Q2

Q3,4 Q5,6

W =W f 2n−1

• Binary-weighted or Binary-weighted or

segmented BPSK mods. segmented BPSK mods.

in parallelin parallel

• QQ3-63-6

binary-weighted gate binary-weighted gate

fingersfingers

• QQ1,21,2

biased at biased at 0.3 mA/0.3 mA/µµmm

• QQ3-63-6

switch from 0 to switch from 0 to

0.3mA/0.3mA/µµmm

• Load current, impedance Load current, impedance

remain constantremain constant

V OUT=g 'm W f Z L V LO∑i=0

n−1

−1bi 2i= f V LO×gw

mm-Wave IQ DAC/Phase Rotatormm-Wave IQ DAC/Phase Rotator

V OUT=g 'm W f Z L V IN [cos t ∑i=0

n−1

−1a i 2i jsin t ∑i=0

n−1

−1bi 2i]

VDD

OUT

QI

I Databits

Q Databits

90 degree phase shifter

IN

ai bi

I

Q

φ

IT

IT

[Eloranta et al, JSSC-07]

[S. Voinigescu IMS-08 Workshop]

48

SummarySummary

• Mixer performs the fundamental frequency translation Mixer performs the fundamental frequency translation

functionfunction

• Switches are critical building blocks for mixers, antenna Switches are critical building blocks for mixers, antenna

switches, phase shifters and modulatorsswitches, phase shifters and modulators

• Gilbert cell is the most common mixer topology todayGilbert cell is the most common mixer topology today

• Gilbert cell employed to realize VGA, modulators and Gilbert cell employed to realize VGA, modulators and

phase shiftersphase shifters

• Binary-weighted layout allows fine digital control/correction Binary-weighted layout allows fine digital control/correction

of all mm-wave blocks .of all mm-wave blocks .