high performance data center design with mds 9700
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High Performance Data Center Design with MDS 9700
Prashant Jain
Senior Product Manager, DCBU
Co-sponsored by Intel®
© 2013 Cisco and/or its affiliates. All rights reserved. Cisco Confidential 2
DC Design Requirements
•Performance• Throughput• Latency• Predictability
High Availability• Hardware• Software• Management
Flexibility Investment Protection
ROI, Simplicity
© 2013 Cisco and/or its affiliates. All rights reserved. Cisco Confidential 3
Design Requirements - Performance
Throughput
Non Blocking
Line Rate
Scalable
Latency
System-wide
Traffic Profile Independent
Predictability
Consistent High
Throughput
Consistent Low Latency
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PRESERVEIT OPERATIONS and
KNOWLEDGE
Ease of Migration with NX-OS and DCNM
GROWWITHOUT FORKLIFT
1.5 Tbps / SlotSwitching Capacity1
24Tbps Capacity1
With
CONSISTENT
OPERATIONS
SCALEFOR ANY SAN
Up to 384 Line Rate Ports
48x16G FC or
48x10G FCoE
Cisco MDS 9710 Multilayer DirectorFor Cloud and Massive Amounts of Data
THE PERFORMANCE
OF ANY DIRECTOR3X
CY’141 With 6 Fabric Cards
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MDS 9710 Performance Predictable, Line Rate Performance independent of traffic profile or DC Connectivity
No Forklift required for Higher Bandwidth Linecards in the future
Number of Fabric Cards
Front panel FC Bandwidth/Slot
Line rate 16G 3 768 Gbps
Line Rate 32G 6 1536 Gbps
Local Switching
1 When 32G FC and 40G FCoE Cards are introduced
Oversubscription
Bandwidth Sharing
Performance for the Decade Ahead
32G FC – Line Rate Performance1
40G FCOE Line Rate Performance1
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Latency for High Performance Data Center DesignConsistent and Predictable Latency is Extremely Important to any High Performance Application
Fibre Channel Fabric
InitiatorTarget
Application performance is impacted by End to End Latency
Initiators, Switches and Targets each contribute to End to End Latency
Switch Latency should be consistent and predictable.
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Architecture guarantees Consistent Throughput and LatencyIndependent of the load, packet size, port locations and other flows
Ingress
Egress
Crossbar
VOQ model
Frame to port 5Frame to port 5 Frame to port 6
Frame to port 4Frame to port 4
Frame to port 6
Frame to port 6Frame to port 4
Input queue at port 1
Top of virtual output queue
Input queue at port 1 Input queue at port 1
Top of virtual output queue Top of virtual output queueX
Crossbar based design
Virtual Output Queue (VOQ)
Central Arbiter
Consistent Switching Path
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Design Requirements - Performance
Throughput
Non Blocking
Line Rate
Scalable
Latency
System-wide
Traffic Profile Independent
Predictability
Consistent High
Throughput
Consistent Low Latency
Basic requirements that Director Class Platform should meet.
© 2013 Cisco and/or its affiliates. All rights reserved. Cisco Confidential 9
Design Requirements - High Availability
Hardware
Redundancy
Smaller Failure Domains
Data Integrity
Software
Non Disruptive Software Upgrades
Self Healing Software
Management
Automatic Management
Failover
Traffic Analytics
Architecture
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H/W Redundancy Data Integrity Software & Management
Fabric Cards
Supervisors
Power Supplies
Port Channels
FAN Trays
CRC Checks
FEC
Non Disruptive Software Upgrades
Process Restart
Fault Isolation
Management Server Failover
Path Redundancy Analysis
Basic requirements that Director Class Platform should meet.
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Core Switch
Targets • 128 Target ports @ 16G
2 MDS 9710 Core• 128 Core ISLs @ 16G
4 MDS 9710 Edge• 768 Hosts @ 8G• 640 Hosts @ 16G
Edge Switches
128 Target Ports @ 16Gbps
16Tbps
2 Tbps
2 Tbps
No Oversubscription
A Typical Edge Core design with MDS 9710
SAN-A
768 Hosts @ 8Gbps 640 Hosts @ 16 Gbps
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152 Core ISL Port
158 Target
Scale-out with FC or FCoE
Scalable• Scale up or Scale out• Non disruptive upgrade• No performance dependency• Mix match protocol and speeds
Hallmark of good architecture is capability to grow without redoing it.
152 Core ISL Port
19 Tbps
2.5 Tbps
768 Hosts @ 8Gbps, 828 Hosts @ 16 Gbps
© 2013 Cisco and/or its affiliates. All rights reserved. Cisco Confidential 136,144 Hosts @ 8Gbps
4 MDS 9710 Storage Edge• 768 Storage Targets @ 8G
2 MDS 9710 Core
• 192 Target Edge ISL 16G Ports• 192 Host Edge ISL 16G Ports
16 MDS 9710 Edge
• 6,144 Hosts @ 8GHost Edge Switches
49 Tbps
3 Tbps
A Typical Edge Core Edge design
Core Switch
768 Targets @ 8Gbps
3 Tbps
6 Tbps
16
Target Edge Switch
1
No Oversubscription
SAN-A
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Mix Match
• 192 more ports in the Core
• 32G FC1
• 40G FCoE1
Scale UP 16G Hosts and 16G Targets
6,144 Hosts @ 16 Gbps
768 Targets @ 16Gbps
161
41
384 ISL Ports
384 ISL Ports
1 When 40G FCoE Line Cards are introduced.
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Scale OutSame options available for Scale Out
321
41
98 Tbps
6 Tbps
6 Tbps
12 Tbps
Options
• More Core Ports• 32G FC1 • 40G FCoE1 • Mix/Match
12,288 Hosts @ 8 Gbps
1,536 Ports @ 8 Gbps
1 When 32G FC and 40G FCoE Cards are introduced.
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Scale UP and Scale Out
6,144 Hosts @ 16 Gbps
768 Targets @ 16Gbps
161
41
321
41
12,288 Hosts @ 8 Gbps
1,536 Ports @ 8 Gbps
6,144 Hosts @ 8 Gbps
768 Targets @ 8Gbps
161
41
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