i year m.tech i sem reg & sup may 2012
TRANSCRIPT
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
09F61D5717 SILPA V9D57102 27 43 70 PANALOG IC DESIGN
10F61D5707 CHAKRAVARTHI MOHAN9D57102 36 5 41 FANALOG IC DESIGN
9D57106a 39 15 54 FEMBEDDED SYSTEM CONCEPTS
11F61D0401 BHARAT KUMAR K9D04102 40 42 82 PFINITE ELEMENT METHODS
9D04103 38 38 76 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 50 88 PGEOMETRIC MODELING
9D04105 36 40 76 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 39 42 81 PCOMPUTER AIDED PROCESS PLANNING
9D04107 40 59 99 PMODELLING AND CNC LAB
9DBS101 40 45 85 PCOMPUTATIONAL METHODS
11F61D0402 BINDUMADHAVI B9D04102 39 36 75 PFINITE ELEMENT METHODS
9D04103 39 38 77 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 38 76 PGEOMETRIC MODELING
9D04105 28 30 58 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 35 40 75 PCOMPUTER AIDED PROCESS PLANNING
9D04107 39 58 97 PMODELLING AND CNC LAB
9DBS101 38 33 71 PCOMPUTATIONAL METHODS
11F61D0403 GNANAPRAKASH V9D04102 34 28 62 PFINITE ELEMENT METHODS
9D04103 36 34 70 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 36 32 68 PGEOMETRIC MODELING
9D04105 31 28 59 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 38 44 82 PCOMPUTER AIDED PROCESS PLANNING
9D04107 38 56 94 PMODELLING AND CNC LAB
9DBS101 24 24 48 FCOMPUTATIONAL METHODS
11F61D0404 HARI HARAN VUPPALA9D04102 39 42 81 PFINITE ELEMENT METHODS
9D04103 39 34 73 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 40 78 PGEOMETRIC MODELING
9D04105 30 33 63 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 39 42 81 PCOMPUTER AIDED PROCESS PLANNING
9D04107 37 57 94 PMODELLING AND CNC LAB
Monday, July 09, 2012 Page 1 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9DBS101 36 30 66 PCOMPUTATIONAL METHODS
11F61D0405 JAYA KISHORE S9D04102 38 37 75 PFINITE ELEMENT METHODS
9D04103 38 26 64 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 39 30 69 PGEOMETRIC MODELING
9D04105 39 38 77 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 40 44 84 PCOMPUTER AIDED PROCESS PLANNING
9D04107 39 58 97 PMODELLING AND CNC LAB
9DBS101 40 26 66 PCOMPUTATIONAL METHODS
11F61D0406 PALAMANGALAM RAMESH9D04102 40 40 80 PFINITE ELEMENT METHODS
9D04103 40 30 70 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 32 70 PGEOMETRIC MODELING
9D04105 32 26 58 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 40 44 84 PCOMPUTER AIDED PROCESS PLANNING
9D04107 39 59 98 PMODELLING AND CNC LAB
9DBS101 39 33 72 PCOMPUTATIONAL METHODS
11F61D0407 SOWJANYA KUNTRAPAKAM9D04102 40 46 86 PFINITE ELEMENT METHODS
9D04103 40 32 72 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 34 72 PGEOMETRIC MODELING
9D04105 32 34 66 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 39 36 75 PCOMPUTER AIDED PROCESS PLANNING
9D04107 38 58 96 PMODELLING AND CNC LAB
9DBS101 40 35 75 PCOMPUTATIONAL METHODS
11F61D0408 SREEDHAR N9D04102 38 34 72 PFINITE ELEMENT METHODS
9D04103 38 44 82 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 39 28 67 PGEOMETRIC MODELING
9D04105 35 29 64 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 39 30 69 PCOMPUTER AIDED PROCESS PLANNING
9D04107 39 58 97 PMODELLING AND CNC LAB
9DBS101 34 28 62 PCOMPUTATIONAL METHODS
11F61D0409 I SRINIVASA REDDY9D04102 36 49 85 PFINITE ELEMENT METHODS
9D04103 34 14 48 FCOMPUTER INTEGRATED MANUFACTURING
Monday, July 09, 2012 Page 2 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D04104 32 38 70 PGEOMETRIC MODELING
9D04105 28 30 58 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 34 26 60 PCOMPUTER AIDED PROCESS PLANNING
9D04107 36 50 86 PMODELLING AND CNC LAB
9DBS101 31 38 69 PCOMPUTATIONAL METHODS
11F61D0410 SRINIVASAN MV9D04102 34 27 61 PFINITE ELEMENT METHODS
9D04103 39 36 75 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 36 26 62 PGEOMETRIC MODELING
9D04105 31 32 63 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 38 34 72 PCOMPUTER AIDED PROCESS PLANNING
9D04107 38 58 96 PMODELLING AND CNC LAB
9DBS101 31 27 58 PCOMPUTATIONAL METHODS
11F61D0411 AKULA SURESH9D04102 36 34 70 PFINITE ELEMENT METHODS
9D04103 36 34 70 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 36 24 60 PGEOMETRIC MODELING
9D04105 28 20 48 FADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 32 30 62 PCOMPUTER AIDED PROCESS PLANNING
9D04107 38 57 95 PMODELLING AND CNC LAB
9DBS101 32 34 66 PCOMPUTATIONAL METHODS
11F61D0412 BELLAM SWATHI9D04102 32 30 62 PFINITE ELEMENT METHODS
9D04103 38 30 68 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 38 24 62 PGEOMETRIC MODELING
9D04105 25 26 51 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 38 30 68 PCOMPUTER AIDED PROCESS PLANNING
9D04107 37 55 92 PMODELLING AND CNC LAB
9DBS101 31 28 59 PCOMPUTATIONAL METHODS
11F61D0413 B VIJAYAKUMAR9D04102 38 40 78 PFINITE ELEMENT METHODS
9D04103 36 40 76 PCOMPUTER INTEGRATED MANUFACTURING
9D04104 36 34 70 PGEOMETRIC MODELING
9D04105 30 36 66 PADVANCE IN MANUFACTURING TECHNOLOGY
9D04106b 35 38 73 PCOMPUTER AIDED PROCESS PLANNING
9D04107 36 56 92 PMODELLING AND CNC LAB
Monday, July 09, 2012 Page 3 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9DBS101 35 35 70 PCOMPUTATIONAL METHODS
11F61D5401 AJITH KUMAR DEENADAYAL9D49101 35 24 59 PMODERN CONTROL THEORY
9D49102 38 24 62 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 32 34 66 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 39 52 91 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 31 43 74 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 36 51 87 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 35 51 86 PPOWER CONVERTERS LAB
11F61D5402 SANALA BHANUPRAKASH9D49101 34 32 66 PMODERN CONTROL THEORY
9D49102 36 25 61 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 35 25 60 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 36 41 77 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 31 21 52 FANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 35 46 81 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 35 51 86 PPOWER CONVERTERS LAB
11F61D5403 JAGADEESH P V9D49101 40 48 88 PMODERN CONTROL THEORY
9D49102 39 33 72 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 38 37 75 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 39 54 93 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 40 44 84 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 40 53 93 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 40 58 98 PPOWER CONVERTERS LAB
11F61D5404 JAYAVELU M K9D49101 38 29 67 PMODERN CONTROL THEORY
9D49102 40 40 80 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 39 46 85 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 39 49 88 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 40 49 89 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 33 52 85 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 38 58 96 PPOWER CONVERTERS LAB
11F61D5406 P MODINI9D49101 39 18 57 FMODERN CONTROL THEORY
9D49102 40 34 74 PMICROPROCESSORS AND MICROCONTROLLERS
Monday, July 09, 2012 Page 4 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D49106 35 38 73 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 38 40 78 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 35 43 78 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 39 46 85 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 39 55 94 PPOWER CONVERTERS LAB
11F61D5407 MURALI KRISHNA N9D49101 33 21 54 FMODERN CONTROL THEORY
9D49102 36 30 66 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 28 29 57 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 38 46 84 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 34 38 72 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 32 50 82 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 37 54 91 PPOWER CONVERTERS LAB
11F61D5408 P A PRABHAKARA9D49101 40 29 69 PMODERN CONTROL THEORY
9D49102 38 39 77 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 33 37 70 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 35 46 81 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 35 37 72 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 37 49 86 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 37 54 91 PPOWER CONVERTERS LAB
11F61D5409 VEMPALLI PRASAD RAJU9D49101 40 45 85 PMODERN CONTROL THEORY
9D49102 40 39 79 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 30 35 65 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 39 45 84 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 34 48 82 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 39 49 88 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 38 56 94 PPOWER CONVERTERS LAB
11F61D5410 PUSHPA N9D49101 40 44 84 PMODERN CONTROL THEORY
9D49102 40 48 88 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 38 46 84 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 40 51 91 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 40 49 89 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 39 53 92 PPOWER ELECTRONIC CONTROL OF DC DRIVES
Monday, July 09, 2012 Page 5 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D54107 40 58 98 PPOWER CONVERTERS LAB
11F61D5411 RAJASEKHAR A9D49101 31 25 56 PMODERN CONTROL THEORY
9D49102 35 34 69 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 32 33 65 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 27 36 63 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 24 41 65 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 28 49 77 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 37 57 94 PPOWER CONVERTERS LAB
11F61D5412 REDDIPRASANNA ANDE9D49101 40 44 84 PMODERN CONTROL THEORY
9D49102 38 45 83 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 39 40 79 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 40 51 91 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 40 50 90 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 37 48 85 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 40 58 98 PPOWER CONVERTERS LAB
11F61D5413 SABARINATH G9D49101 30 21 51 FMODERN CONTROL THEORY
9D49102 35 36 71 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 35 30 65 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 34 33 67 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 35 38 73 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 36 46 82 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 38 56 94 PPOWER CONVERTERS LAB
11F61D5414 SREENIVASULU REDDY M9D49101 40 19 59 FMODERN CONTROL THEORY
9D49102 36 32 68 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 36 35 71 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 38 50 88 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 34 47 81 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 36 52 88 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 39 56 95 PPOWER CONVERTERS LAB
11F61D5415 BANDI SWAMIKONDA9D49101 40 42 82 PMODERN CONTROL THEORY
9D49102 38 46 84 PMICROPROCESSORS AND MICROCONTROLLERS
Monday, July 09, 2012 Page 6 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D49106 36 41 77 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 36 45 81 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 34 49 83 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 33 50 83 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 37 55 92 PPOWER CONVERTERS LAB
11F61D5416 VIJAYA LAKSHMI K9D49101 36 41 77 PMODERN CONTROL THEORY
9D49102 35 30 65 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 35 29 64 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 34 48 82 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 36 48 84 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 37 50 87 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 38 56 94 PPOWER CONVERTERS LAB
11F61D5417 K YAMINI9D49101 40 43 83 PMODERN CONTROL THEORY
9D49102 39 45 84 PMICROPROCESSORS AND MICROCONTROLLERS
9D49106 39 43 82 PNEURAL NETWORKS AND FUZZY SYSTEMS
9D54103 38 50 88 PPRINCIPLES OF MACHINE MODELLING ANALYSIS]
9D54104 40 50 90 PANALYSIS OF POWER ELECTRONIC CONVERTERS
9D54105 35 47 82 PPOWER ELECTRONIC CONTROL OF DC DRIVES
9D54107 40 58 98 PPOWER CONVERTERS LAB
11F61D5501 PANDIGUNTA ARUNA KUMARI9D06102 34 31 65 PEMBEDDED SYSTEM CONCEPTS
9D06103 38 28 66 PADVANCED COMPUTER ARCHITECTURE
9D55101 39 26 65 PADVANCED DSP & APPLICATIONS
9D55104 38 31 69 PMICRO CONTROLLERS & INTERFACING
9D55105 38 24 62 POPERTING SYSTEMS
9D55107 36 55 91 PMICROCONTROLLERS & INTERFACING LAB
9D57101 38 35 73 PVLSI TECHNOLOGY
11F61D5502 B M R MANASA9D06102 40 38 78 PEMBEDDED SYSTEM CONCEPTS
9D06103 38 38 76 PADVANCED COMPUTER ARCHITECTURE
9D55101 38 34 72 PADVANCED DSP & APPLICATIONS
9D55104 38 45 83 PMICRO CONTROLLERS & INTERFACING
9D55105 38 31 69 POPERTING SYSTEMS
9D55107 36 57 93 PMICROCONTROLLERS & INTERFACING LAB
Monday, July 09, 2012 Page 7 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D57101 38 45 83 PVLSI TECHNOLOGY
11F61D5503 M S NIRANJANI9D06102 36 36 72 PEMBEDDED SYSTEM CONCEPTS
9D06103 36 36 72 PADVANCED COMPUTER ARCHITECTURE
9D55101 30 37 67 PADVANCED DSP & APPLICATIONS
9D55104 38 35 73 PMICRO CONTROLLERS & INTERFACING
9D55105 40 35 75 POPERTING SYSTEMS
9D55107 37 55 92 PMICROCONTROLLERS & INTERFACING LAB
9D57101 38 37 75 PVLSI TECHNOLOGY
11F61D5504 PAVAN KUMAR GANDLA9D06102 40 38 78 PEMBEDDED SYSTEM CONCEPTS
9D06103 39 40 79 PADVANCED COMPUTER ARCHITECTURE
9D55101 35 34 69 PADVANCED DSP & APPLICATIONS
9D55104 39 41 80 PMICRO CONTROLLERS & INTERFACING
9D55105 39 28 67 POPERTING SYSTEMS
9D55107 38 56 94 PMICROCONTROLLERS & INTERFACING LAB
9D57101 35 40 75 PVLSI TECHNOLOGY
11F61D5505 G VINODKUMAR9D06102 38 32 70 PEMBEDDED SYSTEM CONCEPTS
9D06103 37 26 63 PADVANCED COMPUTER ARCHITECTURE
9D55101 35 26 61 PADVANCED DSP & APPLICATIONS
9D55104 39 32 71 PMICRO CONTROLLERS & INTERFACING
9D55105 40 27 67 POPERTING SYSTEMS
9D55107 39 58 97 PMICROCONTROLLERS & INTERFACING LAB
9D57101 36 25 61 PVLSI TECHNOLOGY
11F61D5701 M JANARDHANA9D57101 23 26 49 FVLSI TECHNOLOGY
9D57102 0 7 7 FANALOG IC DESIGN
9D57103 0 AB 0 FDIGITAL IC DESIGN
9D57104 27 AB 27 FHARDWARE DESCRIPTION LANGUAGES
9D57105 0 AB 0 FHARDWARE SOFTWARE CO-DESIGN
9D57106 0 AB 0 FEMBEDDED SYSTEM CONCEPTS
9D57107 36 51 87 PDIGITAL IC DESIGN LAB
11F61D5702 MANI MOHAN P9D57101 30 28 58 PVLSI TECHNOLOGY
9D57102 38 30 68 PANALOG IC DESIGN
Monday, July 09, 2012 Page 8 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D57103 38 31 69 PDIGITAL IC DESIGN
9D57104 37 43 80 PHARDWARE DESCRIPTION LANGUAGES
9D57105 38 24 62 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 39 29 68 PEMBEDDED SYSTEM CONCEPTS
9D57107 39 59 98 PDIGITAL IC DESIGN LAB
11F61D5703 P MOHANAMMA9D57101 38 44 82 PVLSI TECHNOLOGY
9D57102 35 35 70 PANALOG IC DESIGN
9D57103 38 53 91 PDIGITAL IC DESIGN
9D57104 35 54 89 PHARDWARE DESCRIPTION LANGUAGES
9D57105 40 33 73 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 38 43 81 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 60 98 PDIGITAL IC DESIGN LAB
11F61D5704 MYTHILI P G S9D57101 39 45 84 PVLSI TECHNOLOGY
9D57102 38 36 74 PANALOG IC DESIGN
9D57103 40 49 89 PDIGITAL IC DESIGN
9D57104 36 48 84 PHARDWARE DESCRIPTION LANGUAGES
9D57105 40 33 73 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 38 43 81 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 59 97 PDIGITAL IC DESIGN LAB
11F61D5705 EARLA NAGARAJU9D57101 36 30 66 PVLSI TECHNOLOGY
9D57102 26 24 50 PANALOG IC DESIGN
9D57103 35 27 62 PDIGITAL IC DESIGN
9D57104 30 29 59 PHARDWARE DESCRIPTION LANGUAGES
9D57105 36 24 60 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 32 28 60 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 55 93 PDIGITAL IC DESIGN LAB
11F61D5706 NITHYAVEL KRISHNA A9D57101 35 27 62 PVLSI TECHNOLOGY
9D57102 30 24 54 PANALOG IC DESIGN
9D57103 31 30 61 PDIGITAL IC DESIGN
9D57104 30 30 60 PHARDWARE DESCRIPTION LANGUAGES
9D57105 38 26 64 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 32 7 39 FEMBEDDED SYSTEM CONCEPTS
Monday, July 09, 2012 Page 9 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D57107 37 56 93 PDIGITAL IC DESIGN LAB
11F61D5707 THOTI PARDHASARATHY9D57101 24 24 48 FVLSI TECHNOLOGY
9D57102 28 14 42 FANALOG IC DESIGN
9D57103 30 24 54 PDIGITAL IC DESIGN
9D57104 26 35 61 PHARDWARE DESCRIPTION LANGUAGES
9D57105 33 24 57 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 20 16 36 FEMBEDDED SYSTEM CONCEPTS
9D57107 36 44 80 PDIGITAL IC DESIGN LAB
11F61D5708 BETHANAMUDI PAVAN KALYAN9D57101 38 26 64 PVLSI TECHNOLOGY
9D57102 30 27 57 PANALOG IC DESIGN
9D57103 34 33 67 PDIGITAL IC DESIGN
9D57104 30 26 56 PHARDWARE DESCRIPTION LANGUAGES
9D57105 37 24 61 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 34 28 62 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 58 96 PDIGITAL IC DESIGN LAB
11F61D5709 M SATHISHKUMAR9D57101 34 32 66 PVLSI TECHNOLOGY
9D57102 30 26 56 PANALOG IC DESIGN
9D57103 34 31 65 PDIGITAL IC DESIGN
9D57104 30 34 64 PHARDWARE DESCRIPTION LANGUAGES
9D57105 40 24 64 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 24 17 41 FEMBEDDED SYSTEM CONCEPTS
9D57107 39 57 96 PDIGITAL IC DESIGN LAB
11F61D5710 R SEELANAND KUMAR9D57101 35 27 62 PVLSI TECHNOLOGY
9D57102 27 19 46 FANALOG IC DESIGN
9D57103 30 24 54 PDIGITAL IC DESIGN
9D57104 30 28 58 PHARDWARE DESCRIPTION LANGUAGES
9D57105 38 24 62 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 34 25 59 PEMBEDDED SYSTEM CONCEPTS
9D57107 36 60 96 PDIGITAL IC DESIGN LAB
11F61D5711 DUVVURU SINDHU9D57101 38 29 67 PVLSI TECHNOLOGY
9D57102 38 30 68 PANALOG IC DESIGN
Monday, July 09, 2012 Page 10 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D57103 38 43 81 PDIGITAL IC DESIGN
9D57104 37 31 68 PHARDWARE DESCRIPTION LANGUAGES
9D57105 39 30 69 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 36 24 60 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 58 96 PDIGITAL IC DESIGN LAB
11F61D5712 SUMA LATHA S9D57101 38 35 73 PVLSI TECHNOLOGY
9D57102 39 29 68 PANALOG IC DESIGN
9D57103 38 42 80 PDIGITAL IC DESIGN
9D57104 37 43 80 PHARDWARE DESCRIPTION LANGUAGES
9D57105 39 28 67 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 36 33 69 PEMBEDDED SYSTEM CONCEPTS
9D57107 39 60 99 PDIGITAL IC DESIGN LAB
11F61D5713 THEJASREE VARDHI9D57101 35 38 73 PVLSI TECHNOLOGY
9D57102 39 40 79 PANALOG IC DESIGN
9D57103 38 47 85 PDIGITAL IC DESIGN
9D57104 35 49 84 PHARDWARE DESCRIPTION LANGUAGES
9D57105 40 29 69 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 38 38 76 PEMBEDDED SYSTEM CONCEPTS
9D57107 40 59 99 PDIGITAL IC DESIGN LAB
11F61D5714 VENU ALLAPAKAM9D57101 32 35 67 PVLSI TECHNOLOGY
9D57102 32 35 67 PANALOG IC DESIGN
9D57103 38 40 78 PDIGITAL IC DESIGN
9D57104 34 41 75 PHARDWARE DESCRIPTION LANGUAGES
9D57105 38 30 68 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 38 32 70 PEMBEDDED SYSTEM CONCEPTS
9D57107 38 58 96 PDIGITAL IC DESIGN LAB
11F61D5715 VIJAY KUMAR D9D57101 39 30 69 PVLSI TECHNOLOGY
9D57102 32 27 59 PANALOG IC DESIGN
9D57103 38 34 72 PDIGITAL IC DESIGN
9D57104 34 43 77 PHARDWARE DESCRIPTION LANGUAGES
9D57105 37 25 62 PHARDWARE SOFTWARE CO-DESIGN
9D57106a 31 26 57 PEMBEDDED SYSTEM CONCEPTS
Monday, July 09, 2012 Page 11 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D57107 39 58 97 PDIGITAL IC DESIGN LAB
11F61D5801 S CHANBASHA9D58101 35 31 66 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 35 25 60 PDISCRETE STRUCTURES
9D58103 34 24 58 PCOMPUTER SYSTEMS DESIGN
9D58104 27 33 60 PJAVA AND WEB TECHNOLOGIES
9D58105 35 30 65 PSOFTWARE ENGINEERING
9D58106 32 2 34 FDISTRIBUTED DATABASES
9D58107 35 52 87 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5802 M CHENCHULAKSHMI9D58101 40 46 86 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 38 78 PDISCRETE STRUCTURES
9D58103 40 30 70 PCOMPUTER SYSTEMS DESIGN
9D58104 40 56 96 PJAVA AND WEB TECHNOLOGIES
9D58105 39 31 70 PSOFTWARE ENGINEERING
9D58106 40 25 65 PDISTRIBUTED DATABASES
9D58107 40 59 99 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5803 P C DEVI9D58101 40 45 85 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 25 65 PDISCRETE STRUCTURES
9D58103 40 28 68 PCOMPUTER SYSTEMS DESIGN
9D58104 38 55 93 PJAVA AND WEB TECHNOLOGIES
9D58105 39 36 75 PSOFTWARE ENGINEERING
9D58106 40 30 70 PDISTRIBUTED DATABASES
9D58107 40 57 97 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5804 DIVYAJA P9D58101 40 39 79 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 39 28 67 PDISCRETE STRUCTURES
9D58103 39 34 73 PCOMPUTER SYSTEMS DESIGN
9D58104 40 49 89 PJAVA AND WEB TECHNOLOGIES
9D58105 36 33 69 PSOFTWARE ENGINEERING
9D58106 39 22 61 FDISTRIBUTED DATABASES
9D58107 40 59 99 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5805 HARI KRISHNA THAMBI9D58101 35 33 68 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 36 21 57 FDISCRETE STRUCTURES
Monday, July 09, 2012 Page 12 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D58103 32 28 60 PCOMPUTER SYSTEMS DESIGN
9D58104 35 34 69 PJAVA AND WEB TECHNOLOGIES
9D58105 34 33 67 PSOFTWARE ENGINEERING
9D58106 32 23 55 FDISTRIBUTED DATABASES
9D58107 39 57 96 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5806 SINGAREDDY HEMASRI9D58101 38 44 82 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 37 26 63 PDISCRETE STRUCTURES
9D58103 40 35 75 PCOMPUTER SYSTEMS DESIGN
9D58104 35 51 86 PJAVA AND WEB TECHNOLOGIES
9D58105 39 28 67 PSOFTWARE ENGINEERING
9D58106 40 35 75 PDISTRIBUTED DATABASES
9D58107 38 56 94 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5807 KALYANI KURAGAYALA9D58101 38 32 70 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 15 55 FDISCRETE STRUCTURES
9D58103 34 25 59 PCOMPUTER SYSTEMS DESIGN
9D58104 38 38 76 PJAVA AND WEB TECHNOLOGIES
9D58105 34 26 60 PSOFTWARE ENGINEERING
9D58106 39 21 60 FDISTRIBUTED DATABASES
9D58107 39 56 95 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5808 KARTHIK KUMAR B9D58101 38 31 69 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 39 28 67 PDISCRETE STRUCTURES
9D58103 32 25 57 PCOMPUTER SYSTEMS DESIGN
9D58104 38 29 67 PJAVA AND WEB TECHNOLOGIES
9D58105 36 34 70 PSOFTWARE ENGINEERING
9D58106 35 23 58 FDISTRIBUTED DATABASES
9D58107 38 55 93 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5809 M LOKESH9D58101 38 37 75 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 24 64 PDISCRETE STRUCTURES
9D58103 36 34 70 PCOMPUTER SYSTEMS DESIGN
9D58104 40 40 80 PJAVA AND WEB TECHNOLOGIES
9D58105 36 31 67 PSOFTWARE ENGINEERING
9D58106 34 27 61 PDISTRIBUTED DATABASES
Monday, July 09, 2012 Page 13 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D58107 39 57 96 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5810 SANGI NARASIMHULU9D58101 35 35 70 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 39 36 75 PDISCRETE STRUCTURES
9D58103 34 30 64 PCOMPUTER SYSTEMS DESIGN
9D58104 38 36 74 PJAVA AND WEB TECHNOLOGIES
9D58105 36 31 67 PSOFTWARE ENGINEERING
9D58106 32 31 63 PDISTRIBUTED DATABASES
9D58107 37 54 91 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5811 R PADMINI9D58101 40 43 83 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 35 75 PDISCRETE STRUCTURES
9D58103 39 28 67 PCOMPUTER SYSTEMS DESIGN
9D58104 40 50 90 PJAVA AND WEB TECHNOLOGIES
9D58105 38 32 70 PSOFTWARE ENGINEERING
9D58106 38 33 71 PDISTRIBUTED DATABASES
9D58107 40 59 99 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5812 MADDELA PRAVEEN KUMAR9D58101 38 41 79 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 33 73 PDISCRETE STRUCTURES
9D58103 36 39 75 PCOMPUTER SYSTEMS DESIGN
9D58104 36 46 82 PJAVA AND WEB TECHNOLOGIES
9D58105 35 29 64 PSOFTWARE ENGINEERING
9D58106 38 33 71 PDISTRIBUTED DATABASES
9D58107 39 55 94 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5813 PRIYADARSHINI R9D58101 38 40 78 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 40 27 67 PDISCRETE STRUCTURES
9D58103 38 37 75 PCOMPUTER SYSTEMS DESIGN
9D58104 40 36 76 PJAVA AND WEB TECHNOLOGIES
9D58105 35 33 68 PSOFTWARE ENGINEERING
9D58106 40 30 70 PDISTRIBUTED DATABASES
9D58107 40 58 98 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5815 SUSHMA C9D58101 35 31 66 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 39 19 58 FDISCRETE STRUCTURES
Monday, July 09, 2012 Page 14 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date
SUBCODE I.M E.M TOTAL RESULT
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPURANANTAPUR - 515 002(A. P.) INDIA
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EXAMINATION BRANCHM Tech I Semester Regular and Supplementary Examinations - April/May 2012 Results
SUB NAME
9D58103 28 24 52 PCOMPUTER SYSTEMS DESIGN
9D58104 35 43 78 PJAVA AND WEB TECHNOLOGIES
9D58105 38 26 64 PSOFTWARE ENGINEERING
9D58106 32 31 63 PDISTRIBUTED DATABASES
9D58107 38 53 91 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
11F61D5816 SWETHA S R9D58101 38 36 74 PADVANCED DATA STRUCTURES AND ALGORITHMS
9D58102 39 24 63 PDISCRETE STRUCTURES
9D58103 39 34 73 PCOMPUTER SYSTEMS DESIGN
9D58104 35 49 84 PJAVA AND WEB TECHNOLOGIES
9D58105 39 33 72 PSOFTWARE ENGINEERING
9D58106 35 33 68 PDISTRIBUTED DATABASES
9D58107 38 55 93 PSOFTWARE LAB-I (COVERING THE EXPERIMENTS:DATA STRUCTURES &
Monday, July 09, 2012 Page 15 of 15
CONTROLLER OF EXAMINATIONS i/c
Note: Any discrepancy in the result noted above must be brought to the notice of the Controller of Examinations, within two weeks from the above date