ic-nq, ic-nqc eval nq6d · ic-nq, ic-nqc eval nq6d evaluation board description rev a3, page 3/10...

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iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 1/10 ORDERING INFORMATION Type Order Designation Description Options Evaluation Board iC-NQ EVAL NQ6D iC-NQ Evaluation Board iC-NQC EVAL NQ6D iC-NQC Evaluation Board ready to operate, accessible through GUI via PC adapter Evaluation Software iC-NQ GUI GUI software for Windows PC iC-NQC GUI GUI software for Windows PC stores setup to file, communication to the IC see chapter EVALUATION SOFTWARE on page 6 for more information To be ordered separately PC Adapter iC-MB3 iCSY MB3U PC-USB Adapter iC-MB4 iCSY MB4U PC-USB Adapter (supported by iC-NQC GUI only) BOARD NQ6D (size 100 mm x 80 mm) Connections Figure 1: Evaluation board NQ6D J1 BiSS Interface Output (D-Sub, RS422) (to another board) J4 BiSS Interface Input (D-Sub, RS422) (to BiSS-PC adapter or previous board) (J2) BiSS Interface Output (RJ45) (to another board) (J3) BiSS Interface Input (RJ45) (to BiSS-PC adapter or previous board) J5 Board Supply VB (+8 V...+15 V) (jumpers J3 and J4 removed) J6 BiSS Line Signals of iC-NQ(C) J9 Test/Error/I 2 C signals of iC-NQ(C) JP1 Signal Return Jumper (SLO- to SL-) JP2 Signal Return Jumper (SLO+ to SL+) JP3 VDD Jumper (adapter +5 V to VDD) JP4 VB Jumper (adapter +12 V to VB) U1 iC-NQ(C) Interpolation IC D3 Power-On LED (green) D4 Error LED (red) Copyright © 2010 iC-Haus http://www.ichaus.com

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Page 1: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 1/10

ORDERING INFORMATION

Type Order Designation Description Options

Evaluation Board iC-NQ EVAL NQ6D iC-NQ Evaluation Board

iC-NQC EVAL NQ6D iC-NQC Evaluation Board

ready to operate, accessible through GUI via PC adapter

Evaluation Software iC-NQ GUI GUI software for Windows PC

iC-NQC GUI GUI software for Windows PC

stores setup to file, communication to the IC

see chapter EVALUATION SOFTWARE on page 6 for more

information

To be ordered separately

PC Adapter iC-MB3 iCSY MB3U PC-USB Adapter

iC-MB4 iCSY MB4U PC-USB Adapter (supported by iC-NQC GUI only)

BOARD NQ6D

(size 100 mm x 80 mm) Connections

Figure 1: Evaluation board NQ6D

J1 BiSS Interface Output (D-Sub, RS422)

(to another board)

J4 BiSS Interface Input (D-Sub, RS422)

(to BiSS-PC adapter or previous board)

(J2) BiSS Interface Output (RJ45)

(to another board)

(J3) BiSS Interface Input (RJ45)

(to BiSS-PC adapter or previous board)

J5 Board Supply VB (+8 V...+15 V)

(jumpers J3 and J4 removed)

J6 BiSS Line Signals of iC-NQ(C)

J9 Test/Error/I2C signals of iC-NQ(C)

JP1 Signal Return Jumper (SLO- to SL-)

JP2 Signal Return Jumper (SLO+ to SL+)

JP3 VDD Jumper (adapter +5 V to VDD)

JP4 VB Jumper (adapter +12 V to VB)

U1 iC-NQ(C) Interpolation IC

D3 Power-On LED (green)

D4 Error LED (red)

Copyright © 2010 iC-Haus http://www.ichaus.com

Page 2: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 2/10

Figure 2: Component side Figure 3: Component side (conducting paths)

TERMINAL DESCRIPTION

J5+* +8 V... +15 V Board Supply VB

J5-* Ground

VB* +8 V... +15 V Board Supply VB

V5* +5 V Board Supply VDD

GND Ground

VREF Reference Voltage Output (+2.4 V)

VDDA Analog Supply Voltage IC (+5 V)

GNDA Analog Supply Ground IC (0 V)

A Incremental Output A

B Incremental Output B

Z Index Output Z

(J6) MA Clock Input iC-NQ(C)

(J6) SLO Serial Data Output iC-NQ(C)

(J6) SLI Serial Data Input iC-NQ(C)

TERMINAL DESCRIPTION

PZERO Input Zero Signal +

NZERO Input Zero Signal -

PSIN Input Sine +

NSIN Input Sine -

PCOS Input Cosine +

NCOS Input Cosine -

D3 Power-On LED (green)

D4 Error LED (red)

(J9) SDA I2C Data / Test Signal SIN+ of iC-NQ(C)

(J9) SCL I2C Clock / Test Signal SIN- of iC-NQ(C)

(J9) NER Error Input/Output of iC-NQ(C)

(J9) VDD IC Supply (digital)

(J9) GND IC Ground (digital)

Notes: *) When connecting an external supply voltage jumpers JP3 and JP4 must be removed.

RELATED DOCUMENTS

• iC-NQ Data Sheet -Specification-

• iC-NQ GUI -Evaluation Software for Windows PCs-

→ http://www.ichaus.de/iC-NQ

• iC-NQC Data Sheet -Specification-

• iC-NQC GUI -Evaluation Software for Windows PCs-

→ http://www.ichaus.de/iC-NQC

• iC-MB3 iCSY MB3U - PC-USB ADAPTER -

→ http://www.ichaus.de/MB3U

• iC-MB4 iCSY MB4U - PC-USB ADAPTER -

→ http://www.ichaus.de/MB4U

Page 3: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 3/10

CIRCUIT DESCRIPTION

The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator IC. The board features two sub-D

9 pole BiSS plugs to support the cascading of multiple boards. iC-NQ/iC-NQC GUI software can be used to

access the board from a Windows PC what needs the MB3U respectively MB4U adapter.

C6

5

opt

NSIN

5IF

Z-R

4

J2-N

SL

J8

R8

BYS1

0-45

A

A

J6

J1-M

AO

VB

1

12

7

23

J9

IFZ-

R8

J4-M

A

100n

F

J7

5

U5-A

3

1

WP

24C

08B

3

J8

6

1

1

U2-S1

VOUT

opt.

NCO

S

MA

J2-V

B1VB

PSIN

3

1k

U4

1

SLO

-

MA

A

J9

5

J4-S

LI

J2-S

1

NER

R

R6

MAO

-

S2

B

J8

GND

VCC

J1-S

L

U5-S

R2

3

IFZ-

R5

J1-V

DD

J1-N

MAO

R1

6

4

J3-S

L

1

R4

J8

7517

9

15

Z

78M

05

opt

C3

3

7517

9

IFZ-

R2

J2-S

LO

A

NER

R

SHIE

LD_I

N

R8

SLO

-

J3-M

A

9

J3-N

SLI

BU3-S

A

SL+

S2

R5

21

J2-S

2

1

6

OUT

SL-

SL+

J823

7

U3-B

SLI+

RJ4

5

A

opt.

J4-N

MA

PCO

S

IFV-

R1

J3-S

1

SCL

100n

F

J3-N

SL

C2

A

J7J8

opt.

C1

4

1

16

B

opt.

IFA-

R6

opt.

J8

SLO

+VD

DA

21

J815

100n

F

22

7517

9

Z

A1

100n

F

GND

A

VCC

J2-N

MAO

C4

14

17

SLI

SLO

+

8

IFV-

C1

J3-S

L

J3-V

B

VDD

A

GND

MA-

SLI+

2

7

J8

A

IFA-

C2

IFA-

R8

IFA-

R9

5

GND

20

B

1k

J2-N

SL

PCO

S

VREF

SHIE

LD_O

UT

S1

VDD

8

R7

4

J7

IFZ-

R9

IFA-

R4

IN

19

3

J1-S

LO

17

J1-V

DD

VDD

7

SDA

24C

08B

IFB-

R4

2

3

VDD

A

SLO

-

1k

IFA

-C3

opt.

VB

6

6

11

6

IFB-

R3

SLI

14

MAO

+

NSIN

15

2G

ND

120

1

11

7

J5

opt.

NER

10

1

8

PZER

O

2

VREF

NSIN

17

J8

IFA-

R3

IFZ-

R3

8

D2

6

A

VDD

IFZ-

R1

JP5

5

0

JP3

24

6

8

6

VDD

A

4.7k

7

R3

BYS1

0-45

19

1

9

14

IFA-

R5

U3-A

16

opt.

22

1k

IFB-

C2

A

4

J9

120

17

23

J7

2A

J7

SCL

12 12

18

1

J6

J7

J5

opt.

7517

9

19

GN

D3

J4-N

SL

J4-G

ND

21

J7

7

7

JP4

100n

F

JP1

560

VDD

3

3

4

4

18op

t.

IFB

-C3

4

J2-G

ND1

3

1kSC

L

13

A0

J1-V

B

3

opt.

J8

VDD

A

8A2

IFB-

R7

S1

11

6

7

SL-

8

5

VREF

24

B

13

A

opt.

A

J4-S

L

NZER

O

22

2

1k

16

IFB

-C1

J4-V

B

D4

J7

A

8

9

J1-N

SL

GND

A1

IFB-

R5

IFB-

R6

4

J9

10

IFB-

R2

7

74

SL+

PSIN

MA+

3

4

MA-

SLO

SLI-

15

A

8

J7

8 8

IFA-

R7

2

SLI-

U5-S

VDD

A

5

1

IFB-

R9

22

13

IFA-

C1

JP6

J2-V

B

IFZ-

C3

J2-M

AO

VB

PSIN

14

2

J3-S

LI

1

PZER

O

VB

VDD

OUT

6

SL+

A

J1-G

ND

J8

9

JP2

5

J2-G

ND

12

MA+

J2-N

SLO

U2-B

SLI-

U2-A

A

IFV-

C2

5

2

20

560

0

VIN

PCO

S

IFA-

R8

4

A

V5

7

7517

9

2

J7

SDA

13

J6

6

SLI

MA

IFZ-

R6

18

J4-V

DD

IFZ-

C1

J7

10

J4-N

SLI

R1

NCO

S

opt.

20

J1-S

L

1

2

VB

1

VB_I

N

8

5

2

19

VDD

A

J3-N

MA

NSIN

5

8

4

2

GND

A

J3-G

ND1

J8

6

4IF

A-R

1

SLI+

J1-N

MAO

SDA

2 J1-V

B

560

43

4.7k

10

VDD

A

7

24

47nF

VB_I

N

A

iC-N

QC

IN

3

16

IFA-

R2

BYS1

0-45

C7

J3-S

2

3

D1

SLO

330n

F

2

6

GND

A

A

IFB-

R8

A

VDD

VDD

A

V5

D-S

UB 9

J1-S

LO

18

24C

08B

GND

A

IFZ-

C2

NCO

S

VDD

MAO

+

VDD

_IN

RJ4

5

opt.

D-S

UB 9

GND

MAO

-

9

MAO

-

4

1

VB_I

N

MA-

5

MA+

R2

VDD

_IN

9

J7

SL-

J6

SLO

+

VREF

opt.

9

5

NZER

O

NZER

O

MAO

+

RD

1μF

J6

SDA

NER

92

C5

0

3

J9

A

VDD

4

11

SL-

VDD

10

PZER

O

J2-S

L

B

SCL

VDD

A

IFB-

R1

VB_I

N

A

IFZ-

R7

J3-G

ND

10

opt.

J9

J4-M

A

5

VDD

A

SLO

20

J1-N

SLO

J3-V

B1

1

A

3

U1

Z J3-S

1

J2-G

ND

7517

9

D1

U2-A

C7

VDD

A

100n

F

J7

7517

9U2

-B

J3-S

LI

VREF

J7

A

J2-S

L

J4-N

MA

R6

A

4.7k

7517

9U3

-B

J8

opt.

IFA-

C1

J3-N

SLI

IFZ-

R9

IFZ-

R2

1k

GND

J4-S

LI

A

J3-G

ND

PZER

O

J3-S

2

J8

J4-V

DD

78M

05U4

C4

100n

F

U2-S

7517

9

J2-N

MAO

24C

08B

U5-A

A

J1-G

ND

7517

9U3

-S

J4-N

SLI

IFA-

R9

IFA-

R4

J3-G

ND1

J1-N

SLO

J3-M

A

4.7kR7

J8

JP2

C5

IFA-

R6

1μF

100n

FPS

IN

C2

Z

J7

IFV-

C2

R5

120

47nF

7517

9U3

-A

J2-V

B

J7op

t.IF

Z-R

1

IFZ-

R3

1k1k

IFA-

R3

J1-N

SL

J2-G

ND1

opt.

IFB-

C3

JP6

J8

J2-S

LO

IFA-

R2

1k

IFZ-

R4

opt.

IFZ-

R5

IFZ-

C3

opt.

J1-M

AO

IFZ-

R6

IFZ-

R7

opt.

IFZ-

C2

AAA

J3-N

MA

100n

FC

6

J3-V

B

100n

FC

3

J5

JP1

A

JP5

J8

IFA-

R7

opt.

J6

JP4

JP3

J4-V

B

A

J7J7

IFA-

R5

NZER

O

IFB-

R6

opt.

IFB-

R7

J4-G

ND

A

IFB-

R1

opt.

IFB-

R3

1k

IFB-

R8

IFB-

R9

IFZ-

R8

A

A

1k

A

IFB-

R2

A

J4-N

SL

J4-S

L

J7

IFB-

R5

opt.

opt.

IFB-

C1

IFB-

C2

D2

BYS1

0-45

J2-S

2

opt.

IFZ-

C1

J8

IFB-

R4

NCO

S

U1

iC-N

QC

IFA-

C3

opt.

GN

J3-V

B1

D3

J9

GND

A1

J3-N

SL

J7

J2-V

B1

opt.

R4

120

IFA-

C2

J5

J9

opt.

IFV-

C1

0

IFV-

R1

J9

A

IFA-

R1

opt.

J2-M

AO

J2-N

SLO

PCO

S

R3

560

J9 J8

7517

9

J2-S

1

RD

330n

FC

1

D4

Figure 4: Circuit diagram equipped with iC-NQC (resp. iC-NQ) including optional components.

Page 4: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 4/10

ASSEMBLY PART LIST

Device Value (typical) Comment

Board NQ6D

R1 0 Ω

R3, R8 562 Ω

R4, R5 120 Ω

C1 330 nF

C2-C4, C6, C7 100 nF

C5 1 µF

D1, D2 BYS10-45

D3 SMD LED green

D4 SMD LED red

U1 iC-NQC or iC-NQ

U2, U3 65LBC179

U4 7805

U5 24C08B

S1-S6 MK0112G

S7, S8 MK013G

J1 D-Sub 9-pole, male

J4 D-Sub 9-pole, female

J5 AKL059-02

J9 Pin bar 5-pole, single-in-line

JP1-JP4 Pin bar 2-pole, single-in-line

IFA-R2, IFA-R3

IFB-R2, IFB-R3

IFZ-R2, IFZ-R3

1 kΩ serial resistors for input protection

(assembled when shipped)

IFV-C2 47 nF assembled

IFV-R1 0 Ω assembled

Page 5: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 5/10

JUMPER AND PLUG DESCRIPTION

J1: BiSS Interface Output

9-pin Sub D Connector - male

PIN Name Function

1 VB +12 V supply voltage

2 MAO + Clock output

3 MAO - Clock output (inverted)

4 VDD +5 V supply voltage

5 SLO - Data output (inverted)

6 GND 0 V ground

7 SL + Data line

8 SL - Data line (inverted)

9 SLO + Data output

J4: BiSS Interface Input

9-pin Sub D Connector - female

PIN Name Function

1 VB +12 V supply voltage

2 MA + Clock input

3 MA - Clock input (inverted)

4 VDD +5 V supply voltage

5 SLI - Data input (inverted)

6 GND 0 V ground

7 SL + Data line

8 SL - Data line (inverted)

9 SLI + Data input

Voltage Supply - Adapter MB3U

Voltage Supply Component Supply Jumper Configuration

via board

terminals1

via J4

plug2

iC-NQ(C) JP3 (VDD)+5 V via J4

JP4 (VB)+12 V via J4

- X via J4 (VDD) bridged open

- X via J4 (VB) open bridged

X X via board terminals open open

X X shortens VB terminal to J4 bridged don’t care

X X shortens VB terminal to J4 don’t care bridged

Voltage Supply - Adapter MB3A

Voltage Supply Component Supply Jumper Configuration

via board

terminals1

via J4

plug3

iC-NQ(C) MB3A JP3 (VDD) JP4 (VB)

- none no voltage supply don’t care don’t care

X none via board terminals bridged don’t care

Communication Chain Board 1 Board 2

Information Jumper configuration Jumper configuration Comments

JP1 JP2 JP1 JP2

Single-Board connection bridged bridged N/A N/A shipment setup

Board-to-Board connec-

tion.

open open bridged bridged Adapter → Board 1 (J1)

Board 1 (J2) → Board 2 (J1)

Notes 1) Supply of +8 V to +15 V required to board terminals VB and GND2) Supply voltage sourced from J4 plug out of PC adapter3) MB3A needs to be externally supplied via the NQ6D evaluation board

Page 6: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

Rev A3, Page 6/10

EVALUATION SOFTWARE

iC-NQ(C) software for PCs running on Windows operating systems as well as the required USB and/or LPT driver

are available as a ZIP file. iC-Haus software built with LabVIEW™requires the installation of the LabVIEW™Run-

Time Engine (RTE). The RTE must be installed only once, hence there are two download links available.

Software overview online: http://www.ichaus.de/software

Download package without RTE (small size) including RTE (big size)

iC-NQ: http://www.ichaus.de/NQ_gui http://www.ichaus.de/NQ_gui_rte

iC-NQC: http://www.ichaus.de/NQC_gui http://www.ichaus.de/NQC_gui_rte

Features

• Reducing evaluation and design-in time and cost

• Manually setting up parameters of iC-NQ(C)

• Saving parameter configuration into EEPROM

• Saving parameter configuration to HEX files

• Loading predefined configurations from HEX files

• Reading and displaying of sensor data

Installation

After unzipping the iC-NQ(C) software package NQ(C)1SO_gui_xx resp. NQ(C)1SO_gui_xxrte, the following

files are located in the selected working directory.

xx is a placeholder for revisions

→ Subfolder NQ(C)1SO_gui_xx including the executable setup.exe which starts the installation routine.

→ Driver packages for USB, LPT and/or other adapter devices.

→ Evaluation board description.

Note: Administrator rights are required to run installations.

1. To access the iC-NQ(C) evaluation board, interface adapter drivers for USB, LPT and/or other adapter de-

vices need to be installed. Before connecting the adapter to your PC the driver installation must be completed

successfully.

→ Execute the USB_xx.exe and/or LPT_xx.exe installation package and follow the on-screen instructions. This

can take a few minutes.

1.1 When using an iC-Haus USB adapter, it must be connected to the PC after the driver installation, to complete

the whole driver installation procedure.

2. Install the evaluation software NQ(C)1SO by executing the setup.exe located in the subfolder

NQ(C)1SO_gui_xx.

→ Follow the on-screen instructions to finish the installation.

3. After installation the executable NQ(C)1SO_gui_xx.exe will be available in the selected working directory.

Figures 5 and 6 show a screenshot of the evaluation software.

LabView™is a trademark of National Instruments.

Page 7: iC-NQ, iC-NQC EVAL NQ6D · iC-NQ, iC-NQC EVAL NQ6D EVALUATION BOARD DESCRIPTION Rev A3, Page 3/10 CIRCUIT DESCRIPTION The NQ6D evaluation board is equipped with the iC-NQ/iC-NQC Interpolator

iC-NQ, iC-NQC EVAL NQ6DEVALUATION BOARD DESCRIPTION

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Figure 5: Evaluation software start-up window iC-NQ

Figure 6: Evaluation software start-up window iC-NQC

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Function Description

The iC-NQ(C) evaluation software starts in No Hardware mode (Interface disconnected). For a detailed de-

scription of the parameter settings please refer to iC-NQ(C)’s data sheet. When moving the mouse cursor to

a parameter input box, a tooltip is displayed identifying the corresponding parameter name as described in the

specification.

The software is divided into five sections.

• Menu

• Header

• Sensor

• Parameter

• Status

1 Menu Section

Button Description

<File> Save File Saves the configuration to a file, Intel HEX file format (*.hex).

Load File Loads the configuration to the IC, Intel HEX file format (*.hex).

Save BiSS Master Config Saves a *.cfg file with the current BiSS master configuration (for iC-

MB3 only)

Exit Quits the software.

<Interface> BiSS Setup Opens a window for BiSS master clock configuration.

Connect & Read Checked: connects the PC adapter and reads the IC registers.

Unchecked: connects the PC adapter without reading the IC

registers.

No Hardware Switches to No Hardware mode to reset the communication between

the PC and the adapter.

iC-Interface ↔ LPT (MB3A) for use with PC-LPT adapter MB3A ...

iC-Interface ↔ USB (MB3U) for use with PC-USB adapter MB3U resp. MB3U-I2C ...

iC-Interface ↔ USB (MB4U) for use with PC-USB adapter MB4U (supported by iC-NQC GUI only) ...

...enables communication between the PC and the iC-NQ(C) and

reads all parameters from the iC to the evaluation software.

<Extras> About Additional software information.

2 Header Section Project title, software version and connection state.

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3 Sensor Section Reading and displaying of sensor data.

Button Description

<Sensor> Read Sensor Reads one data frame from iC-NQ(C).

Output Displays sensor data in decimal, HEX or binary format.

Stop on Error Stops reading sensor data if an error occurs.

Continuous Read Continuously reads data frames.

Data Display Enables a window to visualize sensor data.

Save to File This function works in different ways, depending on the adapter

used.

MB3U: Saves to file while reading sensor data.

MB4U: Reads the amount of cycles defined by Cycle Count and

writes the array of data to the file afterwards. While reading the

amount of cycles the software is not responding to user interaction.

Cycle Count Only available when using adapter MB4U. Defines the amount of

BiSS Frames (cycles) to read.

4 Parameter Section Reading and writing Parameter configuration.

Button Description

<Tabs> Signal Conditioning see iC-NQ(C) datasheet

Interpolator Setup see iC-NQ(C) datasheet

Interface Setup see iC-NQ(C) datasheet

HEX Editor This tab is a different view of the IC’s register content in HEX for-

mat. Changes made are not automatically updated to the other tabs.

Push <Read RAM> to update the parameter tabs.

iC-NQC only The HEX Editor is divided into several tabs displaying the banks of

the iC-NQC. By choosing a larger EEPROM type this HEX Editor will

expand and more banks will be available.

<Parameter> Read RAM Reads all parameters from the iC-NQ(C) to the evaluation software.

Write RAM Writes all parameters from the software to the iC-NQ(C) RAM.

Write Immediately Writes changes to parameters immediately. Disable this to use the

software without hardware.

Write EEPROM Writes all parameters and the BiSS ID to the EEPROM

(For parameter settings, please refer to iC-NQ(C) data sheet for a detailed description.)

5 Status Section Displaying feedback of user interaction.

REVISION HISTORY

Rev Notes Pages affected

A1 Initial version

A2 Chapter Evaluation Software revised 5-8

A3 Chapter Evaluation Software revised; Adapter MB4U added 1, 6-9

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