ICECS '99

Proceedings of ICECS '99

The 6th IEEE International Conference

on Electronics, Circuits and Systems

Pafos, CYPRUS, 5-8 September, 1999

V O L U M E I OF I I I

Volume I

MIA

Analog Circuits I

A Fully Integrated 2 GHz Frequency Synthesizer 1 Ahola R., Stadius K. and Halonen K.

Design of Bipolar RF Ring Oscillators 5 Finocchiaro S., Palmisano G., Salerno R. and Sclafani C.

SC Quadrature Mixer for if Bandpass Sampling 9 Manetakis K., Toumazou C. and Papavassiliou C.

New Circuit Techniques Based on a High Performance Frequency-to-Voltage Converter 13 Djemouai A., Sawan M. and Slamani M.

An Enhanced Frequency Synthesizer Using an Analog Dual Input Accumulator 17 Efstathiou K. and Papadopoulos G.

M1B

VLSI Design I

A Complex Multiplier Using "Overturned-Stairs" Adder Tree 21 Li W. and Wanhammar L.

A Fast Scheme and Implementation for n-bit Squarer 25 Mahdy Y. B, Ali S. A. and Shaaban K. M.

The Novel Efficient Design of XOR/XNOR Function for Adder Applications .' 29 Cheng K-H. and Huang CS.

Efficient Implementation of a Serial/Parallel Multiplier for IP Based Development and Rapid Prototyping in VLSI Digital Signal Processing 33

Adaos K. D. , Alexiou G. P. and Kanopoulos N.

A 56-bit Self-Timed Adder for High Speed Asynchronous Datapath 37 Corsonello P., Perri S. and Cocorullo G.

MIC

Hardware /Software Codesign

Hardware/Software Codesign of an Avionics Protocol Interface System 43 Cloute F., Contensou J. N., Esteve D., Lenz-Enseeiht, Pampagnin P., Pons P., andFavard Y.

Automatic Architecture Evaluation for Hardware/Software Codesign 47 Hadjiyiannis G., Russo P. and Devadas S.

Application of a Multi-Formalism Co-Design Methodology for the Development of Complex Telecommunication Protocols 55

Vows N., Tsasakou S., Birbas A. Sanchez L. and Alonso A.

Hardware - Software Co-Design of Embeded Systems Using CoWare's N2C Methodology for Application Development 59

Tsasakou S. K., Vows N., Koziotis M., Prayati A. S. and Birbas A.

Hardware/Software Co-Simulation Methodology Based on Two Alternative Approaches 63 Pramataris K., Lykakis G. and Stassinopoulos G.

XXI

MID

Digital Filters I

Time-Variant CIC-Filters for Sample Rate Conversion with Arbitrary Rational Factors 67 Henker M., Hentschel T. and Fettweis G.

Analytical Design of FIR Filters 71 Vlcek M., Zahradnik P. and Unbehauen R.

Estimation of the Coronary Artery Dimensions Using Stack Filtering Approach 75 AI-Faris D. M., Zabalawi I. H. and Mismar M. J.

Reduced Complexity Comb-Filters for Decimation and Interpolation in Mobile Communications Terminals 81

Hentschel T. and Fettweis G.

Design of Doubly Complementary Filters Based on the Complex All-Pass Section 85 Klouche-Djedid A. and Lawson S. S.

M1E

Computer Communications I

MCA: One-Port Scalable Microprogrammable ATM Layer Controller 89 de Lima J. A. G., Cavalcanti A. C. and Melchier E. U. K.

An Efficient Component (IN-RAM) for Buffer Management and Multiprotocol Implementation in ATM Systems 93

Doumenis Gr., Lykakis G., Synnefakis G., Konstantoulakis G., Korinthios G. and Reisis D.

An IRAM-Based Architecture for a Single-Chip ATM Switch 97 Papaefstathiou I., Brown A., Simer J., Sobel D., Sutaria J., Wang S. Y., Blackwell T., Smith M., and Yang W.

Performance Analysis of an ATM High-Speed Network Interface 101 McEachen J. C. and Batson M. S.

Media Access Control Development Platform for Wireless LANs 105 Ganz A., Sawides A. and Ganz Z.

M1F

Neural Networks I

A Neural Network Method for Accurate Face Detection on Arbitrary Images 109 Anifantis D., Dermatas E. and Kokkinakis G.

Programmable 2D Image Filter for AER Vision Processing 113 Serrano-Gotarredona T., Linares-Barranco B. andAndreou A. G.

Neural Classification of Abnormal Tissue in Digital Mammography Using Statistical Features of the Texture 117

Christoyianni I., Dermatas E. and Kokkinakis G.

Medical Diagnostic Systems Using Ensembles of Neural SOFM Classifiers 121 Christodoulou C. I. and Pattichis C. S.

Comparison of Neural Networks for Speaker Recognition 125 Wouhaybi R. and Al-Alaoui M. A.

M1P

General Circuits and Systems

Analogue Computational Circuits Based on Floating Gate Transistors 129 Vlassis S., Yiamalis Th. and Siskos S.

Development of a Microcontrolled Data Acquisition System to Optimize the INPE's Data Collecting Station via Satellite 133

de Oliveira Brandao C, Fialho S. V. and Nicolau J. A.

XXII

Analysis of Nonlinearities in RF CMOS Amplifiers 137 Feng C-H., Ismail M., Jonsson F. and Olsson H.

Thevenin's Theorem: A New Formulation 141 Sommariva A. M.

Optimised Models of IIR Digital Filters for Fixed-Point Digital Signal Processor 145 Smekal Z. and Vieh R.

Dispersion Analysis and Adaptive Transformation of Chaotic Signal Attractor 149 Dailyudenko V. F.

Synchronization of Chaotic Colpitts Oscillators with Applications to Binary Communications 153 Rubezic V., Ostojic R.

Controlling Chaos in Buck Converters 157 Vlad C, Lungu S., Petreus D. and Farcas C.

An Original Approach for the Design of a Class D Power Switching Amplifier - An Audio Application 161 Dondon P. and Micouleau J. M.

A Novel and Efficient PCM to PWM Converter for Digital Audio Amplifiers 165 Flows A. C. and Mourjopoulos J. N.

Comparison of Two Efficiency DC to AC Converters 169 Edelmoser K. H. and Himmelstoss F. A.

On the Noise Analysis of Modulated Nonlinear Circuits 173 Lapinoja M. and Rahkonen T.

A Novel Analytical Technique for Spectral Analysis Prediction in Asynchronous Pulsewidth Modulated Inverter Systems 177

Guinee R. and Lyden C.

M2A

Analog Circuits II

Low Phase Noise Reference Oscillator with Integrated PMOS Varactors for Digital Satellite Receivers 181 van der Tang I. D. and Kasperkovitz D.

An Integrated Programmable Low-Noise Charge Pump 185 Häkkinen J., Rahkonen T. and Kostamovaara J.

Exponential and Logarithmic Functions Using Standard CMOS 0.8 u.m Technology 189 Abouchi N., Gallorini R. and Ruby C.

A Fully Integrated 1 GHz BiCMOS VCO 193 Zohios ]., Ismail M.and Kramer B.

M2B

VLSI Design II

A High Speed BiCMOS Tristate Buffer Circuit 197 Suriyaammaranon C, Dejhan K., Cheevasuvit F. and Soonyeekan C.

Performance Comparison of Driver Architectures in Submicron CMOS and BiCMOS Technologies for Low Voltage Operation 201

Moisiadis I, Papadas C, Bouras I. and Arapoyanni A. •, «

Exploiting Hysteresis in a CMOS Buffer 205 Secareanu R. M., Adler V. and Friedman E. G.

A Leakage-Tolerant Multi-Phase Keeper for Wide Domino Circuits 209 Alvandpour A., Larsson-Edefors P. and Svensson C.

Novel Designs in Domino Logic 213 Haniotakis T„ Tsiatouhas Y. and Arapoyanni A.

XXIII

M2C High Level Synthesis

Implementation of Virtual Control Circuits in Dynamically Reconfigurable FPGAs 217 Oliveira A. and Sklyarov V.

Code Generation Tools for Hardware Implementation of FEC Circuits 221 Schüler C.

Circuit Synthesis Based on VHDL Language Transformations 225 Varga L., Hosszu G. and Kovacs F.

Hardware Implementation of the Median-Rational Hybrid Filters 229 Bernacchia G, Sicuranza G, Khriji L. and Gabbouj M.

A Formal Method for Hardware Design Using Attribute Grammars 233 Economakos G and Papakonstantinou G

M2D Digital Filters II

Improvement of the Signal to Noise Ratio of the Magnetic Detection System Using the Geological Magnetic Filter 237

Kim W-H., Kim J.-C., Choi I.-K. amdPark J-S.

A Comparison Between Lattice, Cascade and Direct-form FIR Filter Structures by Using an FPGA Bit-Serial Distributed Arithmetic Implementation 241

Peiro M., Vails J., Sansaloni T., Pascual A. P., and Boemo E. I.

ODIF for Weighted Median Filters 245 Peltonen S. and Kuosmanen P.

Digital Filter Design for a PAL TV Modulator 249 Yli-Kaakinen J., Hu M„ Kupiainen T. and Renfors M.

Design of Discrete Valued Coefficient FIR Filters Using Frequency Response Masking 253 Lian Y.

M2E Computer Communications II

Design of an Optoelectronic Crossbar Based on 0.6 micron CMOS Process with an 1 Tbits/s Optical Input 257

Benabes P., Gauthier A., Kielbasa R., Goetz M., Forbes M. G, Walker A. C. and Desmulliez M. P. Y.

Cryptosystem Architectures for Very High Throughput Multimedia Encryption: The RPK Solution 261 Romeo A., Romolotti G, Mattavelli M. and Mlynek D.

KORA-2: A New Cache Replacement Policy and its Performance 265 Khalid H., and Obaidat M. S.

Minimising Communications of Synchronous Hardware 271 de Meto A. C. V.

On the Exact Reliability Evaluation of Mesh-Connected Processors 275 Fahmy H. M. A. and El-Hefnawy A. A.

M2F Neural Networks II

Feedforward Neural Network Based Nonlinear Dynamical System Function Reconstruction 279 Jianhua H., Zongkai Y., Shu W. and Wenqing C.

Person Identification Based on Parametric Processing of the EEG 283 Poulos M., Chrissikopoulos V., Rangoussi M. and Evangelou A.

Speech Signal Processing in Order to Increase Recognition of Spoken Language 287 Halas H. R.

XXIV

Nonmonotone Learning Rules for Backpropagation Networks 291 Plagianakos V. P., Vrahatis M. N. and Magoulas G. D.

Handwritten Digit Decognition Using Trace Neural Network with EKF Training Algorithm 295 Wong K-W., Chang S-J. and Leung C-S.

M3A

Analog Circuits III

Analog Computational Circuits for Neural Network Implementation 299 Al-NsourM. and Abdel-Aty-Zohdy H. S.

A High-Speed High-Resolution CMOS Current Comparator 303 Luh L., Choma J. Jr. and Draper J.

Extended Analysis of Input Impedance Control of an NMOS-transistor with an Inductive Serial Feedback 307 Stenman A-C. and Sundström L.

Electronically-Tunable Floating CMOS Resistor Independent of the MOS Parameters and Temperature 311 Papazoglou C. A. and Karybakas C. A.

A New 5-Parameter MOS Transistor Mismatch Model 315 Serrano-Gotarredona T. and Linares-Barranco B.

M3B

VLSI Design III

Silicon Realization of an OFDM Synchronization Algorithm Johansson S., Landstrom D. and Nilsson P.

Implementation of Sign Detection in RNS Using Mixed Radix Representation Henkelmann H. and Anheier W.

A DDS Synthesizer with Time Domain Interpolator Rahkonen T., Eksyma H., Repo H. and Martis T.

A Novel Latch Design Technique for High Speed GaAs Circuits Nooshabadi S. V., Montiel-Nelson J. A. and Eshraghian K.

Integrated Multivalue Voltage-To-Voltage Converter Zhang M„ Llaser N. and Devos F.

M3C

Logic Synthesis

An Efficient Method for the Decomposition and Resynthesis of Speed-Independent Circuits Chen R-D., Jou J. M. and Shiau Y.-H.

Generalized Symmetric and Generalized Pseudo-Symmetric Functions Chrzanowska-Jeske M.

A Hybrid Approach to Design Error Detection and Correction Veneris A. G. and Hajj I. N.

Simulation-Based Sequential Equivalence Checking of RTL VHDL Corno F., Reorda M.S. and Squillero G.

Equivalence Checking of Hierarchical Combinational Circuits Williams P. F., Hulgaard H. and Andersen H. R.

M3D

Digital Filter Banks

Complexity Evaluation of Conjugate Quadrature Mirror Filter Banks 361 Caini C, Salmi P. and Coralli A. V.

XXV

319

323

327

331

335

339

343

347

351

355

A Method to Improve the Frequency Characteristics in Filter Transition Period for Time-Varying Cosine Modulated Banks 365

Wang G.

Algorithm for Jointly Optimized Analysis and Synthesis FIR Filter Banks 369 Hj0rungnes A. and Ramstad T. A.

Nearly Perfect-Reconstruction Cosine-Modulated Filter Bank Design for VDSL Modems 373 Viholainen A., Saramaki T. and Renf'ors M.

Watermarking DSP Algorithms for System on Chip Implementation 377 Chapman R., Durrani T. S. and Tarbert A. P.

M3E

Numerical Methods I

Computing Hexagonal Steiner Minimum Trees Using PCx 381 ThurberA. P. and Xue G.

A Powerful Algorithm for Distribution Systems Analysis 385 Kartas A. N. and Tsanakas D. K.

Average Network Delay in Packet Switched Networks 389 Ayoub J. N. and Al-Ramadna B. M.

A Numerical Method to Synthesize the Element Characteristics in Analog Circuit Design 393 Halfmann T. and Thole M.

An Evolutionary Algorithm for Optimization of Power Supply Systems on Multichip Modules 397 Huber A., Weyhmiiller F., Reiß K. and Mlynski D. A.

M3F

Neural Networks III

Implementability Restrictions of the Beta-CMOS Artificial Neuron 401 Varshavsky V. and Marakhovsky V.

EA Crossover Schemes for a MLP Channel Equaliser 407 Power P., Sweeney F. and Cowan C. F. N.

Shift-Add Neural Architecture 411 Skrbek M. and Snorek M.

Neural Discrimination Analysis on Preprocessed Data 415 Caner S. E. and Seixas J. M.

M3P

Multimedia and Communications

LSP Parameter Interpretation for Speech Classification 419 McLoughlin I. V. and Thambipillai S.

Signal Processing and Statistical Procedures to Identify Laryngeal Pathologies 423 Rosa M. O., Pereira J. C, Grellet M. and Carvalho A.

Blind Signal Separation and Speech Recognition in the Frequency Domain 427 Koutras A., Dermatas E. and Kokkinakis G.

TCT Reconstruction with Truncated Projection Data 431 Gregoriou G. K. and Tsui B.

The Use of Entropy for Colour Edge Detection 437 Fotinos A., Economou G., Zigouris E. and Fotopoulos S.

Tree-Structured Product-Codebook Vector Quantization 441 Poggi G. and Ragozini A. R. P.

XXVI

The Application of Multiwavelet Transform to Image Coding 445 Lin G. and Liu Z.

A Low-Complexity 2-D Discrete Cosine Transform for Multimedia Applications 449 Fanucci L„ Saletti R. and Vavala F.

Limited Motion Estimation Scheme for Multimedia Video Compression 453 Evans A. N., Guo Y. and Monro D. M.

Robust Digital Receiver for Frequency Redundant Digital Communications over Power Lines 457 Sliskovic M.

Intereference Suppression in DSSS Communication Systems Using Instantaneous Frequency Estimation 461 Akan A. and Cekic Y.

A Proposal of Avatar Language with LIFO for Communication Through Linguistic Barrier 465 Hashimoto A., Kim J., Aoki Y. and Burger A.

The Fat Clos ATM Switch 469 Veglis A. A. and Pombortsis A. S.

A Reed-Solomon Coding/Decoding Structure for an ADSL Modem 473 Stylianakis V. and Toptchiyski S.

An Innovating Hypermedia Approach Complementary to Traditional Electronics Teaching 477 Ferry P., Degrugillier D., Caillere N. and Graton G.

M4A

Analog Filters

A New Predictive Control Strategy for Active Power Filters 481 Ghoudjehbaklou H. and Kargar A.

A Comparison Between Integrated Current and Voltage Mode Filters for Baseband Applications 485 Georgantas T., Dervenis D., Bouras S. and Papananos Y.

A 1.5V Active RC Filter for WCDMA Applications 489 Jussila J. and Halonen K.

Pure-Mode Gm-C Biquad Filters .-. 493 Arbel A.

Active Feedback Amplifier Approach for Microwave Filter 497 Choi W. W., Tarn K. W., Martins R. and VitorP.

M4B

VLSI Design IV

Differential Current Amplifiers with Improved Dynamic Range 501 Chrisanthopoulos A., Souliotis G. and Haritantis I.

Varactor Diodeless Harmonic VCOs for GHz-Range Application 505 Stadius K., Kaunisto R. andPorra V.

Indirect Negative Feedback Bipolar LNA 509 Adiseno, Olsson H. and Ismail M.

A Current Mode Multistable Memory Using Asynchronous Successive Approximation A/D Converters 513 Conti M., Orcioni S., Turchetti C. and Biagetti G.

New CMOS Instrumentation Amplifier Dedicated to Very Low-Amplitude Signal Applications 517 Harb A., Hu Y. and Sawan M.

M4C

Special Session: ESPRIT ESD-LPD Projects

Modelisation and Simulation of Integrated Super-Regenerative Receivers 521 Vouilloz A., Dehollain C. and Declercq M.

XXVII

High-Level Simulation and Power Modeling of Mixed-Signal Front-Ends for Digital Telecommunications 525 Wambacq P., Vandersteen G, DonnayS., Engels M., Bolsens L, Lauwers E., Vanassche P. and Gielen G.

A Basic Design Guide for CMOS Folding and Interpolating ADCs - Overview and Case Study 529 Lin K-L., van den Boom T., Stevanovic N., Driesen J., Hammerschmidt D. and Hosticka B.

Current-Mode Baseband Interface for Communications Applications 533 Bouras St., Papananos Y., Georgantas Th. and Dervenis D.

M4D

Wavelets and Multirate Signal Processing

Electromyogram Decomposition Using the Single-Linkage Clustering Algorithm and Wavelets 537 Wellig P. and Moschytz G. S.

Wavelet Transform in Detection of Disturbances and Harmonics Filtering 541 Alves A. F., da Costa P. Jr., Santos A. R. andPires F. A. C.

A Flexible Subband-Based Computation Scheme for Generalized Discrete Time-Frequency Distribution 545 Le T. and Glesner M.

Wavelet Transform Approach to the Detection of the Breaking Point of the Transient Signal in the Circuit 549 Osowski S. and Majkowski A.

Robust Estimation of Image Fractal Dimension Based on Pyramidal Decomposition 553 Aiazzi B., Baronti S., Alparone L., Bulletti A. and Garzelli A.

M4E

Numerical Methods II

Hybrid Method of Tolerance Design 557 FooS. W. and Lin Y. M,

A Sampling Theorem in Numerical Integration 561 Hanggi M., Moschytz G. S. and Reddy H. C.

Analysis of Shielded Microstrip Lines by Finite-Difference Method 565 Cantaragiu S.

A Radix-2 General Division Algorithm with Carry-Free Scheme and the Divider Implementation 569 Chiang J-S., Chung H-D. and Tsai M-H.

On Searching of All Occurrences of a Word in a String 573 Dogaru O. and Dogaru R.

M4F

Neural Networks IV

Towards Close-to-Nature Neural Networks 577 Stoop R. and Bunimovich L. A.

A Unified Sequential Method for PCA 583 Wong A. S. Y., Wong K. W. and Leung C. S.

A Quick and Naive Euclidean Learner for Supervised Feature Selection 587 Chan Tony Y. T.

Effective Neural Network Training with a Different Learning Rate for Each Weight 591 Magoulas G. D., Plagianakos V. P. and Vrahatis M. N.

Particle Discrimination Using Matched Filters and Expert Neural Networks 595 Soares Filho W., Damazio D. O. and Seixas J. M.

XXVIII