A Process Variation Detection Method

Vazgen Melikyan Davit Mirzoyan Gor Petrosyan Synopsys Armenia CJSC Synopsys Armenia CJSC Synopsys Armenia

CJSC Vazgen.Melikyan@synopsys.com Davit.Mirzoyan@synopsys.com Gor.Petrosyan@synopsys.com

Abstract

A new simple and versatile PV detection method is proposed that allows detecting MOS transistor’s parameters variation. Theoretical analysis and simulation results for threshold voltage, mobility, oxide thickness prove the performance of the circuit (with the basic method). The use of only MOS transistors and the lack of reference sources allow obtaining small area and high detection accuracy. 1. Introduction

As a result of continuous scaling in CMOS technologies the effects of process variations (PV) on power and performance characteristics of integrated circuits (IC) are increasing. Device (e.g. metal-oxide-semiconductor (MOS) transistor) parameter variations, generally characterized as die-to-die (D2D) and within-die (WD) [1] decrease the parametric yield of ICs. The sources of variability are transistors, interconnects, operating environment (supply and temperature), etc. The first two types of variability called manufacturing induced variations are caused by imperfections of process steps. Deviations during photolithography and etching lead to variations of widths and lengths [2]. The variation in film thicknesses (e.g., oxide thickness, gate stacks) is caused by the deposition and growth process as well as chemical-mechanical polishing (CMP) step. Since large number of parameters of MOS transistors depends on bulk (source/drain) doping concentration, variations in the dosage of these implants, and the temperature of annealing steps negatively affect the mentioned parameters, especially threshold voltage [2]. 2. Overview of the existing PV detection techniques

To model PV variation of parameters of MOS transistors, the following are usually used: threshold

voltage, bulk doping concentration, oxide thickness, channel length and width, mobility etc. During digital blocks’ design, variation of gate and subthreshold leakage may also be added.

Two main approaches exist for PV insensitive IC design. The first approach is when blocks are designed such that their functionality remains the same and the parameters stay within the specified range in the presence of PV. This approach is the main and widely used owing to its simplicity. The second approach uses special PV detection circuits. The result of detection is usually current, voltage, frequency, bits, which are used for PV affect’s compensation. This is performed by specially designed tuning pins. This approach is seldom used because of the lack of PV detection methods; however it provides much more accuracy (making the blocks more robust and stable against PV).

Despite the variety of PV detection circuits, they are based on only several methods. The most widespread detection method is the comparison of measured variable with reference one which is conceptually shown in Fig. 1. Xr is the reference (fully insensitive to PV) variable (usually voltage or current), Xm- measured variable suffering from PV. The result of comparison is an output variable Xout. The behavior of the system is thus described as follows

)( rmout XXKX (1)

where K is the gain of the comparator (Fig.1.b). Equation (1) shows the accuracy of the output variable depends on the accuracy of reference one, the gain and also the variation of transfer characteristics (Fig.1.b) of the comparator. Nevertheless, the detection accuracy of

compa-rator X

Xou

X

XXou

Reference variablevariable

variation

X

978-1-4244-9556-6/10/$26.00 ©2010 IEEE

Figure 1. PV detection by comparing to reference variable

modern circuits based on the mentioned principle, mainly depends on the accuracy of reference variable, since variation induced characteristics’ “shift” are compensated by the use of various feedbacks.

Now the most insensitive voltage (current) sources utilize bipolar transistors and resistors [3]. Although their parameters’ variation increases as well (parallel to technology nodes), such sources achieve 1-5% variation of reference voltage. However they occupy large area and consume large current. In some applications severe tradeoff between area and current forces designers to use MOS based sources with much less area [4]. In addition to area, a smaller current consumption is achieved utilizing subthreshold operation of transistors.

A simple example of direct comparison method usage is the circuit given in [5]. As PV monitoring variable subthreshold current of MOS is used. It is compared with reference current by comparators, each of which has different thresholds. As an information on PV a digital code is formed. Increasing the number of comparator increases the accuracy of PV detection.

An example of indirect comparison of measured variable with reference one is the circuit presented in [6]. Here the variation of n and p type MOS transistors is detected by measuring the rise and fall times of ring oscillator on 20% and 80% levels. The output signal of circuit is a voltage which value is proportional to rise or fall times. “Indirect comparison” comes from the fact that measurement levels are fixed by reference voltage.

3. Proposed PV detection method

The proposed PV detection method is based on abrupt change of equilibrium state of self biased cell requiring no reference variable. Current or voltage may be used as information about PV (threshold voltage, mobility etc.). Fig.2 represents the principle of the proposed method. The system consists of two blocks; the input of each is an output of the other one. Fig.2.c, d shows examples of transfer characteristics of the blocks. The main requirement for characteristics’ shape is the existence of nonzero operating points (OP) only for some values of PV (parameters). This means e.g. threshold voltage change should cause the system fall into zero state being initially in nonzero. It is obvious that for this purpose abrupt and “cut-off” regions must exist on the characteristics (transfer functions).

Transfer function of block A is a linear function not depending on PV. This can be easily implemented by well known current mirrors [7]. Block B has nonlinear transfer function depending on PV. PV related variable is denoted by p, which values are the sets of transistor parameters. E. g. the value p1 corresponds to particular values of channel length, oxide thickness etc. Fig.2.c, d show, the system is designed such, that at p2 it is in stable OP (non-zero). As a result of PV (p1) the system falls into zero OP. Owing to such behavior, currents (voltages) in the system sharply change from Iop to 0 which is assumed as detection. In contrast to Fig.2.c, curves in Fig.2.d not only are shifted to right, but also go up thereby complicating the detection. In the extreme case when the shifts in horizontal and vertical directions are equal, detection will not be performed.

a. b. c. d.

Figure 2. Conceptual structure of the proposed method (a,b), corresponding characteristics (c,d)

To characterize the shift of the curves two concepts

are introduced - cutoff current (Icut), which equals to the input current, when the output one is 0, and the output current (Icc) at constant input current (Icin, Fig.2.b). Icin is an arbitrary input current, larger OP current (Iop). Considering the mentioned assumptions, PV detection condition (at given shapes of curves) will be

p

I

p

I cccut

(2)

(2) is a necessary condition of detection if both derivatives have the same sign. In a case of opposite signs detection will take place at any value of variable p. As an indicator of detection the current of the system can be used. Iop is assumed as high logic level, 0 as low. The logic levels allow further processing of PV information by other digital blocks.

Proposed method is implemented in a circuit which conceptual structure is shown in Fig.3. Transistors form a current mirror with nonlinear transfer function.

I2

I1

A B

A

Bp

p

I2

I1Iop

I2

I1

A

Bp

p

Iop

A

B

I2

I1

operating points

Iop Icu

Icc

0 Icin

(Fig.3.b, curve 1). To obtain a transfer function for a detection (Fig.2.b), a current source is added (I0), allowing “shift” the transfer function to right (Fig.3.b, curve 2). At low levels of current transistors operate in subthreshold mode, at high level - in strong inversion. Writing drain current equations for both regimes of operations and solving together (including I0) yields

T

th

mV

V

T

thth

eV

III

VIIVIII

22

32012

32

2

23

012

3012 44

)()(

(3)

where Vth is the threshold voltage of transistors, βi is the transconductance of the i-th transistor, VT is the thermal voltage [7], m is subthreshold slope [4], β1=β2. By regulating I0 value, detection threshold is changed.

a. b. Figure 3. Simplified structure of detection circuit

To study the realization of (2) condition for the

proposed circuit, complete structure must be examined (Fig.4). Supply-independent, self-biased circuit [4,7] (Block A) allows obtain a current (voltage) depending only on PV. It consists of nonlinear and simple mirrors. Block B forms a voltage less than a threshold voltage to keep transistor M10 in subthreshold region, which acts as current source. Keeping M10 in subthreshold mode helps to realize condition (2) much easier. Necessary voltage is formed by a follower (M8, M9), which input voltage (V1) is 0.6V, the threshold voltage of transistors - ~0.4V, so the output voltage is ~0.2V.

Figure 4. Structure of the proposed detection circuit

The core of the circuit (block C) consists of simple mirror (M11, M12) with linear transfer function and

nonlinear mirror (M13-M15). They are designed such that the system (M10-M15) has two OP (Iop and 0) at the minimum value of p, and one OP (only 0) at the maximum value. To describe the behavior of the system V1 and IA are first calculated

th

thA

bVV

aVI

1

2

(4)

where 254

54

22

a ,

85

9

72

62

ab

Note that being in saturation transistors M1-M9 always operate in strong inversion region and β1=β2, β11=β12. The transfer function of the nonlinear mirror (M13-M15) is determined by (3) equation replacing β3 by β15, β2 by β14 and using the following equation for IC

T

th

mV

bV

TC eVI

)( 1

210

(5)

Icut and ICC are calculated based on (3), (5) equations

T

th

mV

bV

Tcut

thcutcinthcutcincc

eVI

VIIVIII

)(

)()(

1

210

152

14

215

14

15 44

(6) where Icin is the input current (IM14) corresponding to Icc.

To verify condition (2) for threshold voltage, oxide thickness, mobility, the corresponding derivatives of Icc and Icut are evaluated and their sign is checked

00

00

00

cutcc

ox

cut

ox

cc

th

cut

th

cc

Iconst

I

t

I

t

I

V

I

V

I

),(

,

,

(7)

where tox is the oxide thickness, is the mobility. (7) shows that for threshold voltage and oxide thickness variation detection can always be performed. The situation is little different for mobility. Since the first derivative is constant, second one depends on mobility, detection of mobility variation can be performed by proper choice of mentioned derivatives. Since all transistors are in saturation, so have large channel (~1-5um) lengths and widths, theirs’ variation is negligible. 4. Simulation results

The proposed circuit (method) has been simulated with HSPICE (Synopsys) tool using SAED90nm

M1

I0

M2 M3

I1 I2

V1

M1

M

M2

VDD

M4

M

M

M

M

M

A C

M1

M1

M13

M12

M14

M1

B

ICIA

1

2

I2

I1I0

educational library (90nm bulk CMOS). To model PV various sets of threshold voltage, mobility and oxide thickness are used, lying between worst cases (ss,ff)[1,2,7]. For the system stability check, transfer function of mirrors are obtained (Fig.4) for tt, ss and ff.

Figure 5. Transfer functions of current mirrors

(block C)

Existence of two stable OPs in ff case, and one OP in tt and ss case proves the functionality of the circuit. The startup circuit [7] for blocks A and C is not shown.

To verify the realization of (2) condition for the above mentioned parameters, their values have changed within certain (given by technology) limits and Icut and Icc have been probed (Fig.5). The results show coincidence with (7) equations and again confirm that the detection of mentioned parameters is possible.

a. b.

Figure 6. The dependence of Icc and Icut (normalized value) on threshold voltage (a), mobility change (b) The detection signal (IM14) is plotted (Fig.7) at different values of mentioned parameters of MOS between ss and ff cases. E.g. values corresponding to ff case are - Vth = 0.37V, = 510cm2/V*s, tox = 7nm.

Thus, using proposed method it is possible to detect the PV by current (voltage as well) in “digital” form. If the current is converted to a voltage, its logic level can

Figure 7. Dependence of the detection current on corners

be easily stored in memory cells (e.g. simple triggers). 5. Conclusion

A new PV detection method is proposed that allows detecting MOS transistor’s parameters variation. Theoretical analysis and simulation results for the main parameters of MOS prove the performance of the circuit. The use of only MOS transistors and the lack of reference sources allow escaping the detection inaccuracies related to them. The result of detection - a digital signal (preferably voltage) can be easily used not only for n-MOS, but also for p-MOS and resistor’s parameters’ variation detection. 6. References [1] Ayhan A. Mutlu, Mahmud Rahman, “Statistical Methods for the Estimation of Process Variation Effects on Circuit Operation”, IEEE Trans. Electronic Packaging, Manufacturing, vol. 28, pp. 364-375, 2005. [2] Liang-Teck Pang and Borivoje Nikolic, “Measurements and Analysis of Process Variability in 90 nm CMOS”, IEEE Journal Solid-State Circuits, vol. 44, pp. 1655-1663, 2009 [3] Ka Nang Leung and Philip K. T. Mok, “A Sub-1-V 15-ppm/°C CMOS Bandgap Voltage Reference Without Requiring Low Threshold Voltage Device”, IEEE Journal Solid-State Circuits, vol. 37, pp. 526-530, 2002. [4] G. Giustolisi, G. Palumbo, M. Criscione, and F. Cutrì, “A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs”, IEEE Journal Solid-State Circuits, vol. 38, pp. 151-154, 2003. [5] Chris H. Kim, Kaushik Roy, Steven Hsu, Ram Krishnamurthy, and Shekhar Borkar, “ A Process Variation Compensating Technique With an On-Die Leakage Current Sensor for Nanometer Scale Dynamic Circuits”, IEEE Trans. VLSI Systems., vol. 14, pp.646-649 , 2006 [6] Amlan Ghosh, Rahul M. Rao, Jae-joon Kim, Ching-Te Chuang and Richard B. Brown, “On-Chip Process Variation Detection using Slew-Rate Monitoring Circuit”, 21st Int. Conf. VLSI Design, pp.143-147, 2008. [7] Razavi B. “Design of analog integrated circuits”, Prentice Hall, 2009.

tf ss

Number of corners Vth=370mV (ff)

Vth=430mV (ss)

Input current (uA)

Icc

Icu

Threshold voltage change (mV)

Icc

Icu

Mobility change (cm2/V*s)