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ARM Generic Interrupt Controller

Architecture version 2.0

Architecture Specification

Copyright 2008, 2011 ARM Limited. All rights reserved. ARM IHI 0048B (ID061411)

ARM Generic Interrupt ControllerCopyright 2008, 2011 ARM Limited. All rights reserved.Release Information The following changes have been made to this document.Change History Date 23 September 2008 13 June 2011 Issue A B Confidentiality Non-Confidential Non-Confidential Change First release for version 1.0 First release for version 2.0

Proprietary Notice Words and logos marked with or are registered trademarks or trademarks of ARM Limited in the EU and other countries, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder. 1. Subject to the provisions of Clauses 2 and 3, ARM hereby grants to you a perpetual, non-exclusive, non-transferable, royalty free, worldwide licence to use and copy the ARM Generic Interrupt Controller (GIC) Architecture Specification (Specification) for the purpose of developing, having developed, manufacturing, having manufactured, offering to sell, selling, supplying or otherwise distributing products which comply with the Specification and which contain at least one processor core which has either been (i) developed by or for ARM or (ii) developed under licence from ARM. THE ARM GIC ARCHITECTURE SPECIFICATION IS PROVIDED AS IS WITH NO WARRANTIES EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF SATISFACTORY QUALITY, NONINFRINGEMENT OR FITNESS FOR A PARTICULAR PURPOSE. No licence, express, implied or otherwise, is granted to you, under the provisions of Clause 1, to use the ARM tradename in connection with the ARM GIC Architecture Specification or any products based thereon. Nothing in Clause 1 shall be construed as authority for you to make any representations on behalf of ARM in respect of the ARM GIC Architecture Specification.

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Where the term ARM is used it means ARM or any of its subsidiaries as appropriate. Copyright 2008, 2011 ARM Limited 110 Fulbourn Road Cambridge, England CB1 9NJ Restricted Rights Legend: Use, duplication or disclosure by the United States Government is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19. This document is Non-Confidential. The right to use, copy and disclose this document is subject to the licence set out above. Unrestricted Access is an ARM internal classification.

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Copyright 2008, 2011 ARM Limited. All rights reserved. Non-Confidential

ARM IHI 0048B ID061411

Contents ARM Generic Interrupt Controller Architecture Specification

PrefaceAbout this specification ............................................................................................... vi Using this specification .............................................................................................. vii Conventions .............................................................................................................. viii Additional reading ....................................................................................................... ix Feedback ..................................................................................................................... x

Chapter 1

Introduction1.1 1.2 1.3 1.4 About the Generic Interrupt Controller architecture ............................................... Security Extensions support .................................................................................. Virtualization support ............................................................................................. Terminology ........................................................................................................... 1-12 1-14 1-15 1-16

Chapter 2

GIC Partitioning2.1 2.2 2.3 About GIC partitioning ............................................................................................ 2-20 The Distributor ....................................................................................................... 2-22 CPU interfaces ....................................................................................................... 2-24

Chapter 3

Interrupt Handling and Prioritization3.1 3.2 3.3 3.4 3.5 3.6 3.7 About interrupt handling and prioritization ............................................................. General handling of interrupts ................................................................................ Interrupt prioritization ............................................................................................. The effect of interrupt grouping on interrupt handling ............................................ Interrupt grouping and interrupt prioritization ......................................................... Additional features of the GIC Security Extensions ............................................... Pseudocode details of interrupt handling and prioritization ................................... 3-32 3-35 3-42 3-46 3-51 3-57 3-59

ARM IHI 0048B ID061411

Copyright 2008, 2011 ARM Limited. All rights reserved. Non-Confidential

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Contents

3.8 3.9

The effect of the Virtualization Extensions on interrupt handling ........................... 3-65 Example GIC usage models ................................................................................... 3-66

Chapter 4

Programmers Model4.1 4.2 4.3 4.4 4.5 About the programmers model .............................................................................. 4-72 Effect of the GIC Security Extensions on the programmers model ....................... 4-78 Distributor register descriptions .............................................................................. 4-82 CPU interface register descriptions ...................................................................... 4-122 Preserving and restoring GIC state ...................................................................... 4-153

Chapter 5

GIC Support for Virtualization5.1 5.2 5.3 5.4 5.5 About implementing a GIC in a system with processor virtualization ................... 5-156 Managing the GIC virtual CPU interface .............................................................. 5-158 GIC virtual interface control registers ................................................................... 5-165 The virtual CPU interface ..................................................................................... 5-176 GIC virtual CPU interface registers ...................................................................... 5-177

Appendix A Appendix B

Pseudocode IndexA.1 Index of pseudocode functions ............................................................................ A-196

Register NamesB.1 B.2 B.3 Alternative register names ................................................................................... B-200 Register name aliases ......................................................................................... B-201 Index of architectural names ............................................................................... B-202

Appendix C

Revisions Glossary

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Copyright 2008, 2011 ARM Limited. All rights reserved. Non-Confidential

ARM IHI 0048B ID061411

Preface

This preface introduces the ARM Generic Interrupt Controller Architecture Specification. It contains the following sections: About this specification on page vi Using this specification on page vii Conventions on page viii Additional reading on page ix Feedback on page x.

ARM IHI 0048B ID061411

Copyright 2008, 2011 ARM Limited. All rights reserved. Non-Confidential

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Preface About this specification

About this specificationThis specification describes the ARM Generic Interrupt Controller (GIC) architecture. Throughout this document, references to the GIC or a GIC refer to a device that implements this GIC architecture. Unless the context makes it clear that a reference is to an IMPLEMENTATION DEFINED feature of the device, these references describe the requirements of this specification.

Intended audienceThe specification is written for users that want to design, implement, or program the GIC in a range of ARM-compliant implementations from simple uniprocessor implementations to complex multiprocessor systems. The specification assumes that users have some experience of ARM products. It does not assume experience of the GIC.

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Copyright 2008, 2011 ARM Limited. All rights reserved. Non-Confidential

ARM IHI 0048B ID061411

Preface Using this specification

Using this specificationThis specification is organized into the following chapters: Chapter 1 Introduction Read this for an overview of the GIC, and information about the terminology used in this document. Chapter 2 GIC Partitioning Read this for a description of the major interfaces and components of the GIC. The chapter also introduces how they operate, in a simple implementation. Chapter 3 Interrupt Handling and Prioritization Read this for a description of the requirements for interrupt handling, and the interrupt priority scheme for a GIC. Chapter 4 Programmers Model Read this for a description of the Distribut

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