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Trade-offs in the Design of E-band Transceiver MMICs for

Gigabit Wireless Link Application

Sushil Kumar130 Baytech Dr, San Jose, CA, USA

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GigOptix Solutions

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Introduction

GigOptix E-Band Solution

• SiGe Based Tx

• GaAs Based Tx

• GaAs+SiGe Based Rx

• Measured Results

• E-Band Package Options

Available Semiconductor Technologies for E-Band & Technology

Advantage for a Circuit Design

Summary

Outline

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Point-to-Point Radio Frequencies and Advantage of E-Band

(1/2)

Ref.: Mario CordaniHuawei Technology

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Ref.: Jonathan Wells

Point-to-Point Radio Frequencies and Advantage of E-Band

(2/2)

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E-Band (Country by Country Overview)

79 Cased mapped on survey

Green : Open (66)

Blue : Under Review (6)

Red : Closed (7)

Grey : No info

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GigOptix E-Band Solutions

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GigOptix mmWavePoint-to-Point Radio Product Portfolio

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SiGe Based Tx Architecture

Sliding IF Architecture

Note : Not to the scale

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• Pin Total=-23dBm• Pout_Tot=13dBm (Pout/tone=10dBm)

• L i n e u p G a i n = 3 6 d B• TX Noise=-112dBm/Hz• OIP3 total= 24.0dBm

SiGe Based Tx Architecture Lineup (RF Chain) Analysis

Max. Gain (SiGe) = 36dB GaAs PA Gain = 16dB

Lineup Max. Gain ~ 50dB

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Spectral Mask vs Tx Noise & IM3 of a SiGe Based Architecture

64QAM 500 MHz plot image (86 GHz)64QAM 500 MHz plot image (83.5 GHz)

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GaAs Based Tx Architecture

Note : Not to the scale

Diffe

ren

tia

l

Dip

lexe

r

Diffe

ren

tia

l

Dip

lexe

r

Direct Conversion

Architecture

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GaAs Based Transmitter Lineup (RF Chain) Analysis

INPUT PARAMETERS LINEUP OUTPUT

Pin=-5dBm Pout=+16dBmPout=+13dBm

-5

13

18

24

24

24

24

(Output)

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Key RF Components of Tx

RF Chain : Differential IQ Modulator + Env. Detector + VVA + VGA

LO Chain : Frequency Tripler + Buffer Amp + Filter + Frequency Doubler +Saturated Amplifier + BPF

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Integrated Power Detector Single Ended LO port Designed to meet technical specifications of ETSI document ETSI EN 302 217‐2‐2.

SIP Key Parameters Unit Low Band High Band

Frequency Range GHz 71.0 – 76.0 81.0 – 86.0

LO Frequency GHz 11.8 – 12.7 13.5 – 14.4

Baseband Bandwidth GHz > 2 GHz > 2 GHz

Max Conversion Gain dB 25.0 25.0

OIP3 dBm 27.0 27.0

Psat dBm 22.0 22.0

Carrier Rejection dBc >30 >30

Image Rejection dB >35 >35

Gain Control Dynamic Range dB >35 >35

Key Performance of RF

Chain of GaAs Tx (1/4)

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22

20

18

16

24

26

22

20

18

16

24

26

27

25

23

21

29

31

28

26

24

22

30

OIP3 (LB)

Psat (HB)Psat (LB)

OIP3 (HB)

Key Performance of RF

Chain of GaAs Tx (2/4)

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74GHz TX Noise Test on demo Board

Noise=121.8dBm/Hz

@ Pout=13dBm

74GHz TX Noise Test on demo Board

Noise=137.3dBm/Hz

@ Pout=0dBm

Key Performance of RF

Chain of GaAs Tx (3/4)

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RF signal = 83.1GHz LO Input = 83GHz Image =82.9 GHz

Fundamental (83.1GHz)Carrier (83GHz)

42dBc

Image (82.9 GHz)

Key Performance of RF

Chain of GaAs Tx (4/4)

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LO Chain Lineup

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fin

fOut= 6* fin

LO Chain Lineup Performance

LO Chain (Output)

fin=12.67GHz, Pin=+2dBmLO Chain (Input)

fout=76.0GHz (6H), Fundamental + other

harmonics & Spurs well suppressed.

Above two screen shots covers 10MHz-80GHz signal from LO Chain

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Key RF Components of Rx

RF Chain : LNA (GaAs) + VGA + RF Mixer + BB Mixer + BB Circuit

LO Chain : Multiplexer + Frequency Doubler + Buffer Amp + Quadrupler+ Frequency Divider

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Single Ended LO port Integrated SPI Designed to meet technical specifications of ETSI document ETSI EN 302 217‐2‐2.

SIP Key Parameters Unit Low Band High Band

Frequency Range GHz 71.0-76.0 81.0 – 86.0

LO Frequency GHz 7.88-8.44 9.0 – 9.6

IF Frequency GHz 7.88-8.44 9.0 – 9.6

Input Dynamic Range dBm -85 to -23 -85 to -23

Max Conversion Gain dB 60.0 60.0

IIP3 @ Min Gain dBm -7.0 -7.0

Noise Figure @max gain dB 7.0 7.0

Analog Gain Control dB >80 >80

Key Performance of

Receiver (1/2)

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Key Performance of

Receiver (2/2)

2.0

4.0

6.0

8.0

10.0

2.0

4.0

6.0

8.0

10.0

Minimum Gain Setting Minimum Gain Setting

-2.0

0.0

-4.0

-6.0

-8.0

-10.0

-12.0

-2.0

0.0

-4.0

-6.0

-8.0

-10.0

-12.0

-14.0

NF (LB) NF (HB)

IIP3 (LB) IIP3 (LB)

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E-Band Package Options

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Available Technology for E-Band

III-V Based• GaAs (pHEMT/mHEMT)

• GaN (SiC)• InGaP HBT (for VCO)

Si Based• SiGe BiCMOS• CMOS

Future Technology• GaN on Si

Properties Si SiGe GaAs GaN

Saturation Velocity(x107 cm/s)

1 0.7 1.2 2.5

Electron Mobility(cm2.V1.s1)

900-1100

2000-3000

5500-7000

400-1600

Bandgap (eV) 1.11 0.85 1.43 3.4

Breakdown Field(x10

5V.cm

-1)

3 2 6 10

ThermalConductivity (W/cmK)

1.5 >Si & Ge *(varies)

0.43 1.4(SiC : 3.3-4.5)

Resistivity (. cm-1) 1000 105 108 >1010

Dielectric Constant 11.8 14.0 12.9 9.5

Note : Material properties are not same all across

publication. It varies somewhat

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Process GaAs (pHEMT) GaN (SiC)* GaN (Si)

Gate Length 0.1um 0.1

Ft (GHz) 130 110

Fmax (GHz) 180 160

Vbdg (V) 9 30

Vd max. (V) 4 25

Idss (mA/mm) 450 700

Idss max (mA/mm) 760 1100

MIM Capacitor (pF/mm2) 350 400

Resistor (TaN and Epi) 50Ω/ & 157Ω/

NFmin (dB) 1.7 @40GHz) 1.5 @40GHz)

Power density (mW/mm) 860 @4V, 29GHz 3300

Gm (mS/mm) 725 (peak) 650

Wafer Thickness (um) 50 & 100 100

Wafer Size (inches) 6 3

Various Technology in nutshell (III-V Based)

No m

mW

GaN

foundry

access

at th

is t

ime

• mmW GaN on Si Foundries : Qorvo, HRL, a few defense and European labs

• OHMMIC : GaN on SiC (Under Development)

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Various Technology in nutshell (Si Based)

Source : Global Foundries

28

• Success at E-band and above will rely on

technologies that provide increased

performance and higher levels of integration

• WIN’s next generation technologies will

address both market needs

Performance

– Ft above 180 GHz

– Hot Via eliminates bond wires and enables

wafer scale packaging

Integration

– 4-metal back end, front side ground plane

– Monolithic schottky or PIN diodes

– Standard E/D logic gates

– Now with monolithic PN diodes for compact ESD

protection

Beyond PP10: Enabling New Functions

And Higher Integration

BS via

4mil GaAs substrate

Au/Sn EutecticIsolated BS metal

Hot Via

RF Isolated Through Wafer Via

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Why GaN High Breakdown Field

10x of Si or GaAs

High Power Density 2-10x of Si or GaAs Good Thermal Conductivity Higher Impedances

Best Power Device Figure of Merit

Low Dielectric Constant Lower Intrinsic Capacitances

JFM = Johnson's figure of merit is a measure of suitability of a semiconductor material

for high frequency power transistor applications and requirements

JFM=(Breakdown, electron velocity product) [Eb*Vbr/2π]

Highest Johnson Figure of Merit Si=1.0, GaAs=2.7, SiC=20,

GaN=27.5

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GaN (SiC vs Si)

GaN Operating range ~200 to 200oC

SiC has higher thermal conductivity, so

better heat management therefore

higher efficiency

Key Parameters GaN on SiC GaN on Si

Thermal Conductivity 3.7 W/Cm C 1.5 W/Cm C

Die Size (for similar design) small15-20% bigger compared to SiC for thermal management

Cost High Low (very low on 8” or 12” Si in future).

Volume Low High

Wafer Size 3” to 6” 3” (up to 8 or 12”, possible in future)

T(°C) = T(K) - 273.15

Thermal conductivity of GaAs is much lower (0.43 W/cmK) compared to Si and SiC, so the GaAs based device channel temperature is high. If operated at high channel temperature MTTF of GaAs based power circuit would be poor)

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Technology Advantages for a given Circuit for E-band Transceiver

Process GaAs (pHEMT) SiGe BiCMOS

Mixer

ActiveOK gain, Poor 1/f noise, Complex design

Best suited, 1/f noise good for HBTPoor 1/f Noise for MOSFET based design

PassiveBest IP3, High CL and LO Drive Level

Moderate IP3, CL and much higher LO drive compared to Gilbert cell based topology

Low Noise Amplifier Lower NF and High IP3 compared to SiGe

Moderate NF, IP3, similar gain compared to GaAs

Gain Blocks Both are good. SiGe would be smaller in dimension

Power Amplifier Much higher P1dB & IP3 Moderate Power & IP3, similar gain compared to GaAs

VVA/Switch GaAs has slight advantage Si CMOS is very comparable to GaAs

Freq. Multipliers Either can be used unless Pout requirement is very high

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Technology Advantages for a given Circuit for E-band Transceiver

Process GaAs (pHEMT) SiGe BiCMOS

VCO

InGaP (not GaAs) based VCO has best in class close in Phase Noise. A VCO in combination with GaAs multiplier provides best E-band close in phase Noise

Close in Phase Noise not comparable to InGaPbased VCO

Passives (Baluns, 90o Hybrids)

GaAs has some performance advantage, slightly lower loss, a little better balance for hybrid

A little lossy but Very comparable

Passive (µstrip/CPW Lines/Spiral)

GaAs offer wide range impedance but has size disadvantage. It has larger dimension for same aspect ratio (W/H, H=50um)

TxL Geometries are much smaller due to TFMS.Limited Impedance range & low Q

Level of Integration Limited Best

Logic Circuits Limited (GaAs Foundries are integrating E/D logic FETs now) BestOther consideration : Bias Supply, Ground Via, ESD etc.

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Summary GaAs and SiGe based Tx/Rx architecture were discussed

and results were shown

GaAs based Direct Conversion Architecture suits best to

meet tough spec of IM3 and Tx Noise with higher

modulation with BW≥500MHz.

GaAs LNA and SiGe Rx combination results best for SNR

and IM3

It is best to combine GaAs and SiGe as and where spec

demands to keep the performance high and cost low.

Various E-Band Package options were also discussed

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AcknowledgementsAuthor is thankful to all Team members, especially to Andrea Betti-Berutto

(CTO) for his guidance and design support. Shawn Parker for his outstanding

designs. Neir Chen, Yunzhou, Linda for their tireless effort to provide best

possible test, software development and board designs. James Little, Jeff

Illinger, Jack Kennedy, Chris Saints for IC design and layout support. Steve

Chaote, Matin Vagues, Ratan Chaudhary for their Op & Qual support. Phuong

Vo and Hoa Ho for all their assembly work.

Special thanks to Avi Katz (CEO), Raluca Dinu (EVP), for their constant

encouragement.