instruction 8085
DESCRIPTION
Instruction 8085TRANSCRIPT
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Detailed Review of the 8085 Instruction Set
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8085 Instruction Set
The 8085 instructions can be classified as follows:
Data transfer operations
Arithmetic operations (ADD, SUB, INR, DCR)
Logic operations
Branching operations (JMP, CALL, RET)
• Between registers• Between memory location and a register• Direct write to a register / memory• Between I/O device and accumulator
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8085 Instruction Types
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8085 Instruction Types
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8085 Instruction Types
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Simple Data Transfer Operations
Examples:
MOV B,A 47 From ACC to REG MOV C,D 4A Between two REGs MVI D,47 16 Direct-write into REG D
47
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Simple Data Transfer Operations
Example:
OUT 05 D305
Contents of ACC sent to output port number 05.
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Simple Memory Access Operations
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Simple Memory Access Operations
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Arithmetic Operations
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Arithmetic Operations
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Arithmetic Operations
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Arithmetic Operations
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Overview of Logic Operations
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Logic Operations
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Logic Operations
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Logic Operations
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Branching Operations
Note: This is an unconditional jump operation. It will always force the program counter to a fixed memory address continuous loop !
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Branching Operations
Conditional jump operations are very useful for decision making during the execution of the program.
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Example
Write a 8085 machine code program:
Read two different memory locations
Add the contents
Send the result to output port 02 (display) if there is no overflow
Display “FF” if there is an overflow
Stop
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Example
2000 LDA 2050 3A2001 502002 202003 MOV B,A 472004 LDA 2051 3A2005 512006 202007 ADD B 802008 JNC 2013 D22009 132010 202011 MVI A,FF 3E2012 FF2013 STA 2053 322014 532015 HLT 20
Load contents of memory location 2050 into accumulator
Load contents of memory location 2051 into accumulator
Save the first number in B
Add accumulator with B
Jump to 2013 if no carry !
Direct write FF into accumulator
Store accumulator contents at 2053
Stop
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8255Features:• 3 8-bit IO ports PA, PB, PC • PA can be set for Modes 0, 1, 2. PB for 0,1 and
PC for mode 0 and for BSR. • PC has 2 4-bit parts: PC upper (PCU) and PC
lower (PCL), each can be set independently for 1 or O. Each PC bit can be set/reset individually in BSR mode.
• PA and PCU are Group A (GA) and PB and PCL are Group B (GB)
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Pin configuration
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A1 A0 Select
0 0 PA
0 1 PB
1 0 PC
1 1 Control reg.
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