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Microprocessor-based Systems INSTRUCTION SET

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Page 1: Instruction Set

Microprocessor-based

Systems

INSTRUCTION SET

Page 2: Instruction Set

INSTRUCTION SET

INSTRUCTION SET

The instruction set of a microcontrollerdefines the basic operations that aprogrammer can make the device perform.

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INSTRUCTION SET

There are 35 instructions for the PIC16F84A chip. Classification of Instructions:

1. Data Transfer Instructions 2. Arithmetic Instructions 3. Logic Instructions

4. Rotate Instructions 5. Bit Operation Instructions 6. Control Transfer Instructions 7. Processor-Control Instructions

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INSTRUCTION SET

DATA TRANSFER INSTRUCTIONS

Transfer of data in a microcontroller is donebetween work (W) register and an 'f' registerthat represents any location in internal RAM(regardless whether those are special orgeneral-purpose registers).

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INSTRUCTION SET

The MOVLW Instruction

The MOVLW instruction loads the W registerwith an eight-bit constant value. Syntax:MOVLW k Operation: [W] ← k StatusAffected: None

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INSTRUCTION SET

The MOVWF Instruction

The MOVWF instruction loads the specifiedregister with the contents of the W register.Syntax: MOVWF f Operation: [ f ] ← W StatusAffected: None

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INSTRUCTION SET

The MOVF Instruction

The MOVF instruction loads the destinationregister with the contents of the specified register.Syntax: MOVF f, d Operation: [ d ] ← f If d = 0,destination is the W register. If d=1, destination isthe specified register itself. This is useful to test afile register, since status flag Z is affected. StatusAffected: Zero Flag

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INSTRUCTION SET

The CLRW Instruction

The CLRW Instruction clears the W registerand sets the zero flag. Syntax: CLRWOperation: [ W ] ← 00h Status Affected: ZeroFlag

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INSTRUCTION SET

The CLRF Instruction

The CLRF Instruction clears the specifiedregister and sets the zero flag. Syntax: CLRF fOperation: [ f ] ← 00h Status Affected: ZeroFlag

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INSTRUCTION SET

The SWAPF Instruction

The SWAPF Instruction exchanges the contents of the high and low nibbles of the specified register stores the result into the destination register. Syntax: SWAPF f, d Operation: [ f (3:0) ] ↔ [ f (7:4) ] Status Affected: None If d = 0, destination is the W register. If d=1, destination is the specified register itself.

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INSTRUCTION SET

ARITHMETIC INSTRUCTIONS

Arithmetic instructions cover the two basicoperations: addition and subtraction.Arithmetic instructions affect the status flags.

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INSTRUCTION SET

The ADDLW Instruction

The ADDLW instruction adds an eight-bitconstant value to the contents of the Wregister then places the result back into the Wregister. Syntax: ADDLW k Operation: [ W ] ← [W ] + k Status Affected: Carry Flag Digit CarryFlag Zero Flag

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INSTRUCTION SET

The ADDWF Instruction

The ADDWF instruction adds the contents of thespecified register to contents of the W register thenplaces the result in the destination register. Syntax:ADDWF f, d Operation: [ d ] ← [ W ] + [ f ] If d = 0,destination is the W register. If d = 1, destination isthe specified register itself. Status Affected: CarryFlag Digit Carry Flag Zero Flag

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INSTRUCTION SET

The INCF Instruction

The INCF instruction adds 1 to the contents of thespecified register then places the result in thedestination register. Syntax: INCF f, d Operation: [ d ]← [ f ] + 1 If d = 0, destination is the W register. If d =1, destination is the specified register itself. StatusAffected: Zero Flag

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INSTRUCTION SET

The SUBLW Instruction

The SUBLW instruction subtracts the contents the Wregister from an eight-bit constant then places theresult back into the W register. Syntax: SUBLW kOperation: [ W ] ← k – [ W ] Status Affected: CarryFlag Digit Carry Flag Zero Flag

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INSTRUCTION SET

The SUBWF Instruction

The SUBWF instruction subtracts the contents ofthe W register from the contents of the specifiedregister then places the result in the destinationregister. Syntax: SUBWF f, d Operation: [ d ] ← [ f ] --– [ W ] If d = 0, destination is the W register. If d = 1,destination is the specified register itself. StatusAffected: Carry Flag Digit Carry Flag Zero Flag

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INSTRUCTION SET

The DECF Instruction

The DECF instruction subtracts 1 from the contentsof the specified register then places the result in thedestination register. Syntax: DECF f, d Operation: [ d] ← [ f ] – 1 If d = 0, destination is the W register. If d= 1, destination is the specified register itself. StatusAffected: Zero Flag

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INSTRUCTION SET

LOGIC INSTRUCTIONSLogic instructions include the logic operations AND, OR, XOR,

and NOT(Complement).

The ANDLW Instruction

The ANDLW instruction logically ANDs the contents of the Wregister and an eight-bit constant value then places the resultin the W register. Syntax: ANDLW k Operation: [ W ] ← [ W ] •k Status Affected: Zero Flag

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INSTRUCTION SET

The ANDWF Instruction

The ANDWF instruction logically ANDs the contentsof a specified register and the contents of the Wregister then places the result in the destinationregister. Syntax: ANDWF f, d Operation: [ d ] ← [ f ] • [W ] If d = 0, destination is the W register. If d = 1,destination is the specified register itself. StatusAffected: Zero Flag

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INSTRUCTION SET

The IORWF Instruction

The IORWF instruction logically ORs the contents of aspecified register and the contents of the W registerthen places the result in the destination register.Syntax: IORWF f, d Operation: [ d ] ← [ f ] + [ W ] If d= 0, destination is the W register. If d = 1, destinationis the specified register itself. Status Affected: ZeroFlag

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INSTRUCTION SET

The IORLW Instruction

The IORLW instruction logically ORs the contents ofthe W register and an eight-bit constant value thenplaces the result in the W register. Syntax: IORLW kOperation: [ W ] ← [ W ] + k Status Affected: ZeroFlag

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INSTRUCTION SET

The XORLW Instruction

The XORLW instruction logically XORs the contents ofthe W register and an eight-bit constant value thenplaces the result in the W register. Syntax: XORLW kOperation: [ W ] ← [ W ] k Status Affected: ZeroFlag

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INSTRUCTION SET

The XORWF Instruction

The XORWF instruction logically XORs the contentsof a specified register and the contents of the Wregister then places the result in the destinationregister. Syntax: XORWF f, d Operation: [ d ] ← [ f ] [W ] If d = 0, destination is the W register. If d = 1,destination is the specified register itself. StatusAffected: Zero Flag

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INSTRUCTION SET

The COMF Instruction

The COMF instruction performs a 1’s complement onthe operand. Syntax: COMF f, d Operation: [ d ] ← [ f ]If d = 0, destination is the W register. If d = 1,destination is the specified register itself. StatusAffected: Zero Flag

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INSTRUCTION SET

ROTATE INSTRUCTIONS

Rotate instructions rotate bits out intothe other end of the operand.

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INSTRUCTION SET

The RLF InstructionThe RLF instruction rotates to the left the contents of thespecified register by one bit through the carry flag. The carryflag is treated as part of the rotate. Syntax: RLF f, dOperation:

If d = 0, destination is the W register. If d=1, destination is thespecified register itself. Status Affected: Carry Flag

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INSTRUCTION SET

BIT OPERATION INSTRUCTIONS

Bit operation instructions sets or clears a bitanywhere in the memory.

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INSTRUCTION SET

The BCF Instruction

The BCF Instructions clears a specified bit in the specified register. Syntax: BCF f, b Operation: [ f(b) ] ← 0 Status Affected: None

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INSTRUCTION SET

The BSF Instruction

The BSF Instructions sets a specified bit in thespecified register. Syntax: BSF f, b Operation: [f(b) ] ← 1 Status Affected: None

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INSTRUCTION SET

CONTROL TRANSFER INSTRUCTIONSNormally, programs are executed sequentially.

However, there are times when there is a need toalter the flow of program execution such as programloops or function calls.

The instructions that can alter the flow of a programare conditional transfers, uncondi-tional transfers,and subroutines.

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The BTFSC Instruction

The BTFSC instruction skips over the nextinstruction if the bit condition is zero. Syntax:BTFSC f, b Operation: skip if [ f(b) ] = 0 StatusAffected: None

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INSTRUCTION SET

The BTFSS Instruction

The BTFSS instruction skips over the nextinstruction if the bit condition is one. Syntax:BTFSS f, b Operation: skip if [ f(b) ] = 1 StatusAffected: None

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INSTRUCTION SET

The INCFSZ Instruction

The INCFSZ instruction adds 1 to the contents of thespecified register then places the result in thedestination register and skips the next instruction ifthe result is equal to zero. Syntax: INCFSZ f, dOperation: [ d ] ← [ f ] + 1 If d = 0, destination is theW register. If d = 1, destination is the specifiedregister itself. Skip if result is zero Status Affected:None

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INSTRUCTION SET

The DECFSZ Instruction

The DECFSZ instruction subtracts 1 from the contentsof the specified register then places the result in thedestination register and skips the next instruction ifthe result is equal to zero. Syntax: DECFSZ f, dOperation: [ d ] ← [ f ] – 1, If d = 0, destination is theW register. If d = 1, destination is the specifiedregister itself. Skip if result is zero Status Affected:None

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INSTRUCTION SET

The GOTO Instruction

The GOTO instruction unconditionallytransfers control to the target location. Syntax:GOTO k or label Operation: [ PC ]← k or labelStatus Affected: None

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INSTRUCTION SET

The CALL Instruction

The Call instruction is used for calling a subroutine.Syntax: CALL k or label Operation: TOS ← PC + 1 [ PC ]← k or label Status Affected: None

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INSTRUCTION SET

The RETURN Instruction

The RETURN instruction copies the contents of thetop of the stack to the program counter. Syntax:RETURN k or label Operation: [ PC ] ← [ TOS ] StatusAffected: None

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The RETLW Instruction

The RETLW instruction loads the W register with aneight-bit constant value and copies the contents ofthe top of the stack to the program counter. Syntax:RETLW k Operation: [ W ] ← k [ PC ] ← [ TOS ] StatusAffected: None

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The RETFIE Instruction

The RETFIE instruction copies the contents of the top of the stack to the program counter and enables the GIE bit in the INTCON register. Syntax: RETFIE Operation: [ PC ] ← [ TOS ] GIE ← 1 Status Affected: None

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PROCESSOR-CONTROL INSTRUCTIONSThe NOP Instruction

The NOP instruction does not execute anyinstruction or affect any flags. Syntax: NOPOperation: None Status Affected: None

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INSTRUCTION SET

The CLRWDT Instruction

The CLRWDT instruction clears the Watchdog timerand Watchdog timer prescaler. It also sets the TOand PD bit of the STATUS register. Syntax: CLRWDTOperation: WDT ← 0 WDT prescaler ← 0 TO ← 1PD ← 1 Status Affected: Time-Out bit Power-Downbit

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The SLEEP Instruction

The SLEEP instruction put the processor in low-consumption mode. It also sets the TO bit and clears the PD bit of the STATUS register. Syntax: SLEEP Operation: TO ← 1 PD ← 0 Status Affected: Time-Out bit Power-Down bit