instructions and addressing
DESCRIPTION
Instructions and Addressing. http://www.pds.ewi.tudelft.nl/~iosup/Courses/2011_ti1400_4.ppt. Lecture 1 Making functions. nand gates. A. Y. ADD. B. Y. A,B. . time. 2. Lecture 1 Making functions. Circuit Diagram http://xkcd.com/730/. Lecture 2 Programmable device. Programmable - PowerPoint PPT PresentationTRANSCRIPT
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Instructions and Addressinghttp://www.pds.ewi.tudelft.nl/~iosup/Courses/2011_ti1400_4.ppt
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Lecture 1Making functions
time
A,B Y
A
BYADD
nand gates
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Lecture 1Making functions
Circuit Diagramhttp://xkcd.com/730/
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Lecture 2Programmable device
2,1 3ProgrammableDevice
input stream output stream
programREAD(X)READ(Y)ADD(X,Y,Z)WRITE(Z)
• READ(X) means read next input value from input stream and store it internally as variable X
• WRITE(X) means put value in variable X on output stream• ADD(X,Y,Z) means assign value of X+Y to Z
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Lecture 3Von Neumann Architecture
READ(X)READ(Y)ADD(X,Y,Z)WRITE(Z)
X: 1Y: 2Z: 3 • •
TEMP_A: TEMP_B: RESULT:
IR:
PC:
arithmeticunit
Central Processing Unit
CONTROL
Memory
Input
Output
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Problem: How to Represent and Use Data?
1. Representation2. Arithmetic3. Conversion
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Lecture 2Von Neumann Architecture
READ(X)READ(Y)ADD(X,Y,Z)WRITE(Z)
X: 1Y: 2Z: 3 • •
TEMP_A: TEMP_B: RESULT:
IR:
PC:
arithmeticunit
Central Processing Unit
CONTROL
Memory
Input
Output
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Problem: How to Represent and Use Data Instructions?
1. Representation2. Use (Addressing Data)
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Instructions and Addressing
1. Memory Layout2. Types of Instructions3. Use of Accumulator/Registers4. Execution of Instructions5. Addressing
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Computer System
READ(X)READ(Y)ADD(X,Y,Z)WRITE(Z)
X: 1Y: 2Z: 3 • •
IR:
PC:
arithmeticunit
Central Processing Unit
controlunit
Main Memory
Input
Output
registers
Data and Instructions Instruction RegisterProgram Counter
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Main Memory Addressing
000000000 00000000 000000000000000
000000000 00000000 000000000000000
000000000 00000000 000000000000000
Bit
Byte(8 bits)
Word(16-64
bits)
Address0
Address31
0
8 16 24
1 2 3
0
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Q1: How many bits required to address?1. 1KB of memory
A. By Bit (13)B. By Byte (10)C. By Word of 32 bits
(8)
2. 1MB of memoryA. By Bit (23)B. By Byte (20)C. By Word of 32 bits
(18)
3. 1GB of memoryA. By BitB. By ByteC. By Word of 32 bits
4. 1TB of memoryA. By BitB. By ByteC. By Word of 32 bits
Q2: How much memory can be addressed by byte for a 32-bit architecture?Q3: Why use byte memory addressing?
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Instruction and wordlength (1/3)
instruction
instruction
instructioninstruction
012345678910
word
instructioninstructioninstruction instructioninstruction instruction
012345678910
wordaddress address
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Instruction and wordlength (2)
instructioninstructioninstruction instructioninstruction instruction
012345678910
wordaddress
instructioninstructioninstruction instructioninstruction instruction
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Instruction and wordlength (3)
012345678910
wordaddress
instructioninstr. instrinstruction instr. instrinstruction instr. instr
instructioninstr. instrinstruction instr. instrinstruction instr. instr
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32 bit word formats
opcode specifier operand specifiers
31 30 1 0
byte byte byte byte
a two’s complement number
4 ASCII characters
32 bit
a machine instruction
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Byte ordering (endianness)
0 1 2 34 5 6 78 9 - -- - - -- - - -
0
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Word Index
Big endiane.g., Motorola PowerPC 68k
3 2 1 07 6 5 4- - 9 8- - - -- - - -
0
21
Little endiane.g., Intel
Jonathan Swift’s Gulliver’s Travells
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Q1 (the NUXI problem)
• What problems can occur in porting data between machines with big-endian and little-endian storage? (Hint: networked machines)
Q2 Why use the little endian byte ordering?
Q3 Why use the big endian byte ordering?
• (Hint: value 4 as single- and multi-byte)
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Instructions and Addressing
1. Memory Layout2. Types of Instructions3. Use of Accumulator/Registers4. Execution of Instructions5. Addressing 2.1. Data Copy Operations
2.2. Arithmetic And Logic Ops.2.3. Program flow control Ops.2.4. I/O operations
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Types of Instructions
• There are 4 types of instructions- Data Copy operations
• between memory and registers• between memory locations • between registers
- Arithmetic and Logic operations- Program flow control operations- I/O operations
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Symbolic notation
• Copy instructions [R1 ] M(LOC)
• Arithmetic operations M(C) M(A) + M(B)
• LOC, A, and B are memory addresses• M(address) means contents of memory
location at address.• [R] means contents of register R.
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Operand specification formats
• Three-address instructionsformat: INSTR source#1,source#2,destinationexample: Add A,B,Cmeans: M(C) M(B) + M(A)
• Problem: 3-address instructions means long instruction words.- If k bits are needed for memory addressing,
then 3k bits are needed for addressing operands. (k=32 for 32-bit platforms.)
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Operand specification formats
• Two address instructionsformat: INSTR source, destinationexample: Add A,Bmeans: M(B) M(B) + M(A)
• Problem: 2-address instructions mean somewhat long word or multiple FETCHes per instruction. - If k bits are needed for memory addressing,
then 2k bits for addressing operands. (k=32 for 32-bit platforms.)
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Two address instruction Additional Problem: Operand OverrideAdd A,B
• Two operand instructions destroy contents of the B location
• Need other instruction to avoid that:Move B,C
• We then have Move B,C
Add A,C
meaning: M(C) M(B); M(C) M(C) + M(A);
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One address instructions
• One address - have implicit source (often called Accumulator)Load AAdd BStore Cmeaning[Accu ] M(A);[Accu ] [Accu ] + M(B);M(C) [Accu ]
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Instructions and Addressing
1. Memory Layout2. Types of Instructions3. Use of Accumulator/Registers4. Execution of Instructions5. Addressing
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Registers
• Many computers have a number of General-Purpose registers inside the CPU
• Access to registers is faster than to memory locations
• Used to store temporary data during processing
• Registers require less bits of address than main memory
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Register addressing
• Let Ri denote register• General operation ADD A,B,C can be
broken down toMove A,R0Add B,R0Store R0,Cmeaning [R0] M(A); [R0] [R0] + M(B); M(C) [R0]
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Instruction Formats (Summary)
opcode specifier operand specifiers
general format
one operand addressing
opcode operand operand
two operand addressing
opcode operand
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Accumulator architecture
AccumulatorPC
CPU
MainMemory
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Question
How many instructions can be defined when the opcode field is 5 bit ?
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Example
instruction
accu
4 bits 12 bits
opcode operandm
15 0
sign bit
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Instruction setCode Opcode Meaning
01000101011001111000100110101011
LoadStoreAddSubMulDivAndOr
[Accu] M(m)M(m) [Accu][Accu] [Accu] + M(m)[Accu] [Accu] - M(m)[Accu] [Accu] * M(m)[Accu] [Accu] / M(m)[Accu] [Accu] & M(m)[Accu] [Accu] v M(m)
000000010010
JMPJSRRTS
Goto mCall Subroutine at mReturn from Subroutine
1100110111101111
JZJNZJPJN
Goto m if [Accu]= 0Goto m if [Accu] =/ 0Goto m if [Accu] > 0Goto m if [Accu] < 0
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Multiple register architecture
R0CPU
MainMemory
R1
R2
R3
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Instructions and Addressing
1. Memory Layout2. Types of Instructions3. Use of Accumulator/Registers4. Execution of Instructions5. Addressing
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Straight-line sequencing
…...…...
…….
Move A,R0Add B,R0Move R0,C • •
ii+4i+8
AB
C
address
Program for M(C)=M(B)+M(A)
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Straight-line sequencing
Add Nn,R0Move R0,S
Move N1,R0Add N2,R0Add N3,R0 • •
ii+4i+8
i+4n-4i+4n
address
Program for addition of n numbers
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Branching
......
n
Clear R0Move N,R1
Decr R1Branch>0 LMove R0,S
L
SNN1
NnProgram for addition of n numbers
Determine address of“next” number and add itto R0
programloop
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Common branch conditions
• N (negative) set to 1 of result is negative• Z (zero) set to 1 of result is zero• V (overflow) set to 1 of result overflows• C (carry) set to 1 of carry-out results
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Question
Why is the carry condition important?
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Instructions and Addressing
1. Memory Layout2. Types of Instructions3. Use of Accumulator/Registers4. Execution of Instructions5. Addressing 5.1. Addressing Modes
5.2. Immediate Addressing5.3. Direct Addressing5.4. Indirect Addressing5.5. Index Addressing
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Addressing modes
• Addressing modes determine how the address of operands is determined
• Typical 4 addressing modes- immediate addressing- direct addressing- indirect addressing- index addressing
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Immediate addressing (1)
opcode specifier operand
instruction
ADD # -1JNZ 10 • •
10
example: simple counting loop
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Immediate addressing (2)• Advantages:
- no additional calculations needed to obtain operand
- fast
• Disadvantages:- Operand value must be known- Operand value cannot be changed- Limited no of bits available
• Notation: MOVE #200,R0• Meaning: [R0] 200
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Direct addressing(1)
opcode specifier mem or reg address
instruction
memoryor
registers
ADD 13JNZ 10 • # -1
10
13
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Direct addressing(2)• Advantages:
- Operand separate from instruction- Can be changed- Full word length available
• Disadvantages:- More memory accesses- More storage occupation
• Notation: ADD R1,R2• Meaning: [R2] [R2] +[R1]• Also called “Absolute addressing” (Ham.)
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Indirect addressing (1)
ADD (12)JNZ 10 13 # -1
10
13
opcode specifier mem or reg address
instruction
op. address
operand
memoryor
registers
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Indirect addressing (2)
• Advantages:- Actual address of operand is not in instruction- Can be changed
• Disadvantages:- Even more memory or register references- More memory occupation
• Notation: ADD (R1),R2• Meaning: [R2] [R2] + M([R1])
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Example indirect addressing
programloop L
N
N1
Clear R0
Move N,R1
Move #N1,R2
Add (R2),R0
Add #4,R2
Decr R1
Branch>0 L
Move R0,S
n
S
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Index addressing (1)
opcode Reg index
instruction
operand
memoryor
registers
operand
+
registers
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Index addressing (2)
• Advantages:- Allows specification of fixed offset to operand
address
• Disadvantages:- Extra addition to operand address
• Notation: ADD X(R1),R3 (X=number)• Meaning: [R3] [R3] + M([R1] + X)
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Example index addressing
NE
Program with index addressing
programloop
sexagesalary
nEmpoyee IDsexagesalaryEmpoyee ID
L
Move #E,R0
Move N,R1
Clear R2
Add 8(R0),R2
Add #16,R0
Decrement R1
Branch>0 L
Div R1,R2
Move R2,Sum
Move N,R1
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Additional modes
• Some computers have auto-increment (decrement instructions)
• Example: (R0)+• Meaning .. M(R0)..; [R0] [R0]+1• Example: -(R0)• Meaning [R0] [R0]-1; .. M(R0)..