Instructions set of 8085 µP

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8085 Instruction setInstructions are generally divided into functional categories as follow:-1.Data transfer group2.Arithmetic group3.Logical group4.Branching group5.Stack and machine control group

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Data transfer group

• This group of instructions copies data from source to destination without modifying the contents of the source

• The data transfer are possible between direct data, registers and memory location.

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1. MVI R , Data:- Moves the immediate 8 bit data to register specified in the instructionNo. of bytes: 2 bytesAddressing modes: Immediate addressing modeExample: MVI C, 45H

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2. MVI M , Data:- Moves the immediate 8 bit data to

memory . The H-L register pair is used as memory pointer.

No. of bytes: 2 bytesAddressing modes: Immediate addressing

modeExample: MVI M, 45H

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3. MOV Rd , Rs:- Copies data from source register

to destination register.No. of bytes: 1 byteAddressing modes: Register addressing modeExample: MOV A, B

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4. MOV M , R:- Copies data from register R to

memory M . The H-L register pair is used as memory pointer.

No. of bytes: 1 byteAddressing modes: Indirect addressing modeExample: MOV M, C

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5. MOV R , M:- Copies data from memory M to

register R . The contents of H-L register pair are used as address of memory location.

No. of bytes: 1 byteAddressing modes: Indirect addressing modeExample: MOV C,M

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6.LXI Rp , data(16 bit):- Loads 16 bit data specified with

instruction to specified register pair . The register pair can be any of B-C , D-E , H-L or stack pointer.

No. of bytes: 3 bytesAddressing modes: Immediate addressing

modeExample: LXI B,1050 H

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7. LDA Address:- Copies the contents of the

memory location whose address is specified in the instruction to the accumulator.

No. of bytes: 3 bytesAddressing mode: Direct addressing modeExample: LDA 5012H

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8. STA address:- Copies the contents of the

accumulator to the memory location whose address is specified in this instruction.

No. of bytes: 3 bytesAddressing mode: Direct addressing modeExample: STA 5012H

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9. LHLD address:- Copies the contents of the

memory location whose address is specified in this instruction to the registers H and L.

No. of bytes: 3 bytesAddressing mode: Direct addressing modeExample: LHLD 1234H

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10. SHLD address:- Copies the contents of the

registers H and L to the memory location whose address is specified in this instruction.

No. of bytes: 3 bytesAddressing mode: Direct addressing modeExample: SHLD 1234H

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11. LDAX Rp:- Copies the contents of memory

location whose address is pointed by the specified register pair to the accumulator.

No. of bytes: 1 byteAddressing mode: Register indirect addressing

modeExample: LDAX D

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12. STAX Rp:- Copies the contents of

accumulator to the memory location whose address is pointed by the specified register pair .

No. of bytes: 1 byteAddressing mode: Register indirect addressing

modeExample: STAX D

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13. XCHG:- Exchanges the contents of registers H

with register D and register L with register E.No. of bytes: 1 byteAddressing mode: Register addressing modeExample: XCHG

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Arithmetic group instructions

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Arithmetic group

This group of instruction performs arithmetic operations such as addition , subtraction, increment, and decrement.

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1. ADD R:- Adds the contents of register R with

the contents of accumulator and result of addition is stored in the accumulator.

No. of bytes:-1 ByteAddressing mode:- Register addressing modeExample:- ADD C

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2. ADD M:- Adds the contents of memory

location pointed by H-L register pair with the contents of accumulator and result of addition is stored in the accumulator.

No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- ADD M

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3. ADI Data:- Adds the 8 bit data specified along

with the contents of accumulator and result of addition is stored in the accumulator.

No. of bytes:-2 ByteAddressing mode:- Immediate addressing modeExample:- ADI 40H

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3. ADC R:- Adds the contents of register R along

with the carry to the contents of the accumulator and the result is stored in the accumulator.

No. of bytes:-1 ByteAddressing mode:- Register addressing modeExample:- ADC C

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4. ADC M:- Adds the contents of memory

location pointed by H-L register pair and the contents of carry with the contents of the accumulator and the result is stored in the accumulator.

No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- ADC M

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5. ACI data:- adds the 8 bit data specified and

the contents of carry along with the contents of the accumulator and the result is stored in the accumulator.

No. of bytes:- 2 byteAddressing mode:- Immediate addressing modeExample:- ACI 40H

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6. DAD Rp:- Adds the contents of specified

register pair to H-L pair and stores the result in H-L pair.

No. of bytes:- 1byteAddressing mode:- Register addressing modeExample:- DAD B

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7. SUB R8. SUB M9. SUI Data10. SBB R11. SBB M12. SBI Data

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13. DAA:- This instruction is used to make sure

that the result of adding two packed BCD numbers is adjusted to be a legal BCD number.

It operates only on A register.It is used in the program after ADD, ADI, ACI, ADC.No. of bytes:- 1 byteAddressing mode:- Implicit addressing modeExample:-DAA

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14. INR R:- Increments the contents of the

specified register R by 1.The result is stored in the same register.

No. of bytes:- 1 ByteAddressing mode:- Register addressing modeExample:- INR B

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15. INR M:- Increments the contents of the

memory pointer by 1.The result is stored in the same .

No. of bytes:- 1 ByteAddressing mode:- Register indirect addressing

modeExample:- INR M

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16. INX Rp:- Increments the contents of the

specified register pair Rp by 1.The result is stored in the same register.

No. of bytes:- 1 ByteAddressing mode:- Register addressing modeExample:- INX B

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17. DCR R18. DCR M19. DCX Rp

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Logical Group Instructions

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1. ANA R:- Contents of the specified register

are logically ANDED with the contents of accumulator and the result is stored in the accumulator.

No. of bytes:- 1 ByteAddressing mode:-Register addressing modeExample:- ANA B

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2. ANA M:- Contents of the memory location

pointed by H-L register pair are logically ANDED with the contents of accumulator and the result is stored in the accumulator.

No. of bytes:- 1 ByteAddressing mode:-Register indirect

addressing modeExample:- ANA M

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3. ANI Data:- Contents of the 8-bit data specified

in the instruction are logically ANDED with the contents of accumulator and the result is stored in the accumulator.

No. of bytes:- 2 ByteAddressing mode:-Immediate addressing modeExample:- ANI 45H

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4. XRA R5. XRA M6. XRI Data7.ORA R8. ORA M9. ORI Data

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10. CMP R:- Compares the contents of accumulator

with the contents of register specified in the instruction.

The comparison is done by subtracting the contents of the register from the contents of the accumulator and the result of subtraction is discarded. The result is not stored in either of the register or accumulator.

No. of bytes:- 1 Byte.Addressing mode:- Register addressing modeExample:-CMP B

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Compare Carry Flag Zero Flag

A>R 0 0

A<R 1 0

A=R 0 1

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11. CMP M12. CPI Data13. STC:- This instruction sets the carry flag.No. of bytes:- 1 ByteAddressing mode:- Implicit addressing mode14. CMC:- This instruction inverts the value of the

carry flag No. of Bytes: 1 bytes Addressing mode:- Implicit Addressing mode

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15. CMA16. RLC:- This instructions rotates all the bits in the

accumulator to the left by one bit position.No. of bytes:- 1 ByteAddressing mode:- Implicit addressing mode

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17. RRC18. RAL19. RAR

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Branch Group

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Branch group

The microprocessor executes machine codes in sequential manner. It goes on executing from one memory location to the next. Branch group of instructions instructs the microprocessor to go to different memory location. The microprocessor continues executing machine codes from that new location. There are two types of branch instructions:-Conditional and Unconditional

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1. JMP Address:- This instruction loads the PC

with the address given within the instruction and continues the program from this location.

No. of bytes:-3 byteAddressing mode:- Immediate addressing modeExample:-JMP 2000H

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Conditional JUMP InstructionInstruction code Description Condition for JUMP

JZ JUMP if zero ZF=1

JNZ JUMP if not Zero ZF=0

JP JUMP if positive SF=0

JM JUMP on minus SF=1

JPO JUMP if parity odd PF=0

JPE JUMP if parity even PF=1

JC JUMP if CARRY CF=1

JNC JUMP if not carry CF=0

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2. CALL Address:- This instruction is used to

transfer the program control to a sub program or subroutine

No. of bytes:- 3 bytesAddressing mode:- Immediate addressing modeExample:- CALL 4000

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Conditional CALL InstructionInstruction code Description Condition for JUMP

CZ CALL if zero ZF=1

CNZ CALL if not Zero ZF=0

CP CALL if positive SF=0

CM CALL on minus SF=1

CPO CALL if parity odd PF=0

CPE CALL if parity even PF=1

CC CALL if CARRY CF=1

CNC CALL if not carry CF=0

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3. RET:- When this instruction is executed, the

program control is transferred from the sub-rountine to the calling program.

The return address is taken from stack and this address is loaded in PC and the program execution begins at address taken from stack.

No. of bytes:- 1 byteAddressing mode:- Register indirect addressing

modeExample:- RET

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Conditional RET InstructionInstruction code Description Condition for JUMP

RZ RETURN if zero ZF=1

RNZ RETURN if not Zero ZF=0

RP RETURN if positive SF=0

RM RETURN on minus SF=1

RPO RETURN if parity odd PF=0

RPE RETURN if parity even PF=1

RC RETURN if CARRY CF=1

RNC RETURN if not carry CF=0

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4. PCHL:- Contents of H and L registers are

transferred to program counter. The H contents to high order 8 bits and L contents to low order 8 bits of program counter.

No. of bytes:- 1 byteAddressing mode:- Register addressing mode

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5. RST n(Restart):- Restart is a one word CALL instruction. This

instruction transfers the program control to the specific memory address

No. of bytes:-1 byteAddressing mode:- Register indirect modeExample:- RST 2

Instructions Restart LocationsRST O 0×8=0000H

RST 1 1×8=0008H

RST 2 2×8=0010H

RST 3 3×8=0018H

RST 4 4×8=0020H

RST 5 5×8=0028H

RST 6 6×8=0030H

RST 7 7×8=0038H

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Stack Control group

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1. SPHL:- When this instruction is executed, the

contents of H-L pair are transferred to stack pointer register.

No. of bytes:- 1 byteAddressing mode:- register addressing mode.Example:-SPHL

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2.XTHL:- when this instruction is executed , the

contents of L register are exchanged with the stack location pointed by stack pointer and the contents of H register are exchanged with the next stack location.

No. of bytes:- 1 byteAddressing mode:- Register indirect addressing

mode

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3. PUSH Rp:- Push the contents of register pair to stack.No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- Push B

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Decrement SP Copy the contents of register B to the memory location pointed to by SP Decrement SP Copy the contents of register C to the memory location pointed to by SP

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4. POP Rp:- Pop the contents of register pair that

were saved from the stack to register pair.No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- Pop D

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PSW Register Pair• The 8085 recognizes one additional register

pair called the PSW (Program Status Word).• This register pair is made up of the

Accumulator and the Flags registers.• It is possible to push the PSW onto the stack,

do whatever operations are needed, then POP it off of the stack. The result is that the contents of the Accumulator and the status of the Flags are returned to what they were before the operations were executed.

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5. Push PSW:- Push the program status word (Acc.

+ flags) to the stack.No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- Push PSW

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6. POP PSW:- Pop the program status word that

was saved from the stack.No. of bytes:-1 ByteAddressing mode:- Register indirect addressing

modeExample:- POP PSW

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Machine control Group

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1. NOP:- When this instruction is executed, no

operation is performed instead of that instruction.

No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

2. HLT:- This instruction stop the µP.No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

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3. EI:- When this instruction is executed , the interrupts

are enabled.No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

4. DI:- When this instruction is executed , the interrupts

are disabled.No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

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5. SIM(Set interrupt mask):- when this instruction is executed, the

interrupts are masked or kept pending as specified in the accumulator.

It also sends data on SOD pin.No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

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SIM Instruction

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6. RIM( Read interrupt mask):- When this instruction is executed the

status of the interrupts is copied into the accumulator.

It also reads the serial data through the SID pin.No. of Byte:- 1 ByteAddressing mode:- implicit addressing mode

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RIM Instruction

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7. In 8-bit address:- Input the contents of the port whose

address is specified into the accumulator.No. of Byte:- 2 ByteAddressing mode:-Direct addressing mode.Example:- IN 02H

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8. OUT 8-bit address:- Output the contents of the accumulator

to the port whose address is specified .No. of Byte:- 2 ByteAddressing mode:-Direct addressing mode.Example:- OUT 02H

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