integration of distributed generation with power electronics on ......dcn dc-r s t n bat+ bat-a b c...
TRANSCRIPT
Integration of distributed generation with power electronics on rural LV
grids to improve power quality
Ricard [email protected]
June, 2016
EMTP-RV User group Meeting, Aix en Provence
Goals
A new paradigm in electrical energy
www.teknocea.cat 2
Photovoltaic
CoGeneration
Network
WindElectrical Vehicle
Storage
Energy management
• Distributed generation• Energy storage• Electrical vehicle integration• Demand side management• Energy management
TeknoCEA introduction
teknoCEA is a spin-off company from the Technical University of Catalonia (UPC –BarcelonaTech)
More than 20 years of experience in power converters, DSP based digital control, industrial communications, and power system analysis
Founders are professors of the Electrical Engineering Department (UPC) and members of the CITCEA-UPC research centre
www.teknocea.cat 3
What do we do?
teknoCEA power electronics portfolio covers a wide range of applications, such as testing, emulation, education and research.
Components
Ready to use equipment for research, industry and utility sectors.
Power converters, Control boards, SiC drivers and interface
SystemsWe design, develop and build custom solutions by integrating our power converters, control boards and communications systems.
Programmable emulators, DSP Starter Kits, Microgrids, Custom systems
ServicesWe provide renting and leasing services of lab equipment for our customers, and engineering services.
Consulting, Electrical and Energy Engineering Analysis and studies
www.teknocea.cat 4
Modular and flexible converters
Applications and usage• AC-DC active front-end (PV inverter,
active filtering, V2G applications, microgrids …)
• DC-DC converters: half bridge, H-brige, interleaved converter
• AC motor drive
Main Features• Three phase voltage source converter• 20 kVA, 40 kVA, 60 kVA and 100 kVA• 800 VDC maximum voltage• 64 kHz max. switching frequency• Isolated drivers (UVLO, desaturation
protection)• Isolated current and voltage measurement• Isolated digital I/O for external control
functions• Fit teknoCEA control boards
www.teknocea.cat 5
C
O
M
P
O
N
E
N
T
S
Fully customized power electronics systems and cabinets
Applications and usage• Custom research testbed• Renewables grid integration• Microgrids and Smart Grids• Testing set-up• Power electronics applications
Main Features
• 10 kVA, 20 kVA, 40 kVA, 60 kVA and 100 kVA three phase converters available
• 400 VAC, 800 VDC
• Customizable output power inductor and capacitor filter, and transformer
• Protections, and EMI filtering
• Electrical schematics included
• Programing code examples
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S
Y
S
T
E
M
S
Objectives and Motivation
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• The rural distribution networks are more vulnerable than urban distributiongrids but the emergence of distributed generation can contribute to overcomethis weakness.
• Increased efficiency, power quality and network resilience must be assured.• The rural distribution networks require a new type of thinking as new options
and new technologies emerge. This need is now imminent.
• Developing an Intelligent Distribution Power Router (IDPR)• Developing a data and energy control system that manages local micro-
production units and IDPRs• Integrating all the novel features into one, single platform• Demonstrating and validating the system full-scale in two European regions to
assess the technological and economic feasibility of this new, innovativeplatform.
S.S. 010 Verger
S.S. 730Planallonga
S.S. 734Nou Piella
S.S. 928Artigues
Transformer
Smartmetertechnologies
MV Switchgears
Fuses for the LV lines
Transformer
MV Switchgear
Fuses for theLV lines
Smartmeterstechnologies
Smartmeterstechnologies
Fuses for theLV lines
Transformer
MV Switchgear
Case study
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Case study
S.S. 010 Verger
S.S. 730Planallonga
S.S. 734Nou Piella
S.S. 928Artigues
S2
S1
S3
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Transf 1 Transf 2 Transf 3 Transf 4
Line 2 Line 3 Line 4Line 1
~ G
GS~ G
DGLD
BAT
Se
ctio
n 1
Se
ctio
n 2
Se
ctio
n 3
Se
ctio
n 0
S0S1 S1S2 S2S3
IDPR IDPR
~ G
DG~ G
DGLD
BAT
~ G
DGLDLD
Normal operation Emergency operation
Mode 1: Connected to the main grid
Mode 2: Isolated by planned tasks
Mode 3: When the main grid is not operative
Mode 4: When there is/are inoperative internal sections
Case study
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IDPR
Operational modes
• Grid mode:– Produce/consume active power
– Produce/consume reactive power (compensation)
– Compensate unbalanced loads
– Harmonics compensation
• Island mode:– Create an estable network
voltage
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Transformer
S1
MV grid
S0
Loads, DG
LV busbar
Secondary substation
IDPR
IDPR
• 4 branches• Dc bus midpoint conected to the
neutral• Interleaved DC/DC• Sinusoidal modulation
• Transformerless (no common mode).
• No 100 Hz oscilations from battery are transmitted
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DC+
DCN
DC-
R
S
T
N
BAT+
BAT-
ab
c
r
s
t
Main Characteristics
Power moduleLaboratory IDPR version- 34.5 kW (4x CCSPC stack)
- Size: 710x310x340mm aprox
- L ≈ 400 μH (Ø = 165 mm)
- Big, accesible but heavy and complex to assembly
IDPR pilot area unit version- 20 kW (1 x CCSPC stack)
- Size: 440 x 133 x 210 mm
- Rack mounting enclosure
- AC LC-type coupling filter included
-L ≈ 500 μH (Ø = 100 mm) + C up to 30 μF
- Optional extra DC-link
- Easy to parallelize
- Weight: ≈ -25 kg than lab version
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power cell(n-1)power cell (n)
gridbatterydc/dc dc/ac
Master
measurements
Switch
power cell (2) power cell(1)
ethernet
Interleaved DC/DC
converter
Four-wire three-leg inverter
with DC-link split capacitor
Power cell
- 20 kW
- Three-legs 1200 V – 25 A
- SiC technology
- Compact LC output
- 1.35 mF per power cell
- Forced air-cooling
- High performance heat-sink
- L ≈ 500 μH + C up to 30 μF
- 440 x 133 x 210 mm
Battery
- LiFePO4 battery
- 320 V-60 Ah
- BMS RS-485
- 320 x 809 x 1178 mm
Slave control board
- Each one manages 2
power cells
- Based on DSP from TI
F28M35 (HTQFP)
- Two cores: DSP+ARM
Extra DC-link
- + 3.9 mF
- Integrated discharge circuit
- 440 x 88,9 x 210 mm
Master control board
- 1 per each IDPR
- Based on DSP from TI F28M36 (BGA)
- Two cores: DSP+ARM
14
Control
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=
r
s
t
n
+
-
IDPR
Low voltage grid
400 V – 50 Hz
Loads
Zt Zs Zr
V
V
V
IgrIgs
Igt
Sg
=
+
-
dc/dc stage
=dcn Battery
+
-
+
-
dcn
inverter stage
V+
+
+
+
Vbus+
V+
Vbus-
Vr
Vs
Vt
Il rIl s
Il t
Ic r
Ic s
Ic t
V+
Vbat
Ibat
Scheme when batteries are considered
GSI (grid-connected)
GCI (grid-disconnected)
Scheme when no batteries are
considered
GSI (grid-(dis)connected)=
r
s
t
n
+
-
IDPR
Low voltage grid
400 V – 50 Hz
Loads
Zt Zs Zr
V
V
V
IgrIgs
Igt
Sg
dcn
inverter stage
V+
+
+
+
Vbus+
V+
Vbus-
Vr
Vs
Vt
Il rIl s
Il t
Ic r
Ic s
Ic t
Control
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=
r
s
t
n
+
-
IDPR
Low voltage grid
400 V – 50 Hz
Loads
Zt Zs Zr
V
V
V
IgrIgs
Igt
Sg
=
+
-
dc/dc stage
=dcn Battery
+
-
+
-
dcn
inverter stage
V+
+
+
+
Vbus+
V+
Vbus-
Vr
Vs
Vt
Il rIl s
Il t
Ic r
Ic s
Ic t
V+
Vbat
Ibat
Boost battery voltage
DC-link active balancing
Battery: 294 VDC
DC-link: 800 VDC
DC-link: 800 VDC
+ to dcn: 450 VDC
dcn to -: 350VDC
Control
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Order 5
PR+HC3+HC5
HC7+HC9
Order 10
Conventional formulation New formulation
Ressonant controllers
18
SWITCHGEARPROTECTIONS
RAW Ethernet10 kHz
CENTRAL CONTROL (GAIA)
DISTRIBUTEDCONTROL
(3N1)
I/VSENSORS
USER
Analog
ModbusRS-485
BATTERY BMS
wired
RS-485
DSRFPLLVGRID
θPLL, FPLL, VD+1, VQ
+1, VD-1, VQ
-1
Active filter current setpoint
generation
en/dis
ILOAD
AC voltage FPR
controller
V*/F*
VGRID
PQ current setpoint
generation
SOC,Vmax,Vmin,T
P*/Q*
VBAT
Bus voltage control and
balance
VBUS
StateMachine/
Alarms
order
all
STATUS
+IR
*, IS*, IT
*, IA*, IB
*, IC*,
AC current FPR / DC
current PI
General architecture
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19
+
-
fpll
Vdc+ + Vdc
-
Vdc*
fc = f ± 2 Hz
Notch adaptative Vdc
filt
PIe out
Inv. Park (direct seq.)
d
q
α
β
[Idq+1]
Inversa Clarke
α
β
r
t
s[Iαβ]
Iαdc*
iβdc*
θ
IRdc*
ISdc*
ITdc*
1/2Ia
dc*
Ibdc*
÷xx
pll.vd+1filt
Vdcfilt
2/3
modo
isla
red
Iddc*
Idcdc*
Idcdc*
-1
IRdc*
ISdc*
ITdc*Vdc
filt
isla
red
Idcdc*
1/3
Iceq*
+
-
fpll
Vdc+ - Vdc
-
Vdc*
fc = f ± 2 Hz
Notch adaptative Vdc
filt
PIe out
modo
Idcdc*
-1
DC Bus control
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Ph. shift(150 Hz)
Ph. shift(250 Hz)
Ph. shift(350 Hz)
Ph. shift(450 Hz)
LPFωc = 10 rad/s
LPFωc = 10 rad/s
iRL
fpllfc = f ± 2 Hz
Notch adaptative iR
H*
+
-
iR50
iSL
fpllfc = f ± 2 Hz
Notch adaptative iS
50
+
-
iS50
iTL
fpllfc = f ± 2 Hz
Notch adaptative iT
H*
+
-
iT50
Clarke
α
β
r
t
s [Tαβ]
Park (direct)
Park (inverse)
iq+1
id-1
iq-1
θpll
θpll
α
β
d
q
[Tdq+1]
α
β
d
q
[Tdq-1]
Inv.a Park (inverse)
θpll
d
q
α
β
[Idq-1]
Inv. Clarke
α
β
r
t
s[Iαβ]
iα-1
iβ-1
iRuB*
iSuB*
iTuB*
Inv. Park (direct)
θpll
d
q
α
β
[Idq+1]
Inv. Clarke
α
β
r
t
s[Iαβ]
iα+1
iβ+1
iRQ*
iSQ*
iTQ*
enableuB
[0, 1]
γ50
γ
γ50
γ
LPFωc = 10 rad/s
enableQ
[0, 1]
iRH*
iSH*
iTH*
enableH
[0, 1]
+
+
+
+
+
+
+
+
+
din
qin
ddes
qdes
df ilt qf ilt
θ
x = 1y = -1
id+1
din
qin
ddes
qdes
df ilt qf ilt
θ
x = 1y = -1
θpll
θ θ
θ
θpll
θ
iRfilter*
iSfilter*
iTfilter*
LPF
LPF
LPF
LPF
bpass (3,5,7..)
+ Phase shift
bpass (3,5,7..)
+ Phase shift
bpass (3,5,7..)+ Phase shift
Band-pass(150 Hz)
Band-pass(250 Hz)
Band-pass(350 Hz)
Band-pass(450 Hz)
In Out+
+
+
+
+
+
+
+
20
Current loop (active filter)
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21
Pac* LPF
τ = 200 ms
Pacf*
1/2
÷
x
pll.vd+1filt
-1Vbat
Qac* LPF
τ = 200 ms
÷
x
2/3
Inv. Park (direct seq.)
θpll
d
q
α
β
[Idq+1]
Inv. Clarke
α
β
r
t
s[Iαβ]
Iαdc*
iβdc*
θ
Idpq*
Iqpq*
Ibat*
IRpq*
ISpq*
ITpq*
Iapq*
Ibpq*
0
PIe out
Imin = f (SOC)
+
-
Vbat
Vbatmax
PIe out
0 A
+
-
Vbat
Vbatmin
AC Volatge control
FPRe out+
-
VR*
VR
IRv*
FPRe out+
-
VS*
VS
ISv*
FPRe out+
-
VT*
VT
ITv*
P/Q Setpoints
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EMTP-RV Modelling
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• Reactive current compensation
• Unbalance current compensation
• Harmonics compensation
• Linear load transient
• Non linear load transient
• Over load (OL) response
Simulation Results
Reactive current compensation(grid-connected)
The master reads the load current.
It calculates the direct, inverse and zerosequence current components (Fortescuetransformation).
To compensate de unbalance, the IDPRinjects the inverse and zero sequence ofthe load.
To compensate de reactive, the IDPRinjects the quadrature (dq0 transformation)component of the direct sequence.
Test conditions
Zr 300 μF capacitor
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Enabled
Reactive power compensation enabling Enabled
Active power setpoint 0 kW
Reactive power setpoint 0 kvar
Green Vr
Cyan Ilr / Igr
Magenta Ils /Igs
Black Ilt /Igt
Igr
Igs
igt
Ilr
Ils
Ilt
IctIcsicr
IDPR
Igr
Igs
igt
Ilr
Ils
Ilt
IctIcsicr
IDPR
Unbalance current compensation(grid-connected)
The master reads the load current.
It calculates the direct, inverse and zerosequence current components (Fortescuetransformation).
To compensate de unbalance, the IDPRinjects the inverse and zero sequence ofthe load.
To compensate de reactive, the IDPRinjects the quadrature (dq0 transformation)component of the direct sequence.
Test conditions
Zr 5 Ω resistor
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Enabled
Reactive power compensation enabling Disabled
Active power set-point 0 kW
Reactive power set-point 0 kvar
Cyan Ilr/Igr
Magenta Ils/Igs
Black Ilt/Igt
Harmonics compensation(grid-connected)
The master reads the load current andcalculates de odd harmonics up to the 15thcomponent.
The master establish as set-point the sum ofthe harmonics components from the 3rd tothe 15th.
The harmonic compensation set-point iscalculated at a 10 kHz frequency. It limits theTHD compensation.
At this frequency, the THD reduction can bemore than 30 times when some predictivecontrol lead phases are considered.
THD: 0.87 %
THD: 61.1 %
THD: 0.91%
Ig Il
Ic
idpr
Test conditions
Zr R1 = 1 Ω, R2 = 22 Ω, C = 2200 μF
Zs No load
Zt No load
Harmonic current compensation enabling Enabled
Unbalance compensation enabling Disabled
Reactive power compensation enabling Disabled
Active power setpoint 0 kW
Reactive power setpoint 0 kvar
Red Igr
Green Icr
Blue Ilr
R1
R2
C
Linear load transient(grid-disconnected)
• In case of a grid fault event, the DSO is
able to use the IDPR to generate a
island to feed the local loads.
• The IDPR can generate an stable AC
voltage at the PCC (Point of Common
Coupling) while feeding any kind of load
(in this case Linear loads).
Test conditions
Zr R1 = 5 Ω resistor
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Disabled
Reactive power compensation enabling Disabled
Active power setpoint Disabled
Reactive power setpoint Disabled
Green Vr
Blue Vs
Red Vt
Cyan Ilr
Magenta Ils
Black Ilt
idpr
Icr
Island mode
Vrpcc/Vs
pcc/Vtpcc
PCC
Ics
Ict
R1
idpr
Icr
Island mode
Vrpcc/Vs
pcc/Vtpcc
PCC
Ics
Ict
Non-linear load transient
• In case of a grid fault event, the DSO is
able to use the IDPR to generate a
island to feed the local loads.
• The IDPR can generate an stable AC
voltage at the PCC (Point of Common
Coupling) while feeding any kind of load
(in this case non-linear loads).
Test conditions
Zr R1 = 1 Ω, R2 = 22 Ω, C = 2200 μF
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Disabled
Reactive power compensation enabling Disabled
Active power setpoint Disabled
Reactive power setpoint Disabled
Green Vr
Blue Vs
Red Vt
Cyan Ilr
Magenta Ils
Black Ilt
R1
R2
C
(grid-disconnected)
Over-load (OL) response (I)
• In case of a grid fault event, the DSO is
able to use the IDPR to generate a
island to feed the local loads.
• The IDPR can generate an stable AC
voltage at the PCC (Point of Common
Coupling) while feeding any kind of load
(in this case over-load response fixing
the rms limit of the current at 42 A).
Test conditions
Zr R1 = 5 Ω resistor
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Disabled
Reactive power compensation enabling Disabled
Active power setpoint Disabled
Reactive power setpoint Disabled
Green Vr
Blue Vs
Red Vt
Cyan Ilr
Magenta Ils
Black Ilt
idpr
Icr
Island mode
Vrpcc/Vs
pcc/Vtpcc
PCC
Ics
Ict
R1
Overload connection response
Over-load (OL) response (II)Test conditions
Zr R1 = 5 Ω resistor
Zs No load
Zt No load
Harmonic current compensation enabling Disabled
Unbalance compensation enabling Disabled
Reactive power compensation enabling Disabled
Active power setpoint Disabled
Reactive power setpoint Disabled
Green Vr
Blue Vs
Red Vt
Cyan Ilr
Magenta Ils
Black Ilt
idpr
Icr
Island mode
Vrpcc/Vs
pcc/Vtpcc
PCC
Ics
Ict
R1
Steady sate with overload limitation
(a) OL disabled (b) OL enabled
www.teknocea.cat 31
• Three different installations– Artigues
– Verger
– Planallonga
• Two with battery, one without
Final implementation
32
- Sub-station location
- Operates as CC-VSI when grid-connected- Compensates harmonic current components
- Compensate unbalance currents
- Compensate reactive currents
- Manages active power
- Operates as VC-VSI when grid-disconnected- Able to feed loads
- 4x Power cells
- 2x DC/DC
- 3x Inverter
- 1x extra DC-link modules
- 2x slave control boards
- 1x master control board
+
Pictures during FAT
(at CITEA-UPC’s facilities)
Artigues’ IDPR
- Sub-station location
- Operates as CC-VSI when grid-connected- Compensates harmonic current components
- Compensate unbalance currents
- Compensate reactive currents
- Manages active power
- Operates as VC-VSI when grid-disconnected- Able to feed loads
- 6x Power cells
- 3x DC/DC
- 3x Inverter
- 3x extra DC-link modules
- 3x slave control boards
- 1x master control board
33
Pictures during FAT
(at CITEA-UPC’s facilities)
Pictures during SAT
(at Estabanell’s pilot area)
+
Verger’s IDPR
34
- Pole location
- Only operates as CC-VSI- Compensates harmonic current components
- Compensate unbalanced currents
- Compensate reactive currents
- Not able to feed loads : no battery
- Not able to manage active power: no battery
- 1x Power cell
- 1x extra DC-link module
- 1x slave control board
Pictures during FAT
(at CITEA-UPC’s facilities)
Pictures during SAT
(at Estabanell’s pilot area)
Planallonga’s IDPR
IDPR
Auxiliary batteries
charger
RTU (LC + TC)
Industrial PC (LEMS)
Communications
Switchgear
Auxiliary batteries
Real results
www.teknocea.cat 36
Conclusions
www.teknocea.cat 37
• Explore improvements in the design in order to reduce wiring, weight,
maintenance and cost from the IDPR laboratory version
• Design, build, test & validate of functional pilot area IDPR units
• New inner controller formulation tested under real conditions, with
satisfactory performance
• Validation of the reference generator over Ethernet in a master/slave
hierarchy in order to allow harmonic + unbalance + reactive
compensation
• Physical (working pilot area prototypes and storage integration)
Goals
Achievments
Thank you for your attention
www.teknocea.cat 38
Worldwide energy challenge needssmart engineers to develop smartsolutions with a very strongknowledge and life-long learning
Ricard [email protected]
www.teknocea.catJune, 2016
EMTP-RV User group Meeting, Aix en Provence