intel confidential - flash memory summit · sige strained silicon 2nd gen. sige strained silicon...

Intel Confidential

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Intel Confidential

Tablet Market

2011

One Size Fits All

Tablet Market

2012+

Slider Convertible

Dual Screen

Slate

Detachable

Innovative Form FactorsOptimized for End-User Experience

*Third party trademarks and logos remain the property of others

* 2012 & later platforms

Silicon

Platforms

Operating Systems

Applications and Services

The User EXPERIENCE

* 2012 & later platforms

Silicon

Platforms

Operating Systems

Applications and Services

The User EXPERIENCE

Page 7: Intel Confidential - Flash Memory Summit · SiGe Strained Silicon 2nd Gen. SiGe Strained Silicon 2nd Gen. Gate-Last High-k Metal Gate Invented Gate-Last High-k Metal Gate First to

2003 2005 2007 2009 2011

90 nm 65 nm 45 nm 32 nm 22 nm

Invented

SiGe

Strained Silicon

2nd Gen.

SiGe

Strained Silicon

2nd Gen.

Gate-Last

High-k

Metal Gate

Invented

Gate-Last

High-k

Metal Gate

First to

Implement

Tri-Gate

STRAINED SILICON

HIGH-k METAL GATE

TRI-GATE

22 nmA Revolutionary

Leap in Process Technology

37%Performance Gain at Low

Voltage*

>50%Active Power Reduction at

Constant Performance*

Process Technology Leadership

* Compared to Intel 32 nm technology 7

Page 8: Intel Confidential - Flash Memory Summit · SiGe Strained Silicon 2nd Gen. SiGe Strained Silicon 2nd Gen. Gate-Last High-k Metal Gate Invented Gate-Last High-k Metal Gate First to

OPTIMIZED

EXPERIENCE

Intel®

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Display

Always

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Sync

Page 9: Intel Confidential - Flash Memory Summit · SiGe Strained Silicon 2nd Gen. SiGe Strained Silicon 2nd Gen. Gate-Last High-k Metal Gate Invented Gate-Last High-k Metal Gate First to

THANK YOU

SiGe HBT BiCMOS Field Programmable Gate Arrays for Fast ...ecse.rpi.edu/frisc/theses/GodaThesis/GodaThesis.pdf · today’s technology will win tomorrow’s battles, with a heavy

Extraction of Large Valence Band Offsets in Strained-Si ...teherani.ee.columbia.edu/uploads/2/3/7/2/23722259/valence_band_offsets_04.pdf · Type II Heterostructures on Relaxed SiGe

Strained Silicon Technology

100Gbit/s 超級歪 SiGe 光変調器の研究開発（112103007 ...100Gbit/s超級歪SiGe光変調器の研究開発（112103007） Strained SiGe optical modulator toward 100Gbit/s

Overpopulation strained resources

Strained Silicon, Electronic Band Structure and … · Review for Electronic Band Structure Ab initio vs Empirical methods A strain example: Si on SiGe buffer Lower Dimension Aproximation

36.2 Theoretical Investigation Of Performance In ... · Theoretical Investigation Of Performance In Uniaxially- and Biaxially-Strained Si, SiGe and Ge Double-Gate p-MOSFETs Tejas

E Matrícula Informatizada no SIGE. Considerações iniciais Infraestrutura SIGE online Novo Pack do SIGE Matrícula Informatizada no SIGE

Task 6.1: Role of alloy scattering in strained SiGe nano MOSFETs

Strained Si, Ge and SiGe Alloys Modeling With Full-zone k.p Method Optimized From First Pri

Manual Docente Sige

Ballistic one-dimensional holes with strong g-factor anisotropy in … · 2018. 4. 16. · Ballistic one-dimensional holes with strong ... tum wires gate-deﬁned in a strained SiGe/Ge/SiGe

Canada’s Strained Housing Markets

Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Simulations of sub-100nm strained Si MOSFETs with high- gate stacks

AC-transport in p- SiGe / Ge / SiGe

SiGe ꪿ 덎 SiGe Technology - 國立中興大學web.ee.nchu.edu.tw/~stchang/course/sige/SiGe-e-learning.pdf · • SiGe BiCMOS for telecommunication • Strained Si and Ge in MOSFET

III-V/Si heterojunctions for steep subthreshold slope ... heterojunctions for steep subthreshold slope transistors ... for Integrated Quantum Electronics ... (Tri-gate) Si/SiGe Diffusion

Strained Silicon.pptx

TowerJazz High Performance SiGe BiCMOS processes · TowerJazz SiGe HBJT offers Best in class SiGe Speed / Power and Best in class Noise. The SiGe HBJTs are embedded into complimentary

IC fabrication process trends SOI technology SiGe ... · Transistor scaling – conclusion Jiří Jakovenko – katedra mikroelektroniky ČVUT-FEL ... 3D Tri-Gate CMOS Transistors

SiGe HBT BiCMOS Field Programmable Gate Arrays for Fast Reconfigurable Computing

Compressively strained SiGe band-to-band tunneling model ... · Kuo-Hsing Kao,1,2,a) Anne S. Verhulst,1 Rita Rooyackers,1 Bastien Douhard,1 Joris Delmotte,1 Hugo Bender,1 Olivier

NP TOts a~ A l./' - Princeton University · 4. Growth and Photoluminescence of Strained SiGe on < 110> Si 58 NP Si TOts ( a~___A .a. l./'":J. 0"---"" (b) 23ASio.57GeO.43-;,

The Characteristics and Simulations of Si/SiGe Heterojunction at Strained-Si Devices

Drift and hall mobility of hole carriers in strained sige films grown on (001) si substrates

Advancing Strained Silicon

Simulations of sub-100nm strained Si MOSFETs with high- gate stacks Lianfeng Yang, Jeremy Watling *, Fikru Adamu-Lema, Asen Asenov and John Barker Device

SiGe ꪿ 덎 SiGe Technologycc.ee.nchu.edu.tw/~stchang/course/sige/SiGe-e-learning.pdf · process lines, they should cost little more than conventional bipolar. • SiGe BiCMOS for

NB7L86A - 2.5 V/3.3 V SiGe Differential Smart Gate with

SIGE Local X SIGE Online; SIGE UPLOAD CLIENTE E SERVIDOR; ENVIO DOS ARQUIVOS; RECEBIMENTO DOS ARQUIVOS; PROCESSAMENTO; IMPORTAÇÃO; INCONSISTÊNCIAS; REPARAÇÃO

A Precision SiGe Reference Circuit Utilizing Si and SiGe

Risk Factors - intel.co.jp · 90 nm 65 nm 45 nm 32 nm Strained Silicon Tri-Gate 2003 2005 2007 2009 2011 22 nm Transistor Innovations Enable Technology Cadence High k Metal gate Invented

Manual Sige

1 Ultrathin Gate Dielectrics on SiGe/SiGeC Heterolayers By Siddheswar Maikap Department of Physics Indian Institute of Technology (IIT), Kharagpur India