intel µp instruction encoding and decoding

16
CENG04: Microprocessor Systems Midterm Lecture 2 & 3

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Intel uP Instruction decoding and encoding

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  • 1. CENG04:Microprocessor Systems Midterm Lecture 2 & 3

2. Introduction Intel P Instruction Encoding and Decoding

  • Machine Language
    • It is the native binary code that the microprocessor understand.
  • Assembler
    • It is use to translate assembly instruction to a machine code.
  • Opcode (Operation Code)
    • Selects the operation performed by the microprocessor such as MOV, ADD, INC, JMP, & etc.
    • It is either one or two byte in length for most machine language instruction.
  • Encoding
    • It is a processes representing entire assembly instruction as a binary value or hexadecimal format (human perspective)
  • Decoding
    • It is the process of converting hexadecimal format to assembly language (machine perspective)

3.

  • Figure 1 The format of the 8086 80486 Instruction a) 16-bit instruction, b) 32-bit instruction

8086 80486 Instruction Format Intel P Instruction Encoding and Decoding 4.

  • Figure 2 8088/8086 Instruction Format

8088/8086 Instruction Format Intel P Instruction Encoding and Decoding 5.

  • Instructionsconsist of:
    • operation (opcode) e.g. MOV
    • operands (number depends on operation)
  • Operandsspecified using addressing modes
  • Addressing modemay include addressing information
    • Registers
    • Constant values
    • Variable

Instruction Encoding Intel P Instruction Encoding and Decoding 6.

  • Encodingof instruction must includes:
    • Opcode
    • Operands
    • Addressing information
  • Encodingis process representing entire instruction as abinary value
    • Number of bytes needed depends on how much information must be encoded .
  • Instructions are encoded byassembler:
    • .OBJfile (link, then loaded by loader)
  • Instructions aredecodedby processor during execution cycle

Instruction Encoding Intel P Instruction Encoding and Decoding 7.

  • Override Prefixes
    • It is the first 2 bytes of a 32-bit instruction format
    • These bytes are not always used
    • Divided in Two Parts:
      • Address Size modifies the size of the address used the instruction and this byte is equal to67hif in used.
        • If the 80386/80486 is operating as 16-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is equal to67h
        • If the 80386/80486 is operating as 32-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is removed.

Instruction Encoding Intel P Instruction Encoding and Decoding 8.

      • Operand Size-modifies the size of the register.
        • If the 80386/80486 is operating as 16-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is equal to66h
        • If the 80386/80486 is operating as 32-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is removed.
    • These toggle the size of the register and operand address from 16-bit to 32-bit or vice versa.

Instruction Encoding Intel P Instruction Encoding and Decoding 9.

  • First byte:Opcode, Direction, & Word bits
    • Opcode select the operation performed by the microprocessor (use the lists of opcodes)
    • Direction (D) indicates the flow of data
      • D = 1, data flow from (R/M) field to REG field
      • D = 0, if data flow from REG field to R/M field.
    • Word (W) determine the size of data or register
      • W = 1, 16- or 32-bit data width (word or dword)
      • W = 0, 8-bit data width (byte)
  • Note:W bit appear in most of the instruction but D bit mainly appears withMOV and some other instructions.

Instruction Encoding Intel P Instruction Encoding and Decoding 10.

  • Second Byte:Mode, Register, & Register/Memory
    • Modefield
      • This field specifies the addressing modes for selected instruction.
      • This selects the type of addressing and whether a displacement is present or with the selected instruction.
        • MOD = 11, selects data addressing modes
        • MOD = 00, 01, or 10, selects memory addressing modes
    • REGfield
      • Field for register assignment
    • R/M (Register or Memory)
      • Field for register act as a memory or memory location assignment.

How to Encode Instructions as Binary Values?Intel P Instruction Encoding and Decoding 11.

  • Figure 3 Table for MOD field a) 16-bit, b) 32-bit

Instruction Encoding Intel P Instruction Encoding and Decoding 12.

  • Figure 4 REG field for w=0 & w=1

Instruction Encoding Intel P Instruction Encoding and Decoding 13.

  • Figure 5 16- and 32-bit R/M field, segment register field, and scaled factor.

How to Encode Instructions as Binary Values?Intel P Instruction Encoding and Decoding 14.

  • Register Addressing
    • It uses the R/M field to specify a register instead of memory location
  • Special addressing modes
    • This addressing modes occurs whenever memory data are referenced by only the displacement mode of addressing for 16-bit instructions.
      • MOV [1000h], DL
      • MOV NUMB, DL
    • MOD= 00 andR/M =110
    • Scaled-Index Byte
      • Indicates the additional forms of scaled-index addressing.
      • Occurs when R/M = 100

Instruction Encoding Intel P Instruction Encoding and Decoding 15.

  • Determine the equivalent machine code of the following assembly code:
    • MOV DX, AX
    • MOV DX, [BX + DI + 1234h]
    • ADD AX, 1023
    • SUB DX, 1234h
    • AND [BX + 12h], AX
    • MOV EAX, [EBX + 4*ECX]
    • MOV [5267h], DH
    • MOV CS, AX
    • MOV DS, AX
    • MOV AX, [BX]

Examples (Encoding) Intel P Instruction Encoding and Decoding 16.

  • Given the following machine code (hex code), determine the equivalent assembly instruction for each.
    • 8B923412h
    • 81C17856h
    • 2C26h
    • 8B163412h
    • 20D8h

Examples (Decoding) Intel P Instruction Encoding and Decoding