intel µp instruction encoding and decoding
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Intel uP Instruction decoding and encodingTRANSCRIPT
- 1. CENG04:Microprocessor Systems Midterm Lecture 2 & 3
2. Introduction Intel P Instruction Encoding and Decoding
- Machine Language
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- It is the native binary code that the microprocessor understand.
- Assembler
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- It is use to translate assembly instruction to a machine code.
- Opcode (Operation Code)
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- Selects the operation performed by the microprocessor such as MOV, ADD, INC, JMP, & etc.
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- It is either one or two byte in length for most machine language instruction.
- Encoding
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- It is a processes representing entire assembly instruction as a binary value or hexadecimal format (human perspective)
- Decoding
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- It is the process of converting hexadecimal format to assembly language (machine perspective)
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- Figure 1 The format of the 8086 80486 Instruction a) 16-bit instruction, b) 32-bit instruction
8086 80486 Instruction Format Intel P Instruction Encoding and Decoding 4.
- Figure 2 8088/8086 Instruction Format
8088/8086 Instruction Format Intel P Instruction Encoding and Decoding 5.
- Instructionsconsist of:
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- operation (opcode) e.g. MOV
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- operands (number depends on operation)
- Operandsspecified using addressing modes
- Addressing modemay include addressing information
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- Registers
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- Constant values
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- Variable
Instruction Encoding Intel P Instruction Encoding and Decoding 6.
- Encodingof instruction must includes:
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- Opcode
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- Operands
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- Addressing information
- Encodingis process representing entire instruction as abinary value
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- Number of bytes needed depends on how much information must be encoded .
- Instructions are encoded byassembler:
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- .OBJfile (link, then loaded by loader)
- Instructions aredecodedby processor during execution cycle
Instruction Encoding Intel P Instruction Encoding and Decoding 7.
- Override Prefixes
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- It is the first 2 bytes of a 32-bit instruction format
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- These bytes are not always used
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- Divided in Two Parts:
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- Address Size modifies the size of the address used the instruction and this byte is equal to67hif in used.
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- If the 80386/80486 is operating as 16-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is equal to67h
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- If the 80386/80486 is operating as 32-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is removed.
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Instruction Encoding Intel P Instruction Encoding and Decoding 8.
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- Operand Size-modifies the size of the register.
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- If the 80386/80486 is operating as 16-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is equal to66h
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- If the 80386/80486 is operating as 32-bit instruction mode machine (real or protected mode) and 32-bit instruction, byte is removed.
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- These toggle the size of the register and operand address from 16-bit to 32-bit or vice versa.
Instruction Encoding Intel P Instruction Encoding and Decoding 9.
- First byte:Opcode, Direction, & Word bits
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- Opcode select the operation performed by the microprocessor (use the lists of opcodes)
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- Direction (D) indicates the flow of data
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- D = 1, data flow from (R/M) field to REG field
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- D = 0, if data flow from REG field to R/M field.
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- Word (W) determine the size of data or register
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- W = 1, 16- or 32-bit data width (word or dword)
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- W = 0, 8-bit data width (byte)
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- Note:W bit appear in most of the instruction but D bit mainly appears withMOV and some other instructions.
Instruction Encoding Intel P Instruction Encoding and Decoding 10.
- Second Byte:Mode, Register, & Register/Memory
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- Modefield
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- This field specifies the addressing modes for selected instruction.
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- This selects the type of addressing and whether a displacement is present or with the selected instruction.
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- MOD = 11, selects data addressing modes
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- MOD = 00, 01, or 10, selects memory addressing modes
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- REGfield
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- Field for register assignment
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- R/M (Register or Memory)
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- Field for register act as a memory or memory location assignment.
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How to Encode Instructions as Binary Values?Intel P Instruction Encoding and Decoding 11.
- Figure 3 Table for MOD field a) 16-bit, b) 32-bit
Instruction Encoding Intel P Instruction Encoding and Decoding 12.
- Figure 4 REG field for w=0 & w=1
Instruction Encoding Intel P Instruction Encoding and Decoding 13.
- Figure 5 16- and 32-bit R/M field, segment register field, and scaled factor.
How to Encode Instructions as Binary Values?Intel P Instruction Encoding and Decoding 14.
- Register Addressing
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- It uses the R/M field to specify a register instead of memory location
- Special addressing modes
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- This addressing modes occurs whenever memory data are referenced by only the displacement mode of addressing for 16-bit instructions.
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- MOV [1000h], DL
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- MOV NUMB, DL
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- MOD= 00 andR/M =110
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- Scaled-Index Byte
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- Indicates the additional forms of scaled-index addressing.
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- Occurs when R/M = 100
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Instruction Encoding Intel P Instruction Encoding and Decoding 15.
- Determine the equivalent machine code of the following assembly code:
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- MOV DX, AX
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- MOV DX, [BX + DI + 1234h]
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- ADD AX, 1023
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- SUB DX, 1234h
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- AND [BX + 12h], AX
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- MOV EAX, [EBX + 4*ECX]
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- MOV [5267h], DH
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- MOV CS, AX
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- MOV DS, AX
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- MOV AX, [BX]
Examples (Encoding) Intel P Instruction Encoding and Decoding 16.
- Given the following machine code (hex code), determine the equivalent assembly instruction for each.
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- 8B923412h
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- 81C17856h
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- 2C26h
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- 8B163412h
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- 20D8h
Examples (Decoding) Intel P Instruction Encoding and Decoding