KARPAGAM UNIVERSITY

(Under Section 3 of UGC Act 1956)

Coimbatore – 641 021

(For the candidates admitted from 2013 onwards)

B.Sc. DEGREE INTERNAL-I EXAMINATION, JAN 2015

Microprocessors and Microcontrollers

Answer Key SECTION A

1.What is Microprocessor?

A microprocessor is a multipurpose, programmable logic device that reads binary

instructions from a storage device called memory accepts binary data as input and processes

data according to those instructions and provides result as output. The power supply of 8085

is +5V and clock frequency in 3MHz.

2.What are the four primary operations of a MPU?

Memory Read

memory write

I/O Read

I/O write

3.What do you mean by address bus?

The address is an identification number used by the microprocessor to identify or access a

memory location or I / O device. It is an output signal from the processor. Hence the address

bus is unidirectional.

4.Why is the data bus bidirectional?

The microprocessor has to fetch (read) the data from memory or input device for processing

and after processing, it has to store (write) the data to memory or output device. Hence the

data bus is bi-directional.

5.Define T-state?

T-State is defined as one subdivision of the operation performed in one clock period. These

subdivisions are internal states synchronized with the system clock, and each T-State is

precisely equal to one clock period.

6.What is an instruction set?

An instruction is a binary pattern entered through an input device to command the

microprocessor to perform that specific function. A collection of instructions are called as

instruction set

7.Give the functional categories of 8085 microinstructions?

The instructions of 8085 can be categorized into the following five categories

Data transfer Instructions -MOV Rd,Rs STA 16-bit

Arithmetic Instructions -ADD R DCR M

Logical Instructions -XRI 8-bit RAR

Branching Instructions -JNZ CALL 16-bit

Machine control Instructions -HLT NOP

8. What is USART?

USART stands for universal synchronous/Asynchronous Receiver/Transmitter. It is a

programmable communication interface that can communicate by using either synchronous or

asynchronous serial data.

9.Give the various modes of 8254 timer?

Each of the three counters of 8253 can be operated in one of the following six modes of

operation.

Mode 0 (Interrupt on terminal count)

Mode 1 (Programmable monoshot)

Mode 2 (Rate generator)

Mode 3 (Square wave generator)

Mode 4 (Software triggered strobe)

Mode 5 (Hardware triggered strobe)

10. Write instructions to load the hexadecimal numbers 65H in register C, and 92h in the

accumulator A .Display the number 65H at PORT0 and 92H at PORT1?

MVI C,65H; load the hexadecimal numbers 65H in register C

MVI A,92H; load the hexadecimal numbers 92H in register A

OUT PORT1; Display the number at PORT1

MVI A,65H

OUT PORT 0; Display the number at PORT0

11. Define Instruction cycle.

Instruction cycle is defined, as the time required completing the execution of an instruction.

12. Define opcode and operand.

Opcode (Operation code) is the part of an instruction / directive that identifies a

specific operation.

Operand is a part of an instruction / directive that represents a value on which

the instruction acts. 13. What is RIM?

RIM: Read Interrupt Mask. Used for three functions a. To read interrupt mask b. To identify

the pending interrupt c. To receive serial data

14. What is read back command in 8254 timer?

The Read- Back Command in 8254 allows the user to read the count and the status of the

counter.

15. List out the Features of 8051?

The features are

Single supply +5 volt operation using HMOS technology.

4096 bytes program memory on chip(not on 8031)

128 data memory on chip.

Two multiple mode,16-bit timer/counter.

Extensive boolean processing capabilities.

64 KB external RAM size

32 bidirectional individually addressible I/O lines.

8 bit CPU optimized for control applications

SECTION B (3*10=30)

16. a. Draw & explain the architecture of 8085 microprocessor.

ARCHITECTURE OF 8085

This is the functional block diagram of the 8085 Microprocessor.

Accumulator:-It is an 8-bit register which is used to perform arithmetical and logical operation.

It stores the output of any operation. It also works as registers for I/O accesses.

Temporary Register:-It is a 8-bit register which is used to hold the data on which the

accumulator is computing operation. It is also called as operand register because it provides

operands to ALU.

Registers:-These are general purposes registers. Microprocessor consists 6 general purpose

registers of 8-bit each named as B,C,D,E,H and L. Generally theses registers are not used for

storing the data permanently. It carries the 8-bits data. These are used only during the execution

of the instructions.

These registers can also be used to carry the 16 bits data by making the pair of 2 registers. The

valid register pairs available are BC,DE HL. We can not use other pairs except BC,DEand HL.

These registers are programmed by user.

ALU:-ALU performs the arithmetic operations and logical operation.

Flag Registers:-It consists of 5 flip flop which changes its status according to the result stored

in an accumulator. It is also known as status registers. It is connected to the ALU.

There are five flip-flops in the flag register are as follows:

1.Sign(S)

2.zero(z)

3.Auxiliary carry(AC)

4.Parity(P)

5.Carry(C)

The bit position of the flip flop in flag register is:

All of the three flip flop set and reset according to the stored result in the accumulator.

1.Sign- If D7 of the result is 1 then sign flag is set otherwise reset. As we know that a number

on the D7 always desides the sign of the number.

if D7 is 1: the number is negative.

if D7 is 0: the number is positive.

2.Zeros(Z)-If the result stored in an accumulator is zero then this flip flop is set otherwise it is

reset.

3.Auxiliary carry(AC)-If any carry goes from D3 to D4 in the output then it is set otherwise it

is reset.

4.Parity(P)-If the no of 1's is even in the output stored in the accumulator then it is set

otherwise it is reset for the odd.

5.Carry(C)-If the result stored in an accumulator generates a carry in its final output then it is

set otherwise it is reset.

Instruction registers(IR):-It is a 8-bit register. When an instruction is fetched from memory

then it is stored in this register.

Instruction Decoder:- Instruction decoder identifies the instructions. It takes the informations

from instruction register and decodes the instruction to be performed.

Program Counter:-It is a 16 bit register used as memory pointer. It stores the memory address

of the next instruction to be executed. So we can say that this register is used to sequencing the

program. Generally the memory have 16 bit addresses so that it has 16 bit memory.

The program counter is set to 0000H.

Stack Pointer:-It is also a 16 bit register used as memory pointer. It points to the memory

location called stack. Generally stack is a reserved portion of memory where information can be

stores or taken back together.

Timing and Control Unit:-It provides timing and control signal to the microprocessor to

perform the various operation. It has three control signal. It controls all external and internal

circuits. It operates with reference to clock signal. It synchronizes all the data transfers.

There are three control signal:

1.ALE-Airthmetic Latch Enable, It provides control signal to synchronize the components of

microprocessor.

2.RD- This is active low used for reading operation.

3.WR-This is active low used for writing operation.

There are three status signal used in microprocessor S0, S1 and IO/M. It changes its status

according the provided input to these pins.

Serial Input Output Control-There are two pins in this unit. This unit is used for serial data

communication.

Interrupt Unit-There are 6 interrupt pins in this unit. Generally an external hardware is

connected to these pins. These pins provide interrupt signal sent by external hardware to

microprocessor and microprocessor sends acknowledgement for receiving the interrupt signal.

Generally INTA is used for acknowledgement.

b. Draw the Pin Diagram of 8085 and explain the function of various signals.

PIN DIAGRAM

8085 is a general purpose microprocessor having 40 pins and works on single power supply.

To study the pin diagram we group

the signals into 5 categories:

1. Power supply and clock signals

2. Address bus

3. Data bus

4. Control and status signals

5. Interrupts and externally initiated signals

6. Serial I/O ports

1. Power supply and Clock frequency signals:

Vcc: + 5 volt power supply

Vss: Ground

X1, X2 : Crystal or R/C network or LC network connections to set the frequency of internal clock

generator. The frequency is internally divided by two. Since the basic operating timing

frequency is 3 MHz, a 6 MHz crystal is connected externally. CLK (output)-Clock

Output is used as the system clock for peripheral and devices interfaced with the

microprocessor.

2. Address Bus:

A8 - A15:

(output; 3-state) It carries the most significant 8 bits of the memory address or the 8 bits

of the I/O address

3. Data bus:

AD0 - AD7 (input/output; 3-state)

These multiplexed set of lines used to carry the lower order 8 bit address as well as data

bus.

During the opcode fetch operation, in the first clock cycle, the lines deliver the lower

order address A0 - A7.

In the subsequent IO / memory, read / write clock cycle the lines are used as data bus.

The CPU may read or write out data through these lines.

4. Control and Status signals:

ALE (output) - Address Latch Enable.

It is an output signal used to give information of AD0-AD7 contents.

It is a positive going pulse generated when a new operation is started by uP.

When pulse goes high it indicates that AD0-AD7 are address.

When it is low it indicates that the contents are data.

RD (output 3-state, active low) - Read memory or IO device.

This indicates that the selected memory location or I/O device is to be read and that the

data bus is ready for accepting data from the memory or I/O device

WR (output 3-state, active low) - Write memory or IO device.

This indicates that the data on the data bus is to be written into the selected memory

location or I/O device.

IO/M (output) - Select memory or an IO device.

This status signal indicates that the read / write operation relates to whether the memory

or I/O device.

It goes high to indicate an I/O operation.

It goes low for memory operations.

5. Status Signals:

S1:

S2:

It is used to know the type of current operation of the microprocessor.

IO/M S1 S0 OPERATION

0 1 1 Opcode fetch

0 1 0 Memory read

0 0 1 Memory write

1 1 0 I/O read

1 0 1 I/O write

1 1 0 Interrupt acknowledge

Z 0 1 Halt

Z x x Hold

Z x x Reset

6. Interrupts and Externally initiated operations:

They are the signals initiated by an external device to request the microprocessor to do a

particular task or work.

There are five hardware interrupts called,

1.TRAP

2.RST 7.5

3.RST 6.5

4.RST 5.5

5.INTR On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active

low INTA (Interrupt Acknowledge) signal.

Reset In (input, active low)

This signal is used to reset the microprocessor.

The program counter inside the microprocessor is set to zero.

The buses are tri-stated.

Reset Out (Output)

It indicates CPU is being reset.

Used to reset all the connected devices when the microprocessor is reset.

7. Direct Memory Access (DMA): Tri state devices:

When 2 or more devices are connected to a common bus, to prevent the devices from

interfering with each other, the tristate gates are used to disconnect all devices except the

one that is communicating at a given instant.

The CPU controls the data transfer operation between memory and I/O device. Direct

Memory Access operation is used for large volume data transfer between memory and

an I/O device directly.

The CPU is disabled by tri-stating its buses and the transfer is effected directly by

external control circuits.

HOLD signal is generated by the DMA controller circuit. On receipt of this signal, the

microprocessor acknowledges the request by sending out HLDA signal and leaves out

the control of the buses. After the HLDA signal the DMA controller starts the direct

transfer of data.

READY (input) Memory and I/O devices will have slower response compared to microprocessors.

Before completing the present job such a slow peripheral may not be able to handle

further data or control signal from CPU.

The processor sets the READY signal after completing the present job to access the

data.

The microprocessor enters into WAIT state while the READY pin is disabled.

8. Single Bit Serial I/O ports:

SID (input) - Serial input data line

SOD (output) - Serial output data line

These signals are used for serial communication.

17. a. Explain the instruction format & instruction sets with suitable example.

Instruction Format

An instruction is a command to the microprocessor to perform a given task on a

specified data. Each instruction has two parts: one is task to be performed, called the operation

code (opcode), and the second is the data to be operated on, called the operand. The operand

(or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an internal

register, a memory location, or 8-bit (or 16-bit) address. In some instructions, the operand is

implicit.

Instruction word size

The 8085 instruction set is classified into the following three groups according to word

size:

1. One-word or 1-byte instructions

2. Two-word or 2-byte instructions

3. Three-word or 3-byte instructions

In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor. However,

instructions are commonly referred to in terms of bytes rather than words.

One-Byte Instructions

A 1-byte instruction includes the opcode and operand in the same byte. Operand(s) are

internal register and are coded into the instruction.

For example:

These instructions are 1-byte instructions performing three different tasks. In the first

instruction, both operand registers are specified. In the second instruction, the operand B is

specified and the accumulator is assumed. Similarly, in the third instruction, the accumulator is

assumed to be the implicit operand. These instructions are stored in 8- bit binary format in

memory; each requires one memory location.

MOV rd, rs

rd <-- rs copies contents of rs into rd.

Coded as 01 ddd sss where ddd is a code for one of the 7 general registers which is the

destination of the data, sss is the code of the source register.

Example: MOV A,B

Coded as 01111000 = 78H = 170 octal (octal was used extensively in instruction design of such

processors).

Two-Byte Instructions

In a two-byte instruction, the first byte specifies the operation code and the second byte

specifies the operand. Source operand is a data byte immediately following the opcode. For

example:

MNEMONICS HEX CODE

MVI A,32 32,3H

Assume that the data byte is 32H. The assembly language instruction is written as

The instruction would require two memory locations to store in memory.

MVI r,data

r <-- data

Example: MVI A, 30H coded as 3EH 30H as two contiguous bytes. This is an example of

immediate addressing.

OUT port

Where port is an 8-bit device address. (Port) <-- A. Since the byte is not the data but points

directly to where it is located this is called direct addressing.

Three-Byte Instructions

In a three-byte instruction, the first byte specifies the opcode, and the following two

bytes specify the 16-bit address. Note that the second byte is the low-order address and the third

byte is the high-order address. Opcode + data byte + data byte

Example:

LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate addressing.

LDA addr

A <-- (addr) Addr is a 16-bit address in L H order. Example: LDA 2134H coded as 3AH 34H

21H. This is also an example of direct addressing.

b. With neat sketch explain the architecture of 8255.

INTEL introduced this programmable peripheral interface (PPI) chip 8255A for interfacing

peripheral devices to the 8085 system. This versatile chip 8255A is used as a general purpose

peripheral device for parallel data transfer between microprocessor and a peripheral device by

interfacing the device to the system data bus. The PPI has three programmable I/O ports viz.,

Port A, Port B and Port C each of 8 bit width. Port C can be treated as two ports – Port C upper

(PC7-4) and Port lower (PC

3 – 0) and these two can be independently programmed as INPUT or

OUTPUT ports also.

Salient Features i. It is a general purpose programmable I/O device which is compatible with all INTEL

processors and also most other processors.

ii. It provides 24 I/O pins which may be individually programmed in two groups.

iii. This chip is also completely TTL compatible.

iv. It is available in 40 pin DIP and 44 pin plastic leaded chip carrier (PLCC) packages.

v. It has three 8 bit ports. Port A, Port B and Port C. Port C is treated as two 4 bit ports

also.

vi. This 8255 is mainly programmed in two modes (a) the I/O mode and (b) The bit set/reset

mode (BSR) mode. The I/O mode is further divided into three modes: Mode 0, Mode 1,

and Mode 2.

vii. An 8 bit control resister is used to configure the modes of 8255.

There is also another 8 bit port called control port, which decides the configuration of

8255 ports. This port is written by the microprocessor only.

Pin Description The 8255A is a 40 pin DIP chip which works at single + 5V DC. The pin diagram of

8255A chip is shown in Fig. The pin details of the chip are given below.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

PA4

PA5

PA6

PA7

WR

Reset

D0

D1

D2

D3

D4

D5

D6

D7

Vcc

PB7

PB6

PB5

PB4

PB3

PA3

PA2

PA1

PA0

RD

CS

GND

A1

A0

PC7

PC6

PC5

PC4

PC0

PC1

PC2

PC3

PB0

PB1

PB2

8255A

Pin Configuration of 8255 (Top view – DIP Package)

Pin description of 8255A

Selection of 8255A Ports and their function

Block Diagram of the 8255A The functional diagram of 8255A is shown in Fig. Each functional unit is explained

below.

Functional Block Diagram of 8255A Programmable Peripheral Interface (PPI)

Data Bus buffer This tri-state bidirectional 8 bit buffer is used to interface the data bus of 8255A to the

system data bus. Data is transmitted or received by the buffer when the CPU executes input or

output instructions control words and status information is also transferred through the data bus

buffer.

Read/Write and Control Logic

The function of this block is to manage all the internal and external transfers of both data

and control or status words. It accepts inputs from the CPU and inturn issues commands to both

of the control groups.

Group A and Group B Controls

Each of the group A and group B control blocks receives control words from the CPU

and issues suitable commands to the ports associated to it. The group A control block controls

port A and port C Upper (PC7 - PC

4) where are group B control block, controls port B and port

C lower (PC3 - PC

0)

Port A

It has one 8 bit data output latch/buffer and one 8 bit input latch buffer. This port A can

be configured in all the three modes: mode0, mode 1, mode 2.

Port B This has an 8 bit data input/output latch/ buffer which can be programmed both in mode

0 and mode 1.

Port C

It has one 8 bit unlatched input buffer and an 8 bit output latch/buffer. This port can be divided

into two 4 bit ports under the mode control. These two ports can be used as control signals for

ports A and B in the handshake mode.

18. Write an 8085 ALP program to multiply two 8-bit data and store the output in the

Location of 8531H, 8532H and 8533H. (Compulsory)

MVI C,00

LDA 4200

MOV B,A

LDA 4201

MOV A,D

MVI A,00

LABEL:ADD B

DCR D

JNZ LABEL

JNC LOOP

INR C

LOOP:STA 8531

MOV A,C

STA 8533

HLT