international center on design for nanotechnology workshop...

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Sankar Basu Program Director Computing & Communications Foundations Division E-mail:[email protected], Phone: 703-292-8910 International Center on Design for Nanotechnology Workshop August, 2006 Hangzhou, Zhejiang, P. R. China Challenges and opportunities for Designs in Nanotechnologies

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Sankar Basu

Program DirectorComputing & Communications Foundations Division

E-mail:[email protected], Phone: 703-292-8910

International Center on Design for Nanotechnology Workshop

August, 2006 Hangzhou, Zhejiang,

P. R. China

Challenges and opportunities for Designs in Nanotechnologies

What is nanotechnology?� “Nano” means one billionth. � Nanotechnology is moving around individual atoms to create lighter and stronger materials, tiny machines and small computers� Average human hair is around 50,000 nanometers wide� Nanometer: Meter ~ Inch: Half the distance around the Equator� A molecule of DNA is only 2.5 nanometers wide� Take one millimeter and divide it into 1,000 pieces. Then take one of those pieces and divide it into 1,000 pieces. One of these pieces is a nanometer long1.6 Millimeter

Nanotechnology: an Interdisciplinary UndertakingSize of structure Examples of Size

Year

NA

NO

MIC

RO

MA

CR

O

Top down

System Creatio

n

Bottom up

0.1 m1 cm1 mm0.1 mm10 μμμμm1 μμμμm0.1 μμμμm10 nm1 nm0.1 nm1940 1960 1980 2000 2020 2040

Tools, Pens, ---

Wire, Screws,

Fibre GlassOptics, Microprobes

Thick Film, Microsensors

Hair, Skin

Bacteria, CD-bits

64Mb-256Mb-Chip

Thickness of Gold foil,G bit-Chip

ProteinNanoparticels, widthOf DNA

Molecule/FullerenesAtom Size

Utilization ofBiological principles

Physical lawsAnd

Chemical properties

00.11.06-03

National Nanotechnology (NNI) Initiative

Create materials, devices and systems with fundamentally new properties (because of their small structure) at atomic, molecular levels in the length scale of approximately 1–100 nm range.

» 10 Year vision, 5 years into the program» 16 US federal agencies involved» Significant impact on microelectronics expected in

the long run

National Nanotechnology Infrastructure Network (NNIN)

Harvard

MichiganMinnesota

UWCornell

PSU HowardStanford

UCSBUNM

UT-AustinGeorgiaTech

NCSU

An integrated national network of user facilities providing researchers open access to resources, instrumentation and

expertise in all domains of nanoscale science, engineering and technology

http://www.NNIN.org

Cornell U.Stanford U.U. of MichiganGeorgia Institute of

TechnologyU. of WashingtonPennsylvania State U.U. of California-

Santa Barbara U. of MinnesotaU. of New MexicoU. of Texas –AustinHarvard U.Howard U.North Carolina State U.

100 nm thick shaft

1 µ m t hickmass loading

100 nm thick shaft

1 µ m t hickmass loading

Single Electron Spin Detection using Magnetic Resonance Force Microscopy, Rugar et al., Nature 430, July (2004)

••Major productivity gains in Global economy has Major productivity gains in Global economy has been driven by information technology in which been driven by information technology in which microelectronicsmicroelectronicsindustryindustryhas played a major role in has played a major role in the background.the background.

••$100B US business of which approximately $4B is $100B US business of which approximately $4B is design (including CAD)design (including CAD)

••A technological slowdown may cause a severe A technological slowdown may cause a severe downturn in US as well as global economy.downturn in US as well as global economy.

Source: Source: ““ Securing the future: etc.Securing the future: etc.”” National National Academy press, 2003Academy press, 2003..

Why do we worry about Why do we worry about nanocomputingnanocomputing??

What is the Problem?

•• As devices become smaller approaching the As devices become smaller approaching the atomic scaleatomic scalenew physical phenomena begins to play a role (new new physical phenomena begins to play a role (new technology) technology) –– bottom drivenbottom driven

•• As As billionsbillions of transistors are put in a chip new of transistors are put in a chip new methodologies for robust design verification etc., methodologies for robust design verification etc., become imperative (complexity) become imperative (complexity) –– top driventop driven

Novel Building Blocks

� Carbon nano-tubes (CNT) as transistors, inteconnects� Single Electron Transistors (SET)� Non-charge based devices (spin/photonic devices)� Quantum dots & QCAs� Molecular devices � Still others, FinFETs, RTDs, ….

Some Projections

•Conventional Si - CMOS scaling will continue for the next 10-15 years

•Heterogeneous new technologies will begin to be integrated into Si platforms by 2015

•Novel nanotech devices needed beyond 2015.

•Compatability with CMOS will leverage production of non-CMOS nano-devices

•Considerable lead time needed

Concerns:� Will research in nanotechnology lead to the development of more and more fascinating devices that we do not know how to use? � Can/should the field of nanoelectronics change to one in which the usage models drive device research?

Three Fundamental Questions� How will we produce reliable, predictable, systems from unreliable components with unpredictable behavior? � How will current or new applications use the huge numbers of devices made available through nanoelectronics?� How must we modify and improve our design tools and methodologies to accommodate terascale designs, nanoscale devices, and radical new ways of computing?

More questions� Are there revolutionary approaches to parallelism that are more suitable to nanoscale electronics, besides the tried and true parallel computers of the past? � What kinds of defect/fault tolerance, testing and verificationare suitable for nanoelectronics, besides the traditional ones?� Can computational neuroscience and brain architectureprovide us an inspiration for nanoarchitecture?

Departure from von Neumann architecture warranted

� How can use massive parallelism offered by preponderance of tiny devices?

� Asynchronous (GALS)?

� Reconfigurable, self-healing?

� Cross-bar and FPGA-like?

� Hybrid technologies CMOS + nanowires(e.g., CMOL)?

� Neuromorphic, CNN- like ?

Emerging Architectures

CAD Tools for New Technologies� Understanding of the computing demands that models place on tools as well as the physics� Tools that work with multilevel, multiscale, models� Hybrid, heterogeneous, hierarchical design tools� Alternate tools and tool flows matched to new technologies and new computational paradigms� New tools oriented to atomic scale issues� Design tools comprehending extreme heterogeneity� Design tools which “understand” thermal issues of design choices at the nanoscale� Tools for Reliable Design» Fault tolerant insertion through architectural synthesis» Explore connection between defect testing and reconfiguration

Success in the SNB Era Requires Cooperation at All Levels

Basic blocks Vin+ Vin-M2

Vss

Vdd

M9

M11

M7

M5

M8

M10

M4

Vout+Vout–

M17 M16 M15 M14

M6

M19

M1

Vcm

Vout+

M3

Vb2

M12M13

Vb1

M18

Vb3

Architectures

Materials & structures

Systems

Devices

Fundamental circuits

Epilogue� It took 50+ years for transistors to make a real difference in computing. We are at the beginning of the age of nano-scale computing� Exponential progress is manifested today in many aspects of scientific endeavor - the most impactful of which is bio-nano technology, which has the potential to change our lives for ever� We live in the most interesting of all times, and are probably at the cusp of a technological revolution