intro to logic synthesis 1 introduction to logic synthesis maciej ciesielski [email protected]...

1Intro to Logic Synthesis

Introduction toIntroduction toLogic SynthesisLogic Synthesis

Maciej CiesielskiMaciej Ciesielski

[email protected]@ecs.umass.edu

Univ. of MassachusettsUniv. of Massachusetts

Amherst, MAAmherst, MA

Intro to Logic Synthesis 2

OutlineOutline

• Synthesis flowSynthesis flow• Two-level synthesis (PLA)Two-level synthesis (PLA)

– Exact methodsExact methods– Heuristic methodsHeuristic methods

• Multi-level synthesis (standard cells/FPGA)Multi-level synthesis (standard cells/FPGA)– Structural synthesisStructural synthesis

• Algebraic vs BooleanAlgebraic vs Boolean– Functional decompositionFunctional decomposition

• Traditional – disjoint decompositionTraditional – disjoint decomposition• BDD-based bidecomposition (Boolean)BDD-based bidecomposition (Boolean)


Synthesis Flow Synthesis Flow

Logic synthesis Logic synthesis

HDL specification

Techn-independent

optimizationTechn-independent

optimization

Technology

mappingTechnology

mappingCell library

Manufacturing

Front-end

parsingFront-end

parsing


What is Logic Synthesis?What is Logic Synthesis?

DD

XX YY

Given: Finite-State Machine F(X,Y,Z, , ) where: X: Input alphabetY: Output alphabetZ: Set of internal states : X x Z Z (next state function, Boolean) : X x Z Y (output function, Boolean)

Target: Circuit C(G, W) where:• G: set of circuit components

{Boolean gates, flip-flops, etc}• W: set of wires connecting G

Combinational logic

Sequential logic


Logic Optimization methods Logic Optimization methods

Logic Optimization

Multi-level logic

(standard cells)Multi-level logic

(standard cells)

Two-level logic (PLA)Two-level logic (PLA)

Exact (QM)Exact (QM)Heuristic

(espresso)Heuristic

(espresso)

Structural

(SIS)Structural

(SIS)

Functional

(AC, Kurtis)Functional

(AC, Kurtis)

Functional

(BDD-based)Functional

(BDD-based)

algebraic

Boolean

Boolean


Two-Level (PLA) vs. Multi-LevelTwo-Level (PLA) vs. Multi-Level

PLAPLA• control logic

• constrained layout, PLA

• highly automatic

• technology independent

• Minimize # product terms

Very predictable

Multi-level LogicMulti-level Logic• all logic

• standard cells, FPGAs

• automatic

• partially technology independent

• Minimize gates (~literals, transistors)

Hard to predict

E.g. Standard Cell LayoutE.g. Standard Cell Layout


Two-level Logic MinimizationTwo-level Logic Minimization

Representations:• Cubes (products of literals)• Sum of products (SOP)


Cube and SOP representationsCube and SOP representations

bc ac

abc

a

b

= on-set minterm (f = 1)= off-set minterm (f = 0)= don’t care-set minterm (f = x)

• A function can be represented by a sum of products (cubes):

f = ab + ac + bc• A set of cubes that represents function f is called a cover F of f.

• Two-level minimization seeks a minimum size cover (least number of cubes). Reason: minimize number of product terms in PLA


PLA’s - Multiple Output FunctionsPLA’s - Multiple Output Functions• A PLA is a function f : Bn Bm represented in SOP form:

f2 f3f1

n=3, m=3

a a b b c c

abc f1f2f3

10- 1 - -

-11 1 - -

0-0 - 1 -

111 - 1 1

00- - - 1

Personality Matrix

AND plane

OR plane


Two-level minimizationTwo-level minimization

Initial representation: x y z

0 – 0

0 1 –

– 1 1

1 – 1

f1 f2

0 1

0 1

1 0

1 0

xy

z

000 100

110010

111011

010

000 100

110010

111011

010

f1f2

101 101

f1 f2

000 100

110010

111011

010

000 100

110010

111011

010101 101

x y z

0 – 0

0 1 1

1 – 1

f1 f2

0 1

1 1

1 0

Minimized function:


Definitions: Irredundant CubesDefinitions: Irredundant Cubes

bc ac

abc

a

b

bc

ac

not covered,so ab is irredundant

F\{ab} f

• Definition 1: A cube ci F is irredundant if F\{ci} f

A cover is irredundant if all its cubes are irredundant.


Prime, EssentialPrime, Essential cubes and covers cubes and covers

• Definition 2: A cube is prime if it is not contained in any other cube. A cover is prime if all its cubes are prime.

• Definition 3: A prime of f is essential if there is a minterm in that prime that is in no other prime.

Example: f = abc + b’d + c’d is prime and irredundant.abc

bd

cdda

cb

abcdabcd’


Quine-McCluskey Procedure (Exact)Quine-McCluskey Procedure (Exact)

Q-M Procedure:

1. Generate all primes (f+d), call it {Pi}

2. Generate all minterms of (f+d), call it {mi}

3. Build a covering (prime implicant) matrix B, where

Bij = 1 if mi Pj

= 0 otherwise

4. Solve the minimum column covering problem for B (unate

covering problem), UCP.

Theorem (Quine): There is a minimum cover that is prime• Given initial cover for F = (f,d,r), find a minimum cover G of primes

where: f G f+d

G is a prime cover of F ; f = on-set, r = off-set, d = don’t care set


Covering table

dd

ddd

dd

dd

00

1

11

01xy xy xy xy

zw

zw

zw

zw

xz

y

w

F x yzw xyzw x yzw xyzw

D yz xyw x yzw x yw xyzw

(on set)

(don’t care set)

Primes: Primes: y’ + w + x’z’y’ + w + x’z’

ExampleExample

010

011

110

101y’ w x’z’

x y z’ w

x’ y z w

x’ y z’ w

x’ y’ z’ w’


Covering TableCovering Table

Recall:

An essential prime is any prime that uniquely covers a minterm of f.

Solution: {p1,p2} y + w is minimum prime cover. (Also w + xz)

Possible approach (SAT): (p1+p3)(p2 +p3)(p1+p2)p2 = 1

Min

term

s of

f y’ w x’z’

010

011

110

101

x y z’ w

x’ y z w

x’ y z’ w

x’ y’ z’ w’

Row singleton(essential minterm)

Essential prime

Primes of (f+d) ( p1 p2 p3 )


Table reduction - Table reduction - Column DominanceColumn Dominance

Definition:

A column P1 whose 1-entries are a superset of another column P2 is said to dominate P2.

Example:

P1 dominates P2

(it has 1 everywhere P2 has)

P1 P2

1 00 01 10 01 1

We can remove dominated column P2 since P1 covers all those rows and more. We would never choose P2 in a minimum cover since it can always be replaced by P1.


Row Dominance and equalityRow Dominance and equality

Definition:

A row m1 whose set of primes contains the set of primes of row m2 is said to dominate m2..

Example:m1 011110

m2 011010

m1 dominates m2 : it has 1 everywhere m2 has 1

Dominating row

We can remove dominating row m1: any prime that covers m2 also covers m1 (i.e., m1 is covered automatically with fewer primes).

Row Equality: • In practice, many rows are identical. That is there exist minterms that

are contained in the same set of primes.


Pruning the Covering TablePruning the Covering Table

1. Remove all rows covered by essential primes (columns in row singletons). Put these primes in the cover G.

2. Group identical rows together and remove dominating rows.

3. Remove dominated columns. For equal columns, keep one prime to represent them.

4. Newly formed row singletons define essential primes.

5. Go to 1 if covering table decreased.

• The resulting reduced covering table is called the cyclic core. • This has to be solved (unate covering problem). • A minimum solution is added to G (set of essential primes).• The resulting G is a minimum cover.


Quine-McCluskey Procedure: ExampleQuine-McCluskey Procedure: Example

0001110

0001101

0000110

0001011

0011100

0110000

1100001

1000000

01110

01101

00110

01011

11100

10000

34567

110

011

101

456111

110

011

101456

Cyclic Core

Essential primes +column dominance:

G = P1 + P3

Essential prime +column dominance

G = P1

Row dominance

1234567

Initial cover table:

[primes minterms]

Simplify the covering table and solve unate covering problem

Use branch and bound with bounding heuristics.


Generating Primes Generating Primes - single output func.- single output func.

Tabular method (based on consensus operation):

• Start with all minterm canonical form of F• Group pairs of adjacent minterms into

cubes • Repeat merging cubes until no more

merging possible; mark () + remove all covered cubes.

• Result: set of primes of f.

Example:

F = x’ y’ + w x y + x’ y z’ + w y’ z

w’ x’ y’ z’

w’ x’ y’ z w’ x’ y z’ w x’ y’ z’

w x’ y’ z w x’ y z’ w x y z’ w x y’ z w x y z

w’ x’ y’ w’ x’ z’ x’ y’ z’ x’ y’ z x’ y z’ w x’ y’ w x’ z’ w y’ z

w y z’

w x y

w x z

x’ y’

x’ z’

F = x’ y’ + w x y + x’ y z’ + w y’ z


Heuristic 2-level logic minimization (Heuristic 2-level logic minimization (espressoespresso))

Consider F(a,b,c) initially specified as:

f = {abc, abc, abc} (on-set), and d ={abc, abc} (don’t care set)

off

on

don’t care abc is redundanta is prime F3= a+abc

Expand abc bc

Expand abca

F2= a+abc + abc

F4= a+bc

F1= abc + abc+ abc

a

cb


Multi-level Logic MinimizationMulti-level Logic Minimization

Representations:• Boolean networks (structural)• Factored forms (algebraic)• Binary decision diagrams, BDD (functional)


General Multi-level Logic StructureGeneral Multi-level Logic Structure

• Combinational optimizationCombinational optimization– keep latches/registers at current positions, keep their functionkeep latches/registers at current positions, keep their function

– optimize combinational logic in betweenoptimize combinational logic in between

• Sequential optimizationSequential optimization– change latch position/function (retiming)change latch position/function (retiming)


Optimization Criteria for SynthesisOptimization Criteria for Synthesis

The optimization criteria for multi-level logic is to minimize some function of:

1. Area occupied by the logic gates and interconnect (approximated by literals = transistors in technology independent optimization)

2. Critical path delay of the longest path through the logic

3. Degree of testability of the circuit, measured in terms of the percentage of faults covered by a specified set of test vectors for an approximate fault model (e.g. single or multiple stuck-at faults)

4. Power consumed by the logic gates

5. Noise Immunity

6. Place-ability, Wire-ability

while simultaneously satisfying upper or lower bound constraints placed on these physical quantities


Network RepresentationNetwork Representation

Boolean network:• directed acyclic graph (DAG)• node logic function representation

fj(x,y)

• node variable yj: yj= fj(x,y)

• edge (i,j) if fj depends explicitly on yi

Inputs x = (x1, x2,…,xn )

Outputs z = (z1, z2,…,zp )

External don’t cares: d1(x), …, dp(x)


Boolean networkBoolean network

InputsOutputs

6

1

53

47

8

92

Internal nodes,

single-output functions

• Goal: minimize some measure of network complexity

- number of 2-input gates

- number of literals (variables), represe

• Eventually, the nodes have to be mapped to standard cells

(technology mapping)


Factored FormsFactored Forms

Definition 4: a factored form can be defined recursively by the following rules:

A factored form is either a product or sum where:• a product is either a single literal or a product of factored forms• a sum is either a single literal or a sum of factored forms

A factored form is a parenthesized algebraic expression.

product of (sums .. ) of products … , or a (sum ..) of products of sums …

Examples of factored forms:

x, y’, abc’, a+b’c, ((a’+b)cd+e)(a+b’)+e’

(a+b)’c is not a factored form since complementation is not allowed, except on literals.



• Factored forms are more compact representations of logic functions than the traditional sum of products form.

Example:

- factored form

(a+b)(c+d(e+f(g+h+i+j)

- equivalent SOP representation

ac+ade+adfg+adfh+adfi+adfj+bc+bde+bdfg+ bdfh+bdfi+bdfj

• Three equivalent factored forms (factored forms are not unique):

ab+c(a+b) bc+a(b+c) ac+b(a+c)



Example:

(ad+b’c)(c+d’(e+ac’))+(d+e)fgAdvantages• good representative of logic complexity (CMOS)• in many designs (e.g. complex gate CMOS) the implementation

of a function corresponds directly to its factored form• good estimator of logic implementation complexity• doesn’t blow up easily (unlike BDDs)

Disadvantages• not as many algorithms available for manipulation• hence often just convert into SOP before manipulation



Note:

literal count transistor count area

• however, area also depends on – wiring

– gate size etc.

• therefore very crude measure


Algebraic expressionsAlgebraic expressions

Definition 1: f is an algebraic expression if f is a set of cubes (SOP), such that no single cube contains another

Example:

a+ab is not an algebraic expression (factoring gives a(1+b) )

Definition 2: f g is an algebraic product if f and g are algebraic expressions and have disjoint support (that is, they have no input variables in common)

Example: (a+b)(c+d)=ac+ad+bc+bd is an algebraic

product

But:

(a+b)(c+d+a’)=ac+ad+bc+bd+a’b is not algebraic (a, a’)


Transformation-based SynthesisTransformation-based Synthesis

• All modern synthesis systems are build that way– set of transformations that change network topology

• work on uniform network representation– Transformations are mostly algebraic !

(very little is based on Boolean factorization – … till now)

• Transformations differ in:– the scope they are applied

• local scope versus global restructuring– the domain they optimize

• combinational versus sequential• timing versus area• technology independent versus technology dependent

– the underlying algorithms they use• BDD-based, SAT based, structure based


Manipulation of Boolean NetworksManipulation of Boolean Networks

Basic Techniques:• structural operations (change topology)

– Algebraic: ab + ac = a(b+c)– Boolean: a + bc = (a+b)(a+c)

• node simplification (change node functions)– don’t cares– node minimization

All algorithms used in today’s commercial synthesis tools use ALGEBRAIC techniques

– not as efficient as Boolean methods, but believed to be faster

(no longer true with BDD-based decomposition methods)


Structural Operations (algebraic)Structural Operations (algebraic)

Basic Operations:1. Decomposition (single function)

f = abc+abd+a’c’d’+b’c’d’

f = xy+x’y’, x = ab, y = c+d

2. Extraction (multiple functions) f = (az+bz’)cd+e g = (az+bz’)e’ h = cde

f = xy+e, g = xe’, h = ye, x = az+bz’, y = cd

3. Factoring (series-parallel decomposition)

f = ac+ad+bc+bd+e

f = (a+b)(c+d)+e


Structural Operations, cont’d.Structural Operations, cont’d.

4. Substitution

g = a+b f = ac+bc + d

f = gc+d

5. Collapsing (elimination)

f = ga+g’b g = c+d

f = ac+ad+bc’d’

Note: algebraic division plays a key role in all these algorithms:• given function f, find g, such that

f = g h, where support(g) support(h) =


Factoring vs. DecompositionFactoring vs. Decomposition

Factoring: f=(e+g’)(d(a+c)+a’b’c’)+b(a+c)

Decomposition: y(b+dx)+xb’y’,

where: x = a+c, y = e+g’

Tree

DAG


Functional DecompositionFunctional Decomposition(multi-level minimization)(multi-level minimization)

• Classical Asenhurst-Curtis decomposition• A-C decomposition using BDDs• BDD-based bi-decomposition


OverviewOverview

• The concept of functional decomposition• Two uses of BDDs for decomposition

– as a computation engine to implement algorithms– as a representation that helps finding decompositions

• Two ways to direct decomposition using BDDs– bound set on top (Lai/Pedram/Vardhula, DAC’93)– free set on top (Stanion/Sechen, DAC’95)– other approaches

• Disjoint and non-disjoint decomposition

• Applications of functional decomposition:– Multi-level FPGA synthesis– Finite state machine design– Machine learning and data mining


Two-LevelTwo-Level Curtis DecompositionCurtis Decomposition

if B A = , this is disjoint decomposition

if B A , this is non-disjoint decomposition

X

B = bound set A= free set

F(X) = H( G(B), A ), X = B A

F

G

HA

BF


Decomposition TypesDecomposition Types

Simple disjoint decomposition (Asenhurst)

FHA

GB

B

F

G

HA

Disjoint decomposition (Curtis)

Non-disjoint decomposition

F

G

H

A

B


Decomposition ChartDecomposition Chart

1 2 3 4

000010

101011

010101

111100

10110100

Bound Set = {a,b}

Free Set = {c,d}

3

1

4

2

Incompatibility Graph

=2

G

G

G

G

Definition 1: Column Compatibility

Two columns i and j are compatible if each element in i is equal to the corresponding element in j, or the element in either i or j is not specified

Definition 2: Column Multiplicity = the number of compatible sets (distinct column patterns)


Fundamental Decomposition TheoremsFundamental Decomposition Theorems

• Theorem (Asenhurst)Let k be the minimum number of compatible sets in the decomposition chart. Then function H must distinguish at least k values

• Theorem (Curtis)

Let (A | B) denote column multiplicity under decomposition into bound set B and free set A. Then:

(A | B) 2k F(B,A) = H(G1(B), G2(B), …, Gk(B), A)

FG

H

B

A

k


Asenhurst-Curtis DecompositionAsenhurst-Curtis Decomposition

F(a,b,c,d) = (ab+ ab)c'+ (ab+ ab)(cd+cd)

G(a,b)= ab+ab H(G,c,d) = Gc+ G(cd+cd)

1 2 3 4

000010

101011

010101

111100

10110100

Bound Set = {a,b}

Free Set = {c,d}

Here = 2, function H must

distinguish two values• need k=1 bit to encode inputs from G

FG

H

ab

cd


• Two-level decomposition is iteratively applied to new functions Hi and Gi, until smaller functions Gt and Ht are created, that are not further decomposable.

• One of the possible cost functions is Decomposed Function Cardinality (DFC). It is the total cost of all blocks, where the cost of a binary block with n inputs and m outputs is m * 2n.

Multi-Level Curtis DecompositionMulti-Level Curtis Decomposition


Typical Decomposition AlgorithmTypical Decomposition Algorithm

• Find a set of partitions (Bi, Ai) of input variables X into bound set variables Bi and free set variables Ai

• For each partition, find decompositionF(X) = Hi (Gi(Bi ), Ai )

such that the column multiplicity is minimal, and compute DFC (disjoint function cardinality).

• Repeat the process for all partitions until the decomposition with minimum DFC is found.


AC decomposition (Function AC decomposition (Function GG))

G={g0,g1}, A=g0g1, B=g0g1, C=g0g1

g0=abc+abc+abc, g1 = abc+ abc

A=00 C=01

B=10

Bound Set

Free Set

A A AB BB CC

= 1

= 0

0 1


AC decomposition (Function AC decomposition (Function HH))

A A AB BB CC

F(a,b,c,d,e) = H( g1(a,b,c), g2(a,b,c), d, e )

H=g0g1e + g0g1d + g0g1e

F

A=00 C=01

B=10

Bound Set

Free Set

= 1

= 0

0 1


AC decomposition AlgorithmAC decomposition Algorithm

• Reorder variables in BDD for F and check column multiplicity for each bound set

• For the bound set with the smallest column multiplicity, perform decomposition :– Encode the cut nodes with minimum number of bits (log )

– derive functions G and H (both depend on encoding)

• Iteratively repeat the process for functions G and H (typically, only H)

This is an ALGEBRAIC decomposition• The algorithm work only for disjoint decompositions: the

variables in the bound set and the free set are disjoint !


Binary Decision Diagram (BDD)Binary Decision Diagram (BDD)

f = ab+a’c+a’bd

1

0

c

a

b b

c c

d

0 1

c+bd b

root node

c+d

d

Graph representation of a Boolean function - vertices represent decision nodes for variables

- two children represent the two subfunctions

f(x = 0) and f(x = 1) (cofactors)

- restrictions on ordering and reduction rules

can make a BDD representation canonical

intro to logic synthesis 1 introduction to logic synthesis maciej ciesielski [email protected]...

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