Introduction to

Microcontrollers

ECE Senior Design

15 September 2015

Popular Microcontrollers

• 8051 – Intel then Everyone (8-bit)

• PIC – Microchip (8, 16 & 32bit)

• AVR – Atmel (8 & 32bit)

• MSP430 – TI (low power 16-bit)

• ARM Cortex – ARM Limited (32 bit)

• 68HCSxx – Motorola / freescale

• PSoC – Cypress (M8C, 8051,ARM)

• Nios II / MicroBlaze – Altera / Xilinx

Microcontroller Application

Requirements

• Microcontroller and Support Circuitry

• Power Supply

• Application Software

• User Input/Output and Device Interfaces

Features found in Microcontrollers

• Central Processor (8, 16 or 32bit)

• Reset Control (Power-on, Brown out, Watchdog, Stack Overflow)

• Internal Oscillators and PLLs (2-Speed CLK, RTC)

• Program Memory (Factory Mask, OTP, EPROM, Flash)

• Static RAM Memory (Volatile Data Storage)

• EEPROM Memory (Non-Volatile User Configuration / Calibration)

• GPIO Pins

• Timers

• Interrupts (Internal, External)

• Parallel Bus Interfaces

• Serial Interfaces (UART, I2C, SPI, USB)

• Analog input and output (ADC, DAC, PWM, Comp, Op Amp, Cap Sense)

• Power Management

• In-Circuit Programming and Debug (self reprogramming)

Harvard vs. Von Neumann

Harvard architecture

• Separate busses for program

memory and data memory

• Improved operating bandwidth

• Allows for different bus widths

• Used in many microcontrollers

Von Neumann architecture

• Program and data stored in same

memory

• Used in many microprocessors

Von Neumann

Architecture

8-bit

Bus

CPU

Program

& Data

Memory

CPU

Harvard

Architecture

Data

Memory

Program

Memory

8-bit

Bus

14-bit

Bus

RISC vs. CISC

RISC – Reduced Instruction Set Computer

• Emphasis on Software

• Most instructions execute in a single clock cycle

• Larger code sizes

CISC – Complex Instruction Set Computer

• Emphasis on Hardware

• Instructions require multiple clock cycles

• Smaller code size

What the does PIC stand for anyway?

PIC – “Peripheral Interface Controller”

The original PIC was

designed to be a

Peripheral Interface

Controller for 6502

microcontroller from

Rockwell late 70's.

Why did we choose Microchip

PIC Family of Microcontrollers?

• Free development software MPLAB IDE (Includes a Simulator)

• Low cost development hardware

• Devices are easy to obtain through distributors and can be sampled

• A wide range of devices are available with varying feature sets

• Microchip is in continuous development of new PIC devices

• Has a large online support community

• Wide acceptance in industry over 12 Billion units shipped

Enhanced Midrange PIC Busses

(PIC12F1822)

CPU

Program

Memory

Data Memory

and

Special Function

Registers

Data

8

12

14

15

RegisterAddress

Instruction

ProgramAddress

15-bit Program Address bus:capable of addressing 32k of program

memory (PIC12F1822 has 2k of program

memory)

14-bit Instruction bus:contains the opcode and the operands

8-bit Register Address:PIC12F1822

128 Bytes of SRAM

256 Bytes EEPROM

8-bit Data bus:

read and write registers

Datasheet Feature Page 12F1822

• Datasheet PIC12F1822

• Processor Structure of the PIC12F1822

• Device Pins for the PIC12F1822

Microcontroller Block Diagram

I/0 Pins• Up to 6 GPIO Pins on PIC12F1822 (1 input only)

• The Pin Direction is Set with the TRISA Register

• Reading and Writing to the Port is handled in the PORTA

LATA Registers

RA0

AN0

DACOUT

CPS0

C1IN+

P1B

TX

SDO

ICSPDAT

RA1

AN1

VREF

CPS1

C1IN0-

SRI

RX

SCL

ICSPCLK

RA2

AN2

CPS2

C1OUT

T0CLKI

CCP1

INT

IOC

WPU

RA3

T1G

nSS

IOC

nMCLR

VPP

RA4

AN3

CPS3

C1IN1-

T1OSO

P1B

CK

SDO

IOC

RA5

SRNQ

T1CLKI

CCP1

RX

IOC

WPU

CLKIN

Generic Port Structure

TRISIA Register

LATA Register

PORTA Register

Lighting an LED

Program Memory

Map and Stack

• Reset Vector - 0000h

• Interrupt Vector - 0004h

• Program Memory - 2048

• Stack Depth - 16

Data Memory (32 Banks total)

The “W” Register (working register) movf reg1, w ; Move a file registers contents into the W register

addwf reg2, w ; Place result in W register

Program

Memory

Instruction

Register

Instruction

Decode

and

Control

Program Counter

File

Registers

W Register

ALU

Data Bus8Direct Addr.

7

13

Program Address

14Instruction

8

The Status Register

Program

Memory

Instruction

Register

Instruction

Decode

and

Control

Program Counter

File

Registers

W Register

ALU

Data Bus8Direct Addr.

7

13

Program Address

14Instruction

8

Status

Register

3result

The Status bits

• Arithmetic Status of the ALU

• Reset Status WDT and PD

Pipelining of Instructions

• Most instructions Execute in a single Processor Cycle

• A Processor Cycle is 4 Clock Cycles

• Using a 4MHz oscillator each processor cycle is 1MHz

• This results in a 1us execution time

Non-Sequential Address Read

• Exception to the one processor cycle per instruction is for

Branching operations

• The Pipeline will be broken on a non-sequential address

read

• Branching instructions require two processor cycles to

execute

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch

T0

Instruction Cycles

movlw 0x05 -

Pre-Fetched Instruction Executing Instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0 T1

Instruction Cycles

Fetch

movwf REG1 movlw 0x05

Pre-Fetched Instruction Executing Instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0 T1 T2

Instruction Cycles

Fetch Execute

Fetch

call SUB1 movwf REG1

Pre-Fetched Instruction Executing Instruction

Time to execute normal instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0 T1 T2 T3

Instruction Cycles

Fetch Execute

Fetch Execute

Fetch

addwf REG2 call SUB1

Pre-Fetched Instruction Executing Instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0

Flush

T1 T2 T3 T4

Instruction Cycles

Fetch Execute

Fetch Execute

Fetch

Fetch

movf PORTB,w call SUB1

Pre-Fetched Instruction Executing Instruction

Time to execute call

instruction includes

pipeline flush

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0

Flush

T1 T2 T3 T4 T5

Instruction Cycles

Fetch Execute

Fetch Execute

Fetch

Fetch Execute

Fetch

return movf PORTB,w

Pre-Fetched Instruction Executing Instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0

Flush

T1 T2 T3 T4 T5

Instruction Cycles

T6

Fetch Execute

Fetch Execute

Fetch

Fetch Execute

Fetch Execute

Fetch

movf PORTC,w return

Pre-Fetched Instruction Executing Instruction

Instruction Pipelining

call SUB1

addwf REG2

movf PORTB,w

return

movf PORTC,w

return

SUB1

SUB2

movlw 0x05MAIN

movwf REG1

1

2

3

4

51

52

53

54

Example ProgramFetch Execute

T0

Flush

T1 T2 T3 T4 T5

Instruction Cycles

T6

Fetch Execute

Fetch Execute

Fetch

Fetch Execute

Fetch Execute

Fetch Flush

Fetch

T7

addwf REG2 return

Pre-Fetched Instruction Executing Instruction

Blinking an LED

(loop method)

Initialize

Main

Call Count_Time

Call Toggle_LED

Goto Main

Count_Time

return

Kill some time

Looping in here

ToggleLED

return

Change state

of LED