1

Investigating the Electronic Behavior of Nano-materials –

From Charge Transport Properties to System Response

Amit Verma

Assistant Professor

Department of Electrical Engineering & Computer Science

Texas A&M &University – Kingsville

2

Current State of Si Technology

► Semiconductor industry currently routinely fabricates devices with sizes in the 10’s of nanometers

► Intel has come up with a device size that is 32 nm long, i.e., the active area of the device. A chip now can contain up to 2 billion transistors

►Active research continues to bring the 22 nm technology to the market in a few years

3

Current State of Si Technology

►This continued advancement meets and exceeds Moore’s Law

►Moore’s Law: The number of transistors on a chip will double about every two years

►However there are many problems over the horizon

4

Current State of Si Technology

►Continued scaling has brought many problems to the forefront

►Si devices at that small scale demonstrate a significantly reduced charge carrier mobility, resulting in lower device speeds

►Devices at that small scale also behave erratically in terms of their current-voltage relationship

5

Current State of Si Technology

► Some of these problems have been overcome by clever design

►Using SiGe in stead of Si increases device speeds

►Different device topologies, for example a gate-all-around structure result in better electrostatic control

►At the circuit level, using 3-D circuit topology, or system-on-a-chip, or multi-core technologies improves performance

6

State of Semiconductor Technology

►Moore’s Law, however, has become a historical and economical impetus

►Device sizes will continue to shrink

►This has led to an enormous interest in small diameter ( < 5 nm) nanowires and nanotubes, such as carbon nanotubes (CNTs) and silicon nanowires (SiNWs)

7

What are CNTs?

►Mono-atomic tubes of “honey-comb” lattice of carbon

►Diameter of tubes in the range of nanometers

►Multi-wall or single wall

►Hold excellent mechanical and electrical properties

Multi-wall Carbon Nanotube [1]

8

What are SiNWs ?

►Within the context of our presentation they are small diameter structures

► Figure shows cross-section and side view of a typical free-standing SiNW where Si atoms on the surface are terminated with H atoms

9

Why Nano-materials

► Promise of significantly improved electrical properties

► Such small scales also promise improved performance in other applications

- Nano- bio or chemical sensors

- Nano-scale antennas

- Nano-optoelectronics and solar power harvesting

SourceDrain

Nano-material

Oxide

Gate

Target molecule

An example of detection through

conductance modulation – channel

conductance changes if a molecule

attaches to the material

10

An important point to highlight before proceeding further

►When it comes to small cross-section nano-materials – whether CNTs or SiNWs, or any other – we are essentially dealing with classes of materials

►Each individual member has a potentiallydifferent electronic response depending on the physical structure

11

Current Research

►My current research on nano-materials focuses on a few broad areas:

- Charge transport modeling of nanowires and nanotubes

- Modeling of the current-voltage response of nano-devices, and circuit response of those devices

- Development of antennas from nano-materials

- Solar power harvesting using carbon nanotubes

12

Carrier-phonon interactionBroad approach so far:

• Determine the electronic band structure of nanowires and nanotubes

using the quantum mechanical tight-binging method

• Couple tight binding approach for electrons and holes with

continuum approach for phonons

• This allows us to treat holes and electrons with the full quantum

mechanical tight binding wave functions

• Scattering between multiple subbands is included

13

Carrier transport► Once carrier-phonon

scattering rates are determined, both low- and high-field carrier transport can be investigated

► For CNTs, low-field mobility obtained from Rode’s method

► For SiNWs we use momentum relaxation time approximation

► High-field transport investigated using ensemble Monte Carlo simulations

i

i

i

ii

n

n

BZ

zz

BZ

zzzizi

effB

i

st

st

dkkf

dkkfkWkE

Tmk

e

1

0

1

0

1

)(

)()()(2

i – subband index

► Wi – Scattering rate

► Ei – Energy

► meff – Effective mass

► fo – Equilibrium distribution function

14

Carrier transport – low-field

► Diameter dependence of low-field mobility at various temperatures for CNTs

► ‘n’ here represents the chirality and is a measure of the diameter

► Larger diameter CNTs show very high low-field mobility

► Using this approach for semiconducting CNTs, mobility has been found to be ~ independent of chiralityand dependent on diameter [4] (important implication for fabrication!)

15

Carrier transport – low-field

► Room temperature electron and hole low-field mobility for [110] axially aligned SiNWs for different diameters

► For some of the SiNWs, hole mobility is greater than bulk Si hole mobility

► Hole mobility is also comparable to electron mobility

SiNW

diameter

Hole

mobility

Electron

mobility

1.27 nm 221 309

1.93 nm 309 574

2.40 nm 865 834

3.10 nm 665 1037

Room temperature low-field electron and

hole mobility (in cm2/V-s)

16

Modeling of Devices and Circuits

►Modeling of devices and larger circuits at the nanoscale also requires a paradigm shift.

►Device modeling involves solving the device electrostatics (Poisson equation) along with the charge carrier transport equations, usually self-consistently

►Circuit modeling generally involves SPICE modeling, where standardized device parameters are used, which are difficult to change

17

Device Modeling

►At the ultra-small scale, charge carrier transport is usually 1-D

►However the Poisson equation is 3-D, making it difficult to solve these equations self-consistently

►We have proposed a new method to overcome this problem – Solve the Gauss Law in integral form instead of Poisson equation

areatotalQsdD

.

18

Device Modeling - example

3.1 nm diameter [110] axially alignedcylindrical intrinsic SiNW. It consistsof an intrinsic SiNW, surrounded by450 nm SiO2 as the insulator, in turnsurrounded by Al as the gateelectrode. The source and draincontacts are assumed to be ideal

Ohmic.

Drain current versus gate-source voltage

for a 5 μm long channel SiNW FET.

Inset: Drain current versus drain-source

voltage. Gate voltage is with respect to

the Al-Si work function difference

The new proposed method has shown excellent promise so far. It is currently being extended to smaller structures to determine the limitations.

Drain current versus gate-source

voltage for a 10 μm channel

SiNW gate-all-around FET.

Inset: Drain current versus

drain-source voltage. Gate

voltage is with respect to the Al-

Si work function

19

Circuit Modeling

Simplified distributed parameter

representation of the SiNW GAA

FETOutput current versus

time for the GAA

SiNWFET for 5 μm long

SiNW channel FET

(above), and for 10 μm

long SiNW channel FET

(below). Inset to above:

The input voltage signal.

a

b

Modeling circuits involving nanoscale devices also requires a new approach, and development of new tools for use by the industry.

Given the plethora of material physical structure and device geometry possible, we have proposed that circuit modeling at the nanoscale requires a close coupling of device and circuit simulations.

Device simulations, in this scenario, are inputs to the circuit simulations.

20

Antenna Design

A new class of microwave antennas has recently been developed where the radiating patch is composed entirely of nanomaterials

It is expected that this new antenna design will have far reaching implications for integrated circuit chip design, as well as other specialized applications

21

Antenna Design►The antenna utilizes an

aperture coupled (or contactless) electromagnetic energy feeding mechanism

►This overcomes the need to make electrical contacts to the active patch, which can now be composed entirely of nanomaterials.

Three resonance peaks with frequencies of 8.9 GHz, 14 GHz, and 14.7 GHz, respectively, obtained from simulation results

22

Antenna Design

Final assembled view of the Fe patch thin-film antenna. Left: Top view. Right: Bottom view

Top view and bottom view of a CNT patch

antenna

Scanning Electron Microscopy view of

the CNTs grown as the patch of the

microstrip antenna. Left: Low resolution

image, and Right: High resolution image

of the CNT patch.

23

Antenna Design► Response of the CNT patch

antenna (top), and Fe nano-film patch antenna (bottom)

► CNT patch antenna shows resonance peaks lower in frequency (The three resonance peaks occur at 8.37 GHz, 10.05 GHz, and 11.36 GHz.), demonstrating potential for antenna miniaturization

► Fe antenna shows ultra-wide band response. This provides it with the potential to carry higher data rate with lower power and reduced interference than 802.11 Wi-Fi networks or first-generation Bluetooth products

12 13 14 15 16 17 18-65

-60

-55

-50

-45

GHz

Mag

nitu

de o

f S21 (

dB)

24

Conclusions

The field of nano-materials is still evolving, with many challenges and yet to be discovered potential

It is certain that small cross-section nano-materials – nanowires or nanotubes – will dominate the semiconductor industry in the future

Whether that future is near or distant depends on how fast we can address those challenges

Thank You !!