218 • 2010 IEEE International Solid-State Circuits Conference

ISSCC 2010 / SESSION 11 / RADAR, mm-WAVE, & LOW-POWER TRANSCEIVERS / 11.3

11.3 A SiGe BiCMOS 16-Element Phased-ArrayTransmitter for 60GHz Communications

Alberto Valdes-Garcia1, Sean Nicolson2, Jie-Wei Lai3, Arun Natarajan1,Ping-Yu Chen3, Scott Reynolds1, Jing-Hong Conan Zhan3, Brian Floyd1

1IBM T. J. Watson, Yorktown Heights, NY 2MediaTek, San Jose, CA 3MediaTek, Hsinchu, Taiwan

The demonstration of multi-Gb/s links in the 60GHz band has created newopportunities for wireless communications [1,2]. Due to the directional nature ofmillimeter-wave (mm-Wave) propagation, beam steering enables longer-rangenon-line-of-sight (NLOS) links at these frequencies. A phased-array architectureis attractive for an integrated 60GHz transmitter (Tx) since it can attain bothbeam steering and higher EIRP through spatial combining. An all-RF 16-element40-to-45GHz Tx for satellite applications [3], a 6-element 60GHz Tx with IF-pathphase-shift [4], and a bi-directional 4-element 60GHz Tx/Rx with RF phaseshifters [5] have been recently demonstrated in silicon. This work presents afully-integrated phased-array Tx which supports multi-Gb/s NLOS IEEE802.15.3c links. In addition to beamsteering, the IC has the following major fea-tures: an on-chip power sensor at each element, 3 temperature sensors, LO leak-age and I/Q phase and amplitude adjustment, front-end OP1dB programmability,and an integrated modulator for pi/2-BPSK/MSK signaling (common mode in802.15.3c). The IC integrates 2240 NPNs, 323,000 FETs and hundreds of trans-mission lines and is fabricated in the IBM 8HP 0.12µm SiGe BiCMOS process (fT = 200GHz).

The array system architecture is depicted in Fig. 11.3.1. All of the signal pathsare differential. The up conversion chain follows the sliding-IF superheterodynearchitecture presented in [2], which includes a frequency synthesizer and a multimode modulator. It further integrates a baseband attenuator programmable insteps of 6dB for both I and Q branches simultaneously, and in steps of 1dB inde-pendently in each branch for I/Q amplitude calibration. This combined with an IF-VGA having 20dB of gain in steps of 1dB allows for an overall programmablegain range of 40 dB. A buffer is inserted after the first up conversion to enablean IF loop-back connection with a receiver for I/Q calibration purposes. The dig-ital core of the Tx features a serial/parallel I/O interface, from which all IC fea-tures can be controlled/monitored.

A key challenge in the implementation of the phased-array Tx is the distributionof signal power to individual elements. An area- and power-efficient solution thatuses a combination of active and passive power dividers is shown in Fig. 11.3.2.The passive power division is implemented using a differential modified-Gyselcombiner that reduces combining area, signal routing length, and therefore,routing loss [6]. The active distribution amplifier consists of an input differentialpair and two separate cascode pairs that evenly split the output current into twobranches. Each 1:4 power distribution unit employs an area of 0.8mm2, draws12mA from a 2.6V supply, and has a single-path gain of 4dB.

Each phased-array element consists of a balanced phase shifter and a differen-tial, variable-gain, 3-stage amplifier chain. A simplified block diagram is shownin Fig. 11.3.1. The balanced voltage-controlled phase shifter consists of two sin-gle-ended reflection-type phase shifters (RTPS) and has a measured differentialphase shift range >200º from 58GHz to 65GHz with insertion loss varying from5.5dB to 9.5dB. To attain >360º phase shift range, a 180º discrete phase shift isimplemented in the first stage of the front-end amplifier. Moreover, by adjustingits bias current, this stage achieves 12dB of programmable gain which is suffi-cient to equalize output power variations due to the RTPS, frequency response,and mismatch between individual Tx elements. The RF front-end attains a meas-ured equalized S21 of 22dB with -3dB BW > 10GHz and S11<-10dB across allphase settings. Phase shift and element gain are each digitally controlled, and 32pre-programmed combinations of phase and gain (for a given beam direction)are stored in a local memory array in each of the 16 front-ends. This allows theIC to be rapidly pointed to a specified beam direction by using the parallel digi-tal interface. The RF front-end has wide-range output power programmabilitythrough 4 bits of bias control in the final PA, which employs a cascode topolo-

gy. A stand-alone single-element breakout has a measured 60GHz OP1dB that canvary from +3dBm to +15dBm with a nearly constant peak PAE of 9%.

The Tx has been fully characterized on-wafer. The output power from an individ-ual element is measured, for CW input, for different phase (and correspondinggain) settings. This experiment is repeated across 7 adjacent elements. Theresulting polar plot in Fig. 11.3.3 indicates that the output power variation across360º of phase and adjacent elements can be limited to +/-1dB. Two adjacent ele-ments are then probed simultaneously and their outputs are summed in anexternal output combiner. The phase of one element is swept 360º while keepingthe other constant and the aggregated output power is measured. This proce-dure is repeated for 7 different pairs of elements on the right side of the IC andthe results are shown in Fig. 11.3.3 (the output power is normalized to the out-put power from a single element). In all cases the output signals combine witha peak-to-null ratio >25dB across elements, demonstrating good phase shiftingand amplitude match performance.

The measured OP1dB for each of the four frequency channels across PA bias set-tings is shown in Fig. 11.3.4. Under nominal bias conditions (60mA per front-end, 3.8W total power), the single-element OP1dB in CH 2 is 9dBm, correspon-ding to a 16-element total generated power of 21dBm and allowing for an EIRPof 33dBm under ideal spatial power combining excluding unit antenna gain. Withincreased PA bias conditions (120mA per front-end, 6.2W total array power) theOP1dB per element and total generated power increase to 13.5dBm and 25.5dBm,respectively. The OP1dB has a measured variation of +/-0.25dB across differentphase settings and adjacent elements.

Full-chain operation is demonstrated by applying a 1.6Gb/s OFDM signal (MCS2transmit mode in 802.15.3c) to the IC using an external AWG. As seen in Fig.11.3.4, the resultant output spectrum has low out-of-band spectral re-growthmeeting linearity requirements. As described in Fig. 11.3.5, the Tx performanceis also evaluated at an elevated temperature of 65ºC to emulate operation inpackage. An increased power consumption at a higher temperature is due to theuse of temperature-adaptive biasing in the front-ends.

Evaluation boards with packaged Tx ICs including antennas have also been built.Figure 11.3.6 shows 16-element radiation patterns measured in an antennachamber. The measurement is compared against the expected radiation patternfrom an ideal 16-element array. Finally, Fig. 11.3.7 depicts the die photo illustrat-ing the placement of the different system components.

Acknowledgement: The authors acknowledge J. Zhang, Y. Kim, M.-D. Tsai, H.-H. Chen, S. Chan, R.Anonuevo, L.-P. Loh, and D. Lee of MediaTek, and S. Dhawan, B. Parker, D. Liu,D. Kam, D. Beisser, S. Gowda, and M. Soyuer of IBM for their contributions tothis work.

References:[1] S. Reynolds, A. Valdes-Garcia, B. Floyd, B. Gaucher, D. Liu, and N. Hivik,“Second generation transceiver chipset supporting multiple modulations at Gb/sdata rates”, IEEE BCTM, pp. 192-197, October 2007.[2] J. M. Gilbert, C. H. Doan, S. Emami, and C. Bernard Shung, “A 4-Gbpsuncompressed wireless HD A/V transceiver chipset”, IEEE Micro, pp. 56-64,March-April 2008. [3] K.-J. Koh, J. W. May, and G. M. Rebeiz, “A millimeter-wave (40-45 GHz) 16-element phased-array transmitter in 0.18-µm SiGe BiCMOS technology”, IEEE J.Solid-State Circuits, Vol. 44, No. 5, pp. 1498-1509, May 2009.[4] S. Kishimoto, N. Orihashi, Y. Hamada, M. Ito, and K. Maruhashi, “A 60-GHzband CMOS phased array transmitter utilizing compact baseband phaseshifters”, IEEE RFIC, pp. 215-218, June 2009.[5] E. Cohen, C. Jakobson, S. Ravid, and D. Ritter, “A bidirectional Tx/Rx fourelement phased-array at 60-GHz with RF-IF conversion block in 90nm process”,IEEE RFIC, pp. 207-210, June 2009.[6] A. Natarajan, B. Floyd, A. Valdes-Garcia, S. Reynolds, and M. Soyuer, “A dif-ferential power combiner with common mode rejection and frequency filtering”,US patent application filed.

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Figure 11.3.1: Block diagram of the 16-element phased-array transmitter system.

Figure 11.3.2: One-to-sixteen power-distribution tree architecture includingsimplified circuit schematic of the distribution amplifier and microphotographof the final one-to-four distribution section.

Figure 11.3.3: Two-element phase shifting measurements for multiple elements, showing equalized gain over phase shifter settings for each element, as well as the power-combined response with one element sweptwhile the other is held constant.

Figure 11.3.5: Summary of phased-array Tx performance over the four IEEEstandard channels at 25°C and 65°C. Measured by wafer probing.

Figure 11.3.6: Normalized 16-element transmitted radiation pattern for 0° and30°. Measured in an antenna chamber from a packaged Tx IC.

Figure 11.3.4: Measured transmitter output spectrum when applying a 1.6Gb/sOFDM signal (MCS2 802.15.3c transmit mode) and measured oP1dB for eachof the four frequency channels across PA bias settings.

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Figure 11.3.7: Chip photo, 6.5 x 6.75 mm2 die size.