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CMOS Bandgap References and Temperature

Sensors and Their Applications

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CMOS Bandgap References and Temperature

Sensors and Their Applications

PROEFSCHRIFT

ter verkrijging van de graad van doctor

aan de Technische Universiteit Delft,

op gezag van de Rector Magnificus Prof. dr. ir. J. T. Fokkema,

voorzitter van het College voor Promoties,

in het openbaar te verdedigen

op dinsdag 11 januari 2005 om 10:30 uur

door

Guijie WANG

Master of Science in Electronics, Nankai University, China,

geboren te Henan, China

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Dit proefschrift is goedgekeurd door de promotors:

Prof. dr. ir. G.C.M. Meijer

Prof. dr. ir. A.H.M. van Roermund

Samenstelling promotiecommissie:

Rector Magnificus, voorzitter

Prof. dr. ir. G.C.M. Meijer Technische Universiteit Delft, promotor

Prof. dr. ir. A.H.M. van Roermund, Technische Universiteit Eindhoven, promotor

Prof. dr. ir. J.R. Long, Technische Universiteit Delft

Prof. dr. ir. J.H. Huijsing, Technische Universiteit Delft

Prof. dr. ir. J.W. Slotboom, Technische Universiteit Delft

Prof. ir. A.J.M. van Tuijl, Philips Research Laboratory

Dr. ir. H. Casier, AMI Semiconductor Belgium

Prof. dr. P.J. French, Technische Universiteit Delft, reservelid

Published and distributed by: Optima Grafische Communicatie

Pearl Buckplaats 37

Postbus 84115, 3009 CC, Rotterdam

Phone: +31 10 220 11 49

Fax: +31 10 456 63 54

ISBN: 90-9018727-8

Keywords: CMOS technology, substrate bipolar transistors, temperature sensor, bandgap

reference, voltage-to-period converter, three signal auto-calibration, dynamic element

matching.

Copyright © 2004 by Guijie Wang

All right reserved. No part of the material protected by this copyright notice may be

reproduced or utilized in any form or by means, electronic or mechanical, including

photocopying, recording, or by any information storage and retrieval system, withoutwritten permission from the publisher: Optima Grafische Communicatie.

Printed in The Netherlands

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For Xiujun

For my children

For my parents

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Contents

1 Introductions 1

1.1

Silicon temperature sensors and bandgap references 11.2 Why CMOS technology 1

1.3 Statement of the problems 2

1.4

The objectives of the project 3

1.5 The outline of the thesis 3

References 5

2 Bipolar components in CMOS technology 7 2.1 Introduction 7

2.2

Basic theory of bipolar transistors 7

2.2.1 Ideal case 7

2.2.2

Low-level injection 102.2.3 High-level injection 11

2.2.4 The temperature-sensor signals and the bandgap-reference signals 11

2.2.5

Calibration of bandgap-references and temperature sensors 13

2.3 Bipolar transistors in CMOS technology 15

2.3.1 Lateral transistor 15

2.3.2 Vertical substrate transistor 16

2.3.3 Comparison of two types of the bipolar transistors 17

2.4

Conclusions 18

References 19

3

Temperature characterization 21 3.1 Introduction 21

3.2 Measurement set-ups 21

3.3 Parameter characterizations 23

3.3.1 The saturation current I S 24

3.3.2

The knee current I KF 24

3.3.3

Parameters V go and η 25

3.3.4

Effective emission coefficient m 28

3.3.5 Forward current gain BF 30

3.3.6 Base resistances RB 32

3.4

Effects affecting the accuracy of V BE( I C,T ) and ∆V BE( I C,T ) 353.4.1 Base resistances RB 35

3.4.2

Forward current gain BF 36

3.4.3 Effective emission coefficient m 38

3.4.4

High-level injection effect 39

3.4.5 Low-level injection effect 39

3.4.6 Thermal effects 40

3.4.7

Freeze-out effect 42

3.4.8 Piezo-junction effect 43

VII

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3.5 Conclusions 45

References 48

4 Advanced techniques in circuit design 49

4.1

Introduction 494.2 Three-signal technique 51

4.3 Modulators 51

4.3.1 Selection of modulator 52

4.3.2 Voltage-to-period converter 54

4.4

Chopping technique 59

4.5 DEM techniques 63

4.5.1 DEM amplification of small voltage signals 63

4.5.2 DEM division of large voltage signals 67

4.5.3 DEM biasing for PTAT circuit 70

4.6

Remaining problems 72

4.6.1

Non-linearity 724.6.2 Noise 81

4.7 Conclusion 84

References 85

5 Architecture considerations 87 5.1 Introduction 87

5.2

Thermal design considerations 87

5.3 Considerations for the electrical system design 89

5.4 The measurement requirements 92

5.4.1

Accuracy of bandgap-reference voltage 925.4.2 Accuracy of the measurement of the reference-junction

temperature 93

5.4.3 Linearity and the noise of the voltage-to-period converter 93

5.5 The input configuration 93

5.6

Configurations considering the bipolar transistors 96

5.6.1 Configuration using multi-bipolar transistors 96

5.6.2 Configuration using a single bipolar transistor 97

5.6.3 Comparison of the two configurations 98

5.7 Conclusions 98

References 100

6 Smart thermocouple interface 1016.1

Introduction 101

6.2 Circuit design 101

6.2.1 The generation of the basic signals 101

6.2.2 Bias current for the bipolar transistors 103

6.2.3 Voltage-to-period converter 104

6.2.4

Design of the integrator op-amp 107

6.2.5 Integration current source 108

6.2.6 Division of base-emitter voltage 110

6.2.7 The complete circuit 112

VIII

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6.3 Non-linearity 112

6.4

Noise analysis 113

6.4.1 Noise of the voltage-to-period converter 113

6.4.2 Noise of the bipolar transistors 115

6.5 Measurement results 116

6.5.1

The whole chip design 1166.5.2

Accuracy of the voltage divider 117

6.5.3 Base-emitter voltage and ∆V BE 118

6.5.4

On-chip bandgap-reference voltage 120

6.5.5 High-order correction for the bandgap-reference voltage 122

6.5.6 The complete system 123

6.5.7 On-chip temperature sensor 124

6.5.8 The noise performance 125

6.5.9

The residual offset 126

6.5.10 Summery of the performances of the interface 127

6.6 Conclusions 127

References 129

7 Switched-capacitor instrumentation amplifier with dynamic-element-

matching feedback 131 7.1 Introduction 131

7.2 Circuit design 131

7.2.1

The DEM SC instrumentation amplifier 131

7.2.2 The complete circuit 132

7.3 Non-idealities of the DEM SC amplifier 133

7.3.1 Finite open-loop gain 133

7.3.2

Leakage current at the inverting input of the op-amp 1347.3.3

Switch-charge injection 135

7.3.4 Noise of the DEM SC amplifier 136

7.4 Experimental results 138

7.5 Conclusions 140

References 141

8 Conclusions 143

9 Summery 147

Samenvatting 153

Acknowledgement 159

List of publications 161

Biography 163

IX

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1. Introduction

1

Chapter 1 Introduction

1.1 Silicon Temperature Sensors and Bandgap References

Silicon temperature sensors and bandgap references have been developed for a long time,

together with the development of semiconductor industry. The semiconductor temperature

sensors take a large part of the temperature-sensors market. There are several types of

semiconductor temperature sensors: thermistors, which use the resistive properties of asemiconductor composite (consisting of different types of metal) to measure temperature;

semiconductor thermocouples, which use a very large Seebeck effect to measure temperature

differences; and temperature sensors based on diodes or transistors, which use the temperature

characteristics of junctions. Thermistors need specific fabrication processes. As single sensing

elements, thermistors and silicon thermocouples are widely used in the industry for measuring

temperature and temperature difference, but they need extra interface circuitry for signal

processing and data display. For users, it is much easier to have temperature sensors

employing the temperature characteristics of junctions integrated with the interface circuit on

the same chip. Because the junctions are part of the basic components of the integrated circuit,

no effort is needed for process compatibility. In such smart temperature sensors, the

temperature behaviour of the junction characteristics is applied to generate the basic sensor

signal.

Presently, the most frequently used semiconductor materials are silicon (Si), germanium (Ge)

and gallium arsenide (GaAs). Compared to Ge and GaAs, silicon has many advantages.

Firstly, silicon is one of the most abundant elements on earth. Secondly, as a good isolator,

SiO2 is used as carrier for the interconnecting metallization and ensures excellent passivation

of the surface. Thirdly, the band gap of silicon is 1.12 eV, higher than that of germanium

(~0.72 eV), so the maximum operation temperature of silicon is 200 °C, while that of

germanium is only about 85 °C. For these reasons, most semiconductors are produced in

silicon.

For the design of bandgap references, the temperature behaviour of junctions is also applied,

but in a different way. For temperature sensors, the temperature dependence of the output

signal must be maximized, in order to get larger temperature sensitivities. For bandgap

references, on the other hand, the temperature dependence of the output signal must be

minimized, in order to get a temperature-independent output whose value is related to the

bandgap energy of the semiconductor material. The temperature behaviour of the junctions

determines the performance of the temperature sensors and bandgap references.

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1. Introduction

2

1.2 Why CMOS Technology?

Bipolar technology was originally developed for commercial IC products. Many types of

integrated temperature sensors and bandgap references have been on the market, for instance,the temperature-sensor series LM135 [1.3], the AD590 series [1.4], etc, and the bandgap-

reference series ADR390 [1.5], the LM113 [1.6] series and REF1004 series [1.7] etc.

The development of IC technology has been driven by the ever smaller size and higher

performance required of IC products. The technologies used are the bipolar technology, MOS

technology, CMOS technology, and BiCMOS technology.

Nowadays, the CMOS technology is becoming more and more important in the IC market.

Compared to those fabricated using a bipolar technology, the ICs fabricated in CMOS have

some advantages. Firstly, CMOS is a cheap technology, because of the higher integration

grades. With the same amount of components, the chip size of IC fabricated in CMOS

technology is much smaller than that fabricated in a bipolar technology. Secondly, someoptions in circuit design, such as using analog switches, and switched capacitors, are only

offered by CMOS [1.8], which allows for a more flexible circuit design. This makes it easier

to design CMOS temperature sensors that do not only have a continuous analog output, but

also a modulated output in the time domain. Thirdly, in CMOS technology, temperature

sensors and bandgap references can be integrated with digital ICs, such as a microcontroller

and a CPU; no external components are required for temperature detection and/or a reference

signal.

For these reasons, temperature sensors and bandgap references fabricated in CMOS

technology are preferred.

1.3 Problem Statement

Both bipolar transistors and MOS transistors can be used for temperature sensors and bandgap

references. The temperature characteristics of the transistors are applied in the circuit design.

Since it is easier to model and control the temperature characteristics of bipolar transistors,

these transistors have been used as the basic components of integrated temperature sensors

and bandgap references.

Much research work has been done on characterizing the temperature dependence of the

properties of bipolar transistor [1.1, 1.2]. These dependencies can be used to design

temperature sensors and bandgap references. They can also be used in other IC designs toreduce temperature effects. As we have seen in section 1.2, many types of integrated

temperature sensors and bandgap references have been on the market for a relatively long

time, for instance, the temperature-sensor series LM135 [1.3], the AD590 series [1.4],

SMT160 [1.9], etc, and the bandgap-reference series ADR390 [1.5], the LM113 [1.6] series

and REF1004 series [1.7] etc.

There are some problems specific to realizing temperature sensors and bandgap references in

CMOS technology, which can be classified in two groups: device and circuit level problems.

The performance of temperature sensors and bandgap references strongly depends on the kind

of bipolar transistors implemented in CMOS technology. To design temperature sensors or

bandgap references, we have to know the temperature characteristics of these bipolar

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1. Introduction

3

transistors. Although many interesting designs of CMOS temperature sensors and bandgap-

reference circuits have been presented in the literature [1.10, 1.11], very little is known about

the basic limitation of the accuracy of these circuits and their long-term stability.

Also problems in circuit design have to be solved in CMOS technology. The poor matching ofMOSFETs causes op-amps and comparators to have large offsets. This results in systematic

errors in temperature sensors and bandgap references. Moreover, because MOSFETs are

surface-channel devices, they have much higher 1/ f noise (flicker noise) than transistors

fabricated in bipolar technology. This causes larger random errors.

Through the application of advanced techniques in circuit design, these non-idealities can be

minimized. For instance, by applying chopping techniques, one can significantly reduce the

offset and 1/ f noise of the op-amps [1.12]. By applying Dynamic Element Matching (DEM)

techniques, one can eliminate the errors caused by the mismatch between components to the

second order [1.3, 1.4]. Thus we can obtain accurate voltage amplification and division

without trimming with good long-term stability. An auto-calibration technique can be appliedto reduce the inaccuracy of the systematic parameters of the circuits significantly, so that high

accuracy and good long-term stability can be guaranteed.

1.4 The Objectives of the Project

The accuracy of CMOS temperature sensors and bandgap references is limited by two things:

by the accuracy of the bipolar components, which generate the basic signals, and by the

accuracy of the processing circuit. Thus, the objectives are to characterize the behaviour of the

bipolar device and to design a high-performance CMOS circuit.

In temperature sensors and bandgap references, the basic signals are the base-emitter voltageV BE and the difference between two base-emitter voltages under different bias-current

densities ∆V BE. The performance of a well-designed temperature sensor or bandgap-reference

circuit depends on the accuracy of these two basic signals.

Here, the device characterization is used to investigate the temperature dependencies of the

base-emitter voltage V BE and the voltage difference ∆V BE. Effects affecting the ideal values of

these voltages V BE and ∆V BE are studied.

Care must be taken in circuit design to maintain the accuracy of the basic signals V BE and

∆V BE based on the characterization results. For instance, the accuracy of ∆V BE depends on the

matching of two bipolar transistors, as well as the accuracy of the bias-current ratio. The

circuit should be carefully designed to eliminate errors due to mismatching of the bipolar

transistors and device mismatch in the current-ratio-generating circuit.

The process tolerance results in a certain spread in the value of the saturation current, thus

results in the spread in the value of base-emitter voltage under a determined temperature. Thus

an appropriate trimming technique is necessary to reduce this error. Single-point trims are

discussed later.

1.5 The Outline of the Thesis

Chapter 2 gives a brief theoretical description of bipolar transistors. In this chapter, the properties of the base-emitter voltage versus temperature and bias current are described. Also,

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1. Introduction

4

two types of bipolar transistors available in CMOS technology are presented. It is shown that

the vertical substrate transistors are preferable for temperature sensors and bandgap

references.

Chapter 3 characterizes vertical substrate transistors fabricated in CMOS technology. Ameasurement set-up has been built to measure the base-emitter voltage and the ∆V BE voltage

difference over the temperature range from -40°C to 160°C, with biasing currents from 5 nA

to 1 mA. The characterization results show that the base-emitter voltage of a vertical substrate

transistor fits the well-known Gummul-Poon model quite well. This means that the base-

emitter voltage of the substrate transistors can be well predicted by applying the extracted

model parameters V g0 and η . The measurements show that the ∆V BE voltage can be generated

with an inaccuracy of less than 0.1%, by optimisation of the bias current and the emitter size

of the transistors.

Chapter 4 describes some advanced technologies in circuit design. The main focus is on the

circuit design technologies, such as DEM techniques, the chopping technique and auto-calibration techniques. The architecture considerations in circuit design are also discussed in

this chapter.

Chapter 5 discusses some architecture considerations. It is possible to obtain the temperature-

sensing signal and bandgap-reference signal sequentially from a single bipolar transistor under

different bias currents or from multiple transistors. Features of the different architectures such

as circuit complexity, noise performance, power consumption, etc. have been investigated.

Chapter 6 presents the application of the device characteristics in an advanced circuit design.

A CMOS integrated interface circuit for thermocouples has been designed. In this circuit, the

basic voltage signal V BE, ∆V BE, the offset voltage V off and the unknown thermocouple voltage

V x are converted into the time domain, using a voltage-to-time converter. The combinations ofV BE and ∆V BE form a bandgap-reference voltage and a temperature-sensing voltage. The

bandgap-reference voltage and the offset voltage are used for auto-calibration. Auto-

calibration is applied to eliminate the additive and multiplicative errors of the voltage-to-time

converter. The temperature-sensing voltage represents the chip temperature, enabling cold-

junction compensation for thermocouples. The measurement results are also presented here.

Chapter 7 presents a switched-capacitor (SC) instrumentation amplifier with Dynamic-

Element-Matching (DEM) feedback. This instrumentation amplifier can be applied in

combination with the thermocouple interface to pre-amplify accurately the extreme small

thermocouple voltage before this signal is converted to the time domain.

Chapter 8 gives the main conclusions of the thesis.

Chapter 9 gives the summary of the thesis

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1. Introduction

5

References:

[1.1] G.C.M. Meijer, “An IC Temperature Transducer with an Intrinsic Reference”, IEEE

Journal of Solid-state Circuits, Vol. SC-15, No. 3, pp. 370-373, June 1980.

[1.2] S.L. Lin and C.A.T. Salama, “A V BE(T ) Model with Application to Bandgap-

Reference Design”, IEEE Journal of Solid-state Circuits, Vol. SC-20, No. 6, pp. 83-85,

Dec. 1985.

[1.3] National Semiconductor, “LM135 - Precision Temperature-Sensor”,

http://www.national.com 2004.

[1.4] Analog Devices, “AD590 is a two-terminal integrated circuit temperature transducer”,

http://www.Analogdevice.com, 2004.

[1.5] Analog Devices, “ADR589 a two-terminal IC 1.2 V reference”,

http://www.analogdevice.com, 2004.

[1.6] National Semiconductor, “LM113 Precision Reference”, http://www.national.com,

2004.

[1.7] Burr-Brown, “REF1004 1.2 V and 2.5 V Micro Power Voltage Reference”,

http://www.burr-brown.com, 2004.

[1.8] M. Tuthill, “A Switched-Current, Switched-Capacitor Temperature-Sensor in 0.6-µm

CMOS”, IEEE Journal of Solid-state Circuits, Vol. 33, No. 7, pp. 1117-1122, July

1998.

[1.9] Smartec B.V., “Specification Sheet SMT160-30”, http://www.smartec.nl , 1996.

[1.10] Y.P. Tsividis and R.W. Ulmer, “A CMOS Voltage Reference”, IEEE Journal of Solid-

state Circuits, Vol. SC-13, No. 6, pp. 774-778, Dec. 1978.

[1.11] G. Tzanateas, C.A. Salama and Y.P. Tsividis, “A CMOS Bandgap-Reference”, IEEE


[1.12] A. Bakker, “High-Accuracy CMOS Temperature-Sensors”, Ph.D. thesis, 1999. Delft

University of Technology, The Netherlands.

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2. Bipolar Components in CMOS Technology

7

Chapter 2 Bipolar Components in CMOS

Technology

2.1 Introduction

This chapter mainly focuses on the basic characteristics of bipolar transistors and the bipolar

transistors available in CMOS technology.

The basic characteristic of bipolar transistors is the base-emitter voltage versus the bias

current and the temperature V BE( I C,ϑ ). The properties of V BE( I C ,ϑ ) are applied to generate thetemperature-sensor signal and the bandgap-reference signal.

The chapter describes two types of bipolar transistors available in CMOS technology: lateral

and vertical substrate transistors. A comparison of these two types of structures shows that

vertical substrate transistors are more suitable for designing high-performance temperature

sensors and bandgap references.

2.2

Basic Theory of Bipolar Transistors

2.2.1 Ideal Case

Under forward biasing, the collector current depends exponentially on the base-emitter

voltage:

exp 1 BE qV

k C S I I

ϑ

= −

, (2.1)

where I C = the collector current of the bipolar transistor,

I S = the saturation current of the bipolar transistor,V BE = the forward-biased base-emitter voltage,

k = the Boltzmann’s constant,

q = the electron charge, and

ϑ = the absolute temperature.

If the base-emitter voltage V BE > 3k ϑ /q, equation (2.1) can be simplified, yielding:

ϑ k

qV

S C

BE

I I exp≈ . (2.2)

The saturation current I S amounts to:

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8

B

B E iS

Q

D Anq I

22

= , (2.3)

where AE = the emitter-junction area,ni = the intrinsic carrier concentration in the base, DB = the effective minority-carrier diffusion constant in the base, andQB = the charge represented by the net number of doping atoms in the

neutral base per unit area.

The charge QB is obtained by using the integration equation:

∫ +=

C

E

x

x B B dx N qQ , (2.4)

where N +

B represents the majority density, xE and xC represent the boundaries of the neutral

base region on the emitter side and the collector side, respectively.At moderate temperatures, the dopant is fully ionised, and the intrinsic carrier concentration

is much less than the doping concentration. In this case, it holds that:

∫≈C

E

x

x B B dx N qQ , (2.5)

where N B represents the base-doping density.

The temperature dependency of I S is based on the temperature dependency of the parametersni and DB [2.1], according to:

ϑ ϑ k qV

i

g

n −∝ exp32 (2.6)

B Bq

k D µ

ϑ = , (2.7)

where B µ = the effective value of the mobility of the minority carriers in the base,

V g = the bandgap voltage of the base material.

The net base charge QB also changes with temperature, because the boundaries xE and xC

depend on temperature, and+

B N also changes with temperature at very low and high

temperatures. At very low temperatures, the dopant is not fully ionised due to the freeze-out

effect. And at very high temperatures, the intrinsic carriers become dominant. However, in

the moderate temperature range, we can neglect the temperature dependence of QB.

The mobility B µ and the bandgap voltage V g are related to the temperature in a non-linear

way. By approximation, they can be expressed as:

n

B

−∝ ϑ µ , (2.8)

αϑ −= 0 g g V V , (2.9)

where n and α are constants. n depends on the doping concentration and profile in the base,

and thus n is a process-dependent constant. V g0 is the extrapolated value of the bandgapvoltage V g(ϑ ) at 0 K.

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9

Taking together all the temperature dependencies of equation (2.2) yields the equation:

( )0exp

BE g

C

q V V I C

k

η ϑ

ϑ

−=

, (2.10)

where C is a constant, and η = 4 - n.

According to measurement results of Meijer [2.2], the values of the parameters V g0 and η differ from those one would expect on the basis of physical considerations. This is due to the

poor approximation in equation (2.9) for V g(ϑ ) [2.3]. With empirical values for V g0 and η , equation (2.10) can perform rather accurately.

To find out the equation for V BE(ϑ ), we consider two temperatures: an arbitrary temperature ϑ and a reference temperature ϑ r . Applying equation (2.10) for both temperatures, we canderive the temperature dependence of base-emitter voltage V

BE(ϑ ) from the expression of

I C(ϑ ) /I C(ϑ r )

( )0( )

( ) 1 ln ln( )

C BE g BE r

r r r C r

I k k V V V

q q I

ϑ ϑ ϑ ϑ ϑ ϑ ϑ ϑ η

ϑ ϑ ϑ ϑ

= − + − +

. (2.11)

When, for practical reasons, the collector current is made proportional to some power of the

temperature ϑ :

m

C I ϑ ∝ , (2.12)

equations (2.11) and (2.12) give:

( ) ( )0( ) 1 ln BE g BE r r r r

k V V V m

q

ϑ ϑ ϑ ϑ ϑ ϑ η

ϑ ϑ ϑ

= − + − −

. (2.13)

For convience, in circuit designs, it is better to express V BE(ϑ ) as the sum of a constant term, aterm proportional to ϑ , and a higher-order term. In such way, the linear terms represent thetangent to the V BE(ϑ ) curve at the reference temperature ϑ r , as shown in Figure 2.1 .

The new expression is:

( ) { ( )0 linear constant high-order

( ) lnr

BE g r

r

k k

V V m mq q

ϑ ϑ

ϑ η λϑ η ϑ ϑ ϑ ϑ

= + − − + − − − 144424443 1444442444443

. (2.14)

where

( ) ( )0r

g BE r

r

k V m V

q

ϑ η ϑ

λ ϑ

+ − −

= . (2.15)

The first term in (2.14) is defined as V BE0, which is an important parameter in bandgap

references.

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10

ϑ

q

k mV r g

ϑ η )(0 −+

0 g V

V BE

)ln()(r

r

qk m

ϑ ϑ ϑ ϑ η −−−

ϑ r

Figure 2.1 The base-emitter voltage versus temperature.

Under the condition of a small temperature change, (ϑ -ϑ r )

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11

2.2.3 High-Level Injection

If the injected minority carrier concentration is in the order of the base-doping concentration,

the collector current deviates from (2.1). If the injected carrier concentration is above the

base-doping concentration, (2.1) becomes:

2 1 BE qV

k C S I I e

ϑ

′= −

, (2.18)

where2

i B E BS

B

q n N A D I

Q′ = .

Figure 2.2 shows the I C - V BE curve for two base-collector voltages.

1.E-14

1.E-11

1.E-08

1.E-05

1.E-02

0 0.2 0.4 0.6 0.8 1

V BE (V)

I C (

A )

I C (V BC = 0)

I C (V BC > k ϑ /q)

High-level injection

Low-level injection

Figure 2.2 The I C versus V BE for two values of V BC .

2.2.4 The Temperature-Sensor Signal and the Bandgap-Reference Signal

The temperature-sensor signal and the bandgap-reference signal are realized by the linear

combinations of the base-emitter V BE voltage and a voltage ∆V BE, which is proportional to theabsolute temperature

( ) BE BE V C V V ∆−±= 1)()( ϑ ϑ , (2.19)

BE BE ref V C V V ∆+= 2)(ϑ , (2.20)

where ∆V BE is generated from two base-emitter voltages under different bias current densities.

According to (2.2), ∆V BE can be expressed as:

γ ϑ ϑ

lnln2

1

1

2

q

k

I

I

I

I

q

k V

S

S

C

C BE =

=∆ , (2.21)

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12

The symbol ± in (2.19) represents the negative and the positive temperature coefficient,

respectively. We call the voltages C 1∆V BE or C 2∆V BE PTAT (Proportional to the AbsoluteTemperature) voltages.

The value of the bandgap-reference voltage at a reference temperature ϑ r is equal to

( )0r

ref g

k V V n

q

ϑ η = + − . (2.22)

The parameters C 1 and C 2 are determined by

γ ϑ

ϑ

ϑ

ϑ

ln

)(

)(

)(1

q

k

V

V

V C

Z

Z BE

Z BE

Z BE =∆

= , (2.23)

γ ϑ

ϑ

ln

)(2

q

k V V C r

r BE ref −= . (2.24)

Figure 2.3 shows how the signals are combined for the temperature sensor and the bandgap

reference.

ϑ Z

∆V BE

C 1∆V BE

V BE1

V BE2

ϑ

V

V BE0

V

∆V BE

C 2∆V BE

ϑ r

V BE1

V BE2

V ref

ϑ

V BE0

(a) (b)V( ϑ )

0 0

Figure 2.3 The linear combinations of V BE and ∆V BE for (a) temperature sensors, (b) bandgapreferences.

The higher-order term in equation (2.14) is not considered in the linear combinations (2.19)and (2.20). It causes a non-linear error in temperature sensors and bandgap references, as

shown in Figure 2.4. The circuit design technique used to compensate for this error is called

curvature correction.

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13

-0.007

-0.006

-0.005

-0.004

-0.003

-0.002

-0.001

0

-100 -50 0 50 100 150

η -m = 3

η -m = 4

η -m = 5

ϑ r = 300 K

ϑ -ϑ r

E r r o r ( V )

Figure 2.4 The non-linearity ))ln()((r

r mq

k

ϑ

ϑ ϑ ϑ ϑ η −−− versus temperature.

2.2.5 Calibration of Bandgap-References and Temperature Sensors

There are two reasons to calibrate bandgap references and temperature sensors: Firstly, at the

ambient temperature the base-emitter voltage may deviate from the nominal value V BE(ϑ A);

this is due to process spread. Secondly, the amplification factor C 1 or C 2 may deviate from thedesign values due to a mismatch. Figure 2.5 shows the deviation of a bandgap reference due

to deviations in the base-emitter voltage V BE(ϑ ) and in the voltage C 2∆V BE.

V

C 2∆V BE

T A

V BE

V ref

T0

V BE0

Figure 2.5 The spreading in the base-emitter voltage and in the PTAT voltage results in

spreading in the bandgap reference.

Trimming can be performed to adjust the base-emitter voltage or to adjust the resistors as

shown in Figure 2.6. In Figure 2.6(a) the base-emitter voltage is adjusted by trimming the

emitter area of the transistor. In Figure 2.6(b) the resistance is adjusted using fusible links.

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Q

A A0 A1 An

I bias

R 0 2R 0 4R 0

(a) (b)

Figure 2.6 (a) Adjusted emitter area, (b) adjusted resistor.

Several trimming techniques can be applied. The most commonly used are:

• Zener zapping (Figure 2.6(a)), to short-circuit connection,

• Fusible links (Figure 2.6(b)), to blow up connections, and

• Laser trimming, to adjust resistors.

The advantage of using fusible links is that for trimming a rather low voltage (5 V) can be

used. For zener zapping, voltages up to 100 V are required. Therefore, special precautions

have to be taken to protect the circuit during trimming. On the other hand, the zener-zapped

components are usually highly reliable and show good long-term stability. With fusible links,

special precautions have to be taken to avoid deterioration of the wafer-test probes.

Furthermore, care has to be taken to avoid metal regrowth due to on-chip electro migration

[2.4] during the whole lifetime of the chip.

The spreading in the base-emitter voltage ∆VBE and the adjustment tolerance of the base-emitter voltage δ VBE determine how many bit of trimming should be designed and theminimum area of the emitter, according to the following equations

0

0

(2 1)ln

ln

n

r VBE

r VBE

A Ak

q A

A Ak

q A

ϑ

ϑ δ

+ −≥ ∆

+ ≤

, (2.25)

where A represents the minimum area of the emitter, A0 represents minimum area of theemitter that can be adjusted and n represents the bit number of the trimming system. The

emitter area can be adjusted from the minimum value A to the maximum value ( A+(2n-1) A0).

For instance, with ϑ r = 300 K, ∆VBE = 20 mV, and δ VBE = 0.5 mV. Substituting the value intoequation (2.25) yields

A A

A An

0194.0

158.1)12(

0

0

≤

≥−,

where n = 6 and A = 52 A0 can meet the above requirements. In this case, a 6-bit trimming

structure is required. The area A is determined by the value of the base-emitter voltage at the

reference temperature V BE( ϑ r ).

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15

2.3 Bipolar Transistors in CMOS Technology

There are two types of CMOS processes: the n-well CMOS and the p-well CMOS process.

The two types of bipolar transistors available thus differ for these two processes. For an n-well CMOS process, lateral pnp and vertical substrate pnp transistors are available. In

addition, for a p-well CMOS process, lateral npn and vertical substrate npn transistors are

available. In this thesis, bipolar transistors in an n-well CMOS process are described.

2.3.1 Lateral Transistor

Figure 2.7 shows a cross section of a lateral bipolar transistor implemented in a standard n-

well CMOS process [2.4]. Two implanted p+ regions in the same n-well are used as theemitter and collector, while the n-well is used as the base. A gate is used to obtain a thin oxide

layer, which makes it easier to etch the holes for the emitter and collector diffusions.

Compared to lateral pnp transistors fabricated in a bipolar process, those fabricated in CMOS

have the following special properties:

• There is no buried layer, and as a result quite a lot of the injected holes are collected by the substrate, which gives rise to a relatively high substrate current I sub.

• They do not show one-dimensional behaviour, and as a result, the I C(V BE)characteristic deviates from the ideal exponential relation.

• Even at rather low current level, high-level effects occur because especially transistorsmade using an n-well CMOS process have a low surface doping concentration.

E CG BS

IE ICICS IB

E

C

S

B

G

n-well

Substrate

n+ p+ p+

Figure 2.7 The cross section of a lateral PNP-transistor in an n-well CMOS process.

The effective emitter area in the expression of the saturation current I S for the lateral transistor

depends on the length along the emitter and the collector and on the depth of the p-diffused

emitter, as shown in Figure 2.8. The change in the depletion layer between the emitter-base

junctions that is caused by the change in the base-emitter voltage will change the effective

emitter area. It causes I C(V BE,ϑ ) to deviate from the ideal exponential relation. Since thedepletion layer also changes with temperature, V BE(ϑ ) deviates from (2.11) as well.

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16

E C

P+ P+

n-well

Figure 2.8 The cross section of a lateral PNP-transistor in an n-well CMOS process.

Figure 2.9 shows the I C(V BE) characteristic of a lateral pnp transistor fabricated in the 1.2 µmn-well CMOS process of Alcatel Microelectronics [2.5]. With the decrease in device size to

submicron level, the depths of the n+, p+ and n-well become smaller, and the I C(V BE,ϑ )characteristics becomes worse.

1.00E-12

1.00E-10

1.00E-08

1.00E-06

1.00E-04

1.00E-02

-0.9-0.8-0.7-0.6-0.5-0.4

V BE (V)

I C (

A )

I B

I SUB

I C

I

[ A ]

V BE [V]

Figure 2.9 The I (V BE ) characteristics of a lateral pnp transistor fabricated in an n-well CMOS

process (courtesy of Alcatel Microelectronics).

The gate G in the 5-terminal structure can be used to improve the performance of the lateral

bipolar transistors. By biasing the gate G properly, one can push the injected emitter current

below the surface; thus:

• Noise due to surface effects is reduced.

• Current flow is repelled under the surface of the n-well, where the doping

concentration is lower than that at the surface, which results in a larger forward current

gain.

2.3.2 Vertical Substrate Transistor

Figure 2.10 shows a cross section of a vertical pnp transistor implemented in a standard n-well

CMOS process. Some special properties of the vertical bipolar transistors are:

• The base width, typically a few microns, is determined by the distance between the

bottom of the p+ regions and that of the n-well.

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17

• The base-width modulation effect is relatively weak due to the larger base width,resulting in a large early voltage. The base resistance is also relatively high.

• The collector (substrate) is lightly doped, and therefore the series collector resistance

is high.E BC

IE IBIC

E

C

B

Substrate

n-well

p+ p+ n+

Figure 2.10 The cross section of a vertical PNP-transistor in an n-well CMOS process.

Although its junction depths and doping are not optimized for bipolar operation, the vertical

bipolar transistor exhibits good performance with respect to the ideality of the I C(V BE)

characteristic, because it shows better one-dimensional behaviour than the lateral transistor.

However, the substrate collector limits the circuit design to only common-collector

configurations.

2.3.3 Comparison of Two Types of the Bipolar Transistors

Lateral [2.5] [2.6] and vertical [2.7]-[2.11] bipolar transistors have been applied in the designs

of temperature sensors and bandgap references.

With respect to the I C(V BE) characteristic, vertical substrate transistors are superior, because

they perform much better than lateral transistors.

With respect to the circuit design, circuits based on lateral transistors are more flexible,

because they allow the use of configurations from bipolar technology in CMOS technology.Designing circuits based on vertical transistors in CMOS poses a problem however, as there

the common-emitter structure, which is the conventional circuit used in bipolar technology to

generate and amplify the signal ∆V BE, cannot be applied. Therefore, special amplifier

configurations are required to amplify the voltage ∆V BE . Figure 2.11 shows two basic circuitsfor a CMOS bandgap reference using lateral and vertical transistors.

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18

-

V OS

-

+ +

V ref

R 1

R 2 =R 3

R 2 =A2R 1

R 1

Vref

∆V BE

p

∆V BE

R 3 =A2R 1

Q2Q1

+

-

(a) (b)

Figure 2.11 Two simple schematics of bandgap references in CMOS technology using (a)

lateral, and (b) vertical transistors.

In Figure 2.11(b), the offset voltage of the operational amplifier must be taken into account in

the expression of the output voltage:

3 21 1 1 2

1 1

ln S ref BE R BE OS S

R I k V V V V A V

R q I

ϑ = + ≈ + +

, (2.26)

where V R1 represents the voltage across the resistor R1. The non-zero offset voltage V OS and its

temperature dependence deteriorate the performance of the bandgap voltage output. For this

reason, circuits using vertical transistors show worse results than those using lateral transistors

[2.5] –[2.11].

In order to design high-performance bandgap references and temperature sensors, one must

first develop advanced circuit design techniques that overcome the disadvantages of circuits

employing vertical transistors, as the performance of temperature sensors and bandgap

references is mainly limited by imperfection of the device characteristics.

In this thesis, it is shown that by the use of advanced circuit design techniques, one can obtain

circuits generating a highly accurate ∆V BE signal. In these high-performance temperaturesensors and bandgap references, vertical bipolar transistors are used, which perform much

better than lateral ones.

2.4 Conclusions

This chapter described the basic theory of bipolar transistors, especially the I C(V BE,ϑ ) for the purpose of circuit design for temperature sensors and bandgap references. Two types of

bipolar transistors, lateral and vertical substrate transistors, fabricated in CMOS technology

were discussed. With respect to the I C(V BE) characteristic, vertical substrate transistors are

preferred for generating the signals V BE and ∆V BE in our high-precision temperature sensorsand bandgap references. However, advanced circuit design techniques should be developed to

overcome the disadvantages of circuits employing vertical transistors.

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19

References

[2.1] J.W. Slotboom and H.C. De Graaf, “Measurements of Bandgap Narrowing in Si

Bipolar Transistors”, Solid-State Electronics, Vol. 19, pp. 857-862, Oct. 1976.

[2.2] G.C.M. Meijer and K. Vingerling, “Measurement of the Temperature Dependence of

the I C(V BE) Characteristics of Integrated Bipolar Transistors”, IEEE Journal of Solid-

state Circuits, Vol. SC-15, No. 2, pp. 1151-1157, April 1980.

[2.3] Y.P. Tsividis, “Accurate Analysis of Temperature Effects in I C-V BE Characteristics

with Application to Bandgap Reference Sources”, IEEE Journal of Solid-state

Circuits, Vol. SC-15, No. 6, pp. 1076-1084, Dec. 1980.

[2.4] G.C.M. Meijer, “Concepts for Bandgap-references and Voltage Measurement

Systems”, in Analog Circuit Design edited by J.H. Huijsing, R.J. van de Plassche and

W.M.C. Sansen, Kluwer Ac. Publ., Dordrecht, pp. 243-268, 1996.

[2.5] M.G.R. Degrauwe, O.N. Leuthold, E.A. Vittoz, H.J. Oguey and A. Descombes,

“CMOS Voltage References Using Lateral Bipolar Transistors”, IEEE Journal of

Solid-state Circuits, Vol. SC-20, No. 6, pp. 1151-1157, Dec. 1985.

[2.6] R.A. Bianchi, F. Vinci Dos Santos, J.M. Karam, B. Courtois, F. Pressecq and S.

Sifflet, “CMOS compatible temperature sensor based on the lateral bipolar transistor

for very wide temperature range application”, Sensors and Actuators, A71, pp. 3-9,

1998.

[2.7] Ganesan et al., “CMOS Voltage Reference with Stacked Base-Emitter Voltages”, US.

Patent, 5.126.653, June 30, 1992.

[2.8] M. Tuthill, “A Switched-Current, Switched-Capacitor Temperature Sensor in 0.6-µmCMOS”, IEEE Journal of Solid-State Circuits, Vol. 33, No. 7, pp. 1117-1122, July

1998.

[2.9] G. Tzanateas, C.A. Salama and Y.P. Tsividis, “A CMOS Bandgap Reference”, IEEE

Journal of Solid-State Circuits, Vol. SC-14, No. 3, pp. 655-657, June 1979.

[2.10] Eric A. Vittoz and O. Neyroud, “A Low-Voltage CMOS Bandgap Reference”, IEEE


[2.11] Y.P. Tsividis and R. W. Ulmer, “A CMOS Voltage Reference”, IEEE Journal of

Solid-state Circuits, Vol. SC-13, No. 6, pp. 774-778, Dec. 1978.

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3. Characterization of the Temperature Behaviours

21

Chapter 3 Characterization of the Temperature

Behavior

3.1 Introduction

This chapter deals with the device characterization of vertical substrate bipolar transistors. To

investigate the characteristics of vertical bipolar transistors, and to identify the non-ideal

effects that limit the accuracy of the voltages V BE and ∆V BE, we measured the voltages V BE and ∆V BE versus the temperature and the collector current I C. We derived the parameters V g0

and η , the effective emission coefficient m, the forward current gain BF, and the baseresistances RB. Non-ideal effects were analysed too.

For vertical substrate bipolar transistors, it is easier to control the emitter current I E than the

collector current I C. Therefore, not only the V BE( I C,ϑ ) characteristics must be characterized, but also the base-current effect: due to the low current gain of the vertical substrate bipolar

transistors, the base current has a significant effect on the voltages V BE and ∆V BE. The non-idealities that affect the accuracy of ∆V BE, such as the base resistance, the effective emissioncoefficient and the low injection effect were investigated by measuring ∆V BE. We investigatedhow the geometry and biasing current of the transistors can be optimized.

Devices fabricated in two CMOS processes, 0.7-µm and 0.5-µm, were characterized.

3.2 Measurement Set-ups.

Figure 3.1 shows the schematics of the measurement set-ups for the V BE( I C,ϑ ) and ∆V BE( I C,ϑ )characterizations. The emitter currents I E, the base currents I B and the voltages V BE and ∆V BE

are measured for different temperatures.

For our investigations and experiments, we selected a temperature range of –40 °C to 160 °C.For the biasing current range, we chose the range of 5 nA to 1 mA for the base-emitter

voltage measurement and that of 5 nA to 100 µA for the ∆V BE measurement, respectively. Thecurrent range was chosen based on practical constraints. These are due to the low-current

effects, interference, and 1/ f noise at the low end of the range, and to the high-current effects

and power dissipation at the high end. The target for the desired accuracy of all measurements

corresponds to a temperature error of less than 0.1 K.

To realize accurate voltage and current measurements, we applied an auto-calibration

technique to eliminate the additive and multiplicative effects of the measurement set-ups

[3.1].

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22

IE VBE

Measurement

Current source

Thermostat

Q1 Q2

Thermostat

IE2IE1

∆VBE Measurement

IBMeasurement

Current source

circuit

(a) (b)

IB

Measurement

Figure 3.1 The measurement set-ups for the (a) V BE (I C ,ϑ ), and (b) ∆V BE (I C ,ϑ )characterisation.

By using an appropriate thermal design, we could control and measure the temperature

accurately. In this design, particular care has been taken to minimize the self-heating, the

temperature gradients and drift during the measurement.

The test device for the ∆V BE characterization consists of a pair of transistors of identical

emitter size. Mismatching of the transistors will introduce an error in the ∆V BE measurement.This error has been eliminated by employing the dynamic element matching technique. This

was realized by interchanging the two transistors and taking the average of the measured ∆V BE voltages under the same biasing condition [3.2].

Figure 3.2 shows a photograph of the test chip. On this chip, a single bipolar substratetransistor and a pair of transistors in a quad configuration are used to characterize the

V BE( I C,ϑ ) and ∆V BE( I C,ϑ ) behaviour. The emitter size of all transistors is 10 µm × 20 µm.

E

B

C

E

B

C

Figure 3.2 (a) A photograph of the test chip; (b) The transistor pairs under tested are

configured in a quad configuration.

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23

3.3 Parameter Characterizations

For the temperature range from -40 °C to 160 °C, we measured the base-emitter voltage V BE

under a emitter current I E varying from 5 nA to 1 mA. The corresponding base current I B wasmeasured as well. The collector current I C was derived by subtracting the measured base

current from the measured emitter current. The measured V BE( I C,ϑ ) is plotted in Figure 3.3.

For the same temperature range, we measured the voltage ∆V BE, under a emitter current ( I E1)varying from 10 nA to 100 µA, with the emitter current ratio ( I E2/ I E1) of 3. The measured

∆V BE( I C,ϑ ) is plotted in Figure 3.4. The emitter currents and the corresponding base currentswere measured as well.

These measurement results were used to derive the transistor parameters, as described in the

next paragraphs.

1.E-09

1.E-08

1.E-07

1.E-06

1.E-05

1.E-04

1.E-03

0 0.2 0.4 0.6 0.8 1VBE (V)

I C (

A )

233K 273K 313K 353K 393K 433K

V BE [V]

I C [ A ]

Figure 3.3 The measured results for V BE ( I C ,ϑ ) for 0.7- µ m CMOS.

0.015

0.02

0.025

0.03

0.035

0.04

0.045

200 250 300 350 400 450

T (K)

V

B E

10 nA

100 nA

1 uA

10 uA

100 uA

ideal

∆ V B E

[ V ]

ϑ [K]

Figure 3.4 The measured ∆V BE (ϑ ) for different emitter currents ( I E1).

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24

3.3.1 The Saturation Current I S

Figure 3.3 shows the measured results for the V BE( I C,ϑ ) of a substrate bipolar transistor. Agood exponential relation was found between V BE and I C over several decades of collector

current. The deviation at high current levels is due to the contributions of the base resistance

and the high injection effect.

The saturation current I S was derived by curve fitting of the measured I C-V BE characteristic

over the current range of 10 nA to 4 µA. Table 3.1 lists the extracted saturation current I S of

the devices fabricated in 0.7-µm and 0.5-µm CMOS with an emitter area of 10 µm × 20 µm.

I S (A) (0.7-µm CMOS) I S (A) (0.5-µm CMOS)

ϑ = 233 K 1.26×10-22 3.04×10-23

ϑ = 293 K 3.49×10-17 9.13×10-18

ϑ = 433 K 3.98×10-10 1.08×10-10

Table 3.1 The extracted saturation currents for three temperatures

(emitter size: 10 µ m × 20 µ m).

Note that the saturation currents of a substrate bipolar transistor fabricated in 0.7-µm CMOStechnology were roughly 3.8 times of those of a transistor fabricated in 0.5-µm CMOStechnology. According to equations (2.3), (2.5) and (2.7), the saturation current depends on

the mobility of the minority in the base and the doping concentration in the base. We canconclude that the heavier doping concentrations and mobility of the minority in the base result

in the lower saturation current in 0.5-µm CMOS.

3.3.2 The Knee Current I KF

The parameter I KF represents the behaviour of the transistor at high injection, when the

injected minority carrier concentration is in the order of the base doping concentration. In this

case, I C(V BE) deviates from the exponential relation I C=I Sexp(qV BE /k ϑ ):

ϑ k

qV

hl

S hl hl C

BE

e I I I I I 41

22++−= , (3.1)

where the current I hl is defined as the current when the injected minority concentration equals

the base doping concentration:

B geo Bhl N F qD I = (3.2)

which also equals the value of the knee current I KF. When

ϑ k

qV

S

BE

e I >> I hl, (3.3)

equation (3.1) becomes:

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25

ϑ k

qV

S hl C

BE

e I I I 2= , (3.4)

I C

I KF

V BE

exp(qV BE /k ϑ )

exp(qV BE /2k ϑ )

Figure 3. 5 The I C -V BE including high injection effect.

In the area where the curve starts to bend from exp(qV BE /k ϑ ) to exp(qV BE /2k ϑ ), the kneecurrent I KF can be approximately calculated by

mC k

qV

S

mC

hl KF

I e I

I I I

BE

,

2

,

−

==ϑ

, (3.5)

where I C ,m is the measured collector current and I S is derived from the measured I C-V BE atlower current range. The calculated I KF at room temperature is listed in Table 3.2, where the

effect of the base resistance is neglected. It is shown that with the same emitter area, the high

injection occurs earlier in devices fabricated in 0.7-µm CMOS than in the devices fabricatedin 0.5-µm CMOS.

I KF (A)

(0.7-µm CMOS)

I KF (A)

(0.5-µm CMOS)

ϑ = 293 K ~1.5 mA ~4.3 mA

Table 3.2 The calculated knee current I KF at room temperature (emitter size: 10 µ m × 20 µ m).

3.3.3 ParametersV g0 and η ηη η

As described in chapter 2, the temperature dependence of the base emitter voltage V BE(ϑ ) can be expressed as:

( )0( )

( ) 1 ln ln( )

C BE g BE r

r r r C r

I k k V V V

q q I


ϑ ϑ ϑ ϑ

= − + − +

, (3.6)

where V g0 is the extrapolated bandgap voltage at 0 K, η is a material-dependent and process-

dependent parameter, and ϑ r is the reference temperature.

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26

The parameters V g0 and η can be derived from the measured results of V BE at threetemperatures ϑ 1, ϑ r and ϑ 2 (ϑ 1 < ϑ r < ϑ 2) [3.3], by solving the equation:

( ) ( )

( ) ( )

11 1 1 1 11 0

22 2 2 2 22 0

( )1 ln ln ( )

( )1 ln ln

( )

C BE g BE r

r r r C r

C BE g BE r

r r r C r

I k k V V V q q I

I k k V V V

q q I

ϑ ϑ ϑ ϑ ϑ ϑ ϑ ϑ η ϑ ϑ ϑ ϑ


ϑ ϑ ϑ ϑ

= − + − +

= − + − +

(3.7)

The parameters V g0 and η have been calculated based on the measured base-emitter voltagesfor –40 °C (ϑ 1), 20 °C (ϑ r ), and 80 °C (ϑ 2). The results are shown in Figure 3.6(a). There is astrong negative correlation between V g0 and η , which is similar to that found by Meijer andVingerling, and by Ohte and Yamahata, for transistors fabricated in bipolar technology [3.3],

[3.4].

An important parameter in designing a bandgap reference is V BE0(ϑ r ), which is the intersectionof the tangent of the curve V BE(ϑ ) at the point ϑ r with the vertical axis (ϑ = 0 K). The

parameter V BE0(ϑ r ) is calculated as:

( )q

k V V r g r BE

ϑ η ϑ += 00 . (3.8)

It was found that at 293 K, V BE0 ≅ 1.252 V for transistors fabricated in 0.7-µm CMOS

technology, and V BE0 ≅ 1.250 V for transistors fabricated in 0.5-µm CMOS technology. Thevalue of V BE0 versus the collector current is plotted in Figure 3.6(b). At high current levels,

due to the effects of the base resistance and the high injection, I C-V BE deviates from the

exponential relationship, resulting in a large deviation in the parameter extraction.

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27

(a)

1.13

1.135

1.14

1.145

1.15

4 4.2 4.4 4.6 4.8♦

V g 0 (

V )

sample 1

sample 2

sample 3

sample 4

sample 5

sample 6

sample 7

sample 8

sample 9

sample 01

1.2485

1.249

1.2495

1.25

1.2505

1.251

1.E-09 1.E-08 1.E-07 1.E-06 1.E-05 1.E-04 1.E-03

I C (A)

V B E 0

( V )

sample 1

sample 2

sample 3

sample 4

sample 5

sample 6

sample 7

sample 8

sample 9

sample 10

(b)

q

k V r g

ϑ η −= 250.10

sample 10

[ V ]

[ V ]

[A]

η

Figure 3.6 (a) The calculated parameter V go and η based on the measurement results for-40 ° C, 20 ° C, and 80 ° C for 10 samples, and (b) the parameter V BE0 at room temperature(300K ) for 0.5- µ m CMOS.

Figure 3.7 shows the difference between the measured base-emitter voltage V BE_meas. and the

calculated base-emitter voltage V BE_cal, based on the Gummel-Poon model, for which the

extracted model parameters were used, which fits the V BE(ϑ ) best (V go = 1.147 V, η = 4.15).

The inaccuracy is less than ±0.1 mV (see Figure 3.7), which corresponds to a temperatureerror of less than ±0.05 K for the temperature range of -20°C to 100°C. Comparing this resultwith those presented in [3.3] and [3.4], we can conclude that the temperature behavior of V BE

of CMOS bipolar substrate transistors fits the Gummel-Poon model as well as the behavior of

the transistors fabricated in bipolar technology. This indicates why the curve with emitter

current of 0.01 µA shows a large deviation at high temperatures. At these temperatures, thelow injection effect occurs, so that the simplified exponential relation I C = I Sexp(qV BE/k ϑ ) nolonger accurately express the I C-V BE. For instance, the extracted saturation current at 160 °C is3.9×10-10, under the biasing current of 0.01 µA, the simplified exponential relation

I C = I Sexp(qV BE/k ϑ ) causes an error of 1.6 mV. The large deviation of the curve for the emitter

current of 10 µA at high temperatures is due to the base resistance and the high injectioneffect.

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28

-500

0

500

1000

1500

2000

200 250 300 350 400 450

T (K)

V B E_

m e a s . - V B E_ c a

l . ( V )

0.01 uA

0.1 uA1.0 uA

10 uA

-500

0

500

1000

1500

2000

200 250 300 350 400 450

T (K)

V B E_

m e a s . - V B E_ c a

l . ( V )

0.01 uA

0.1 uA

1.0 uA

10 uA

0.7-µm 0.5-µm

[ µ V ]

[ µ V ]

ϑ [K] ϑ [K]

Figure 3.7 The deviation of the measured V BE from the calculated value based on the

Gummel-Poon model with the fitted result V g0 = 1.147 V, η = 4.15, for 0.7- µ m CMOS and

V g0 =1.141 V, η = 4.3, for 0.5- µ m CMOS.

Table 3.3 lists the parameters derived from measurements for the current range from 0.01 µAto 10 µA. It is clear that there are only minor differences for the parameters V go, η , and V BE0

between the devices fabricated in 0.7-µm CMOS technology and the devices fabricated in 0.5-µm CMOS technology.

V go (V) η V BE0 (V) (300K) V BE_meas.- V BE_cal. (µV)

0.7-µm CMOS 1.1456±0.0030 4.23 m 0.10 1.255±0.001 < 100

0.5-µm CMOS 1.1390±0.0050 4.33 m 0.20 1.252±0.001 < 100

Table 3.3 The parameter values for bipolar substrate transistors fabricated in 0.7- µ m and 0.5- µ m CMOS technology, respectively.

3.3.4 Effective Emission Coefficient m

The effective emission coefficient m is defined as [3.5]:

.

1

const V BE

C

C CB

V

I

qI

k

m =∂

∂⋅=

ϑ . (3.9)

m varies from approximately unity at low collector current to approximately two at high

collector currents. If we take the effective emission coefficient into account, the I C-V BE

dependency is:

ϑ mk

qV

S C

BE

I I exp= . (3.10)

From the measurement results shown in Figure 3.3, the parameter m is derived and depicted inFigure 3.8.

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29

0.998

0.999

1

1.001

1.002

1.0031.004

1.005

1.006

1.007

1.E-08 1.E-07 1.E-06 1.E-05 1.E-04 1.E-03

IC (A)

n

253K

293K

393K

0.998

0.999

1

1.001

1.002

1.0031.004

1.005

1.006

1.007

1.E-08 1.E-07 1.E-06 1.E-05 1.E-04 1.E-03

IC (A)

n

253K

293K

393K

m

m

0.7-µm 0.5-µm

(a) (b)

I C [A] I C [A]

Figure 3.8 The effective emission coefficient at three temperatures.

The calculation according to equation (3.2) shows that at higher temperatures, the I C-V BE starts to deviate from the ideal exponential relation earlier, and as a result, the effective

emission coefficient m deviates from unity earlier. Figure 3.8 supports this conclusion.

The effective emission coefficient m can also be derived from the ∆V BE( I C,ϑ ) measurement. Inthe moderate current range, the low injection effect and high injection effect can be neglected.In this current range, the effective emission coefficient m can be derived from:

. _

. _

i BE

B B Meas BE

V

I RV m

∆

∆−∆= , (3.11)

where ∆V BE_Meas. is the measured voltage ∆V BE and ∆V BE_i. is the voltage ∆V BE calculated bysubstituting the measurement data for the current ratio and the temperature in equation (2.21).The result m versus temperature is shown in Figure 3.9. The drop of m at high temperatures

and low currents is caused by the fact that the approximation of ϑ mk qV

S C

BE

I I exp= is not valid

any more. According to equation (2.1), ∆V BE_i. is calculated by:

⋅

+

+⋅=∆

2

1

11

22 _ ln

S

S

S C

S C i BE

I

I

I I

I I

q

k V

ϑ , (3.12)

which results in a lower value than when it is calculated using equation (2.21).

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30

0.995

0.996

0.997

0.998

0.999

1

1.001

1.002

1.003

200 250 300 350 400 450

T (K)

( V P T A T_

m - R B

I B ) / V P T A T_

i

Ie1=1uA

Ie1=0.1uA

0.995

0.996

0.997

0.998

0.999

1

1.001

1.002

1.003

200 250 300 350 400 450

ξ◊ζ 3

( V P T A T_

m

- R B ξ I B ) / V

P T A T_

i

Ie1=1uA

Ie1=0.1uA

0.7-µm CMOS 0.5-µm CMOS

ϑ [K] ϑ [K]

( V P T A T_ m - R B

I B ) / V P T A

T_

i

( V P T A T_ m - R B

I B ) / V P T A

T_

i

Figure 3.9 The effective emission coefficient m at I E1 = 0.1 µ A and I E1 = 1 µ A for the same

emitter area of 10 µ m × 20 µ m.

The parameter m derived from the ∆V BE measurement (Figure 3.9) is in good agreement withthat derived from the V BE measurement, except for the point at a temperature of 233 K.

It is concluded that in the moderate current range, the effective emission coefficient in CMOS

technology is very close to the ideal value of unity.

3.3.5 Forward Current Gain BF

We determined the static forward common-emitter current gain BF by measuring the emitter

current I E and the base current I B, respectively.

1−= B

E F

I

I B (3.13)

The measured forward current gain BF versus emitter current and temperature are depicted in

Figure 3.10 and Figure 3.11, respectively.

0

10

20

30

40

50

60

0.01 0.1 1 10 100Ie1 (¬A)

B F

433K

413K

393K

373K

353K

333K

313K

293K

273K

253K

233K

(a) (b)

0

2

4

6

8

10

12

14

0.01 0.1 1 10 100Ie1 (¬A)

B F

433K

413K

393K

373K

353K

333K

313K

293K

273K

253K

233K

[µm] [µm]

Figure 3.10 The current dependencies of the current gain for (a) 0.7- µ m, and (b) 0.5- µ mCMOS.

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31

Figure 3.10 shows that in the intermediate current range, BF hardly depends on the emitter

current for the temperature range of –40 °C to 160 °C, for both 0.7-µm CMOS and 0.5-µmCMOS. Figure 3.10 shows that: a) the common-emitter current gain of the vertical bipolar

transistors fabricated in CMOS technology is much lower than that of those fabricated in bipolar technology; b) the common-emitter current gain of the transistors fabricated in 0.5-µm

CMOS technology is much lower than that of those fabricated in 0.7-µm CMOS technology.

In the moderate current range, the forward common-emitter current gain BF is determined

with the emitter efficiency γ and the transfer factor α T, which are determined by [3.6]:

E

B

E

B

iB

iE

B

E

E

B

no

Eo

B

E

L

W

N

N

n

n

D

D

L

W

p

n

D

D⋅⋅⋅+

=

⋅⋅+

≈

2

2

1

1

1

1γ , (3.14)

2

2

21 P

B

T L

W

−≈α , (3.15)

where DE = the diffusion coefficient at the emitter,

DB = the diffusion coefficient at the base,

N E = the impurity concentration at the emitter,

N B = the impurity concentration at the base,

W B = the base thickness,

LE = the diffusion length at the emitter, and

LP = the diffusion length at the base.

The forward common-emitter current gain can be approximated by the equation:

E

B

E

B

iB

iE

B

E

P

B

P

B

T

T F

L

W

N

N

n

n

D

D

L

W

L

W

B

⋅⋅⋅+

−

≈−

=

2

2

2

2

2

2

2

21

1 γ α

γ α . (3.16)

A possible reason to explain the low value of BF is the big value of W B in CMOS technology.

As a parasitic device, the base thickness of a pnp vertical bipolar transistor is the space

between the bottom of a p+ region and the bottom of the n-well. This space is much larger

than that of bipolar transistors fabricated in bipolar technology, where the process is designed

to optimize the parameters of the bipolar transistors. This fact explains why the forward

common-emitter current gain BF of the vertical bipolar transistors fabricated in CMOStechnology is much lower than that of transistors in bipolar technology. This also explains

why the vertical bipolar transistors fabricated in CMOS technology have much larger forward

early voltages (V ar = 170 V for 0.7-µm CMOS and V ar = 95 V for 0.5-µm CMOS).

For smaller size of CMOS process, it requires heavier doping or implant concentrations and

thus the thinner well and smaller depletion thickness. The heavier doping concentrations

result in smaller diffusion lengths. The combination of all these effects results in a lower

common-emitter current gain in 0.5-µm CMOS than in 0.7-µm CMOS.

As shown in Figure 3.10, the forward common-emitter current gain BF decreases at low

current levels and at high current levels. At low current levels, this is due to the generation-

recombination current in the emitter-base depletion region, which is added to the base current,

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32

resulting in the decrease of BF. At high current levels, the decrease of BF is caused by the high

injection effect, where the injected minority-carrier density in the base tends to approach the

impurity concentration N B. In another words: the injected carriers effectively increase the base

doping, which in turn cause the emitter efficiency to decrease.

0

2

4

6

8

10

12

14

16

0.002 0.0025 0.003 0.0035 0.004 0.0045

1/T (K -1

) (Ie1=1 A)

B F

0

10

20

30

40

50

60

0. 002 0. 0025 0. 003 0. 0035 0. 004 0. 0045

1/T (K -1

)

B F

(Ie1=1 A)

(a) (b)

1/ϑ ( K -1) ( I e1 = 1 µA) 1/ϑ ( K -1

) ( I e1 = 1 µA)

B F

B F

[ΚΚΚΚ−1−1−1−1] [ΚΚΚΚ−1−1−1−1]

Figure 3.11 The temperature dependency of the current gain for (a) 0.7- µ m CMOS, and (b)0.5- µ m CMOS.

The temperature dependence of B F is plotted in Figure 3.11. Both items in equation (3.16) are

temperature dependent. If the contribution of the term W 2 / (2 LP2) is neglected, the current gain

can be simplified to:

ϑ ϑ k

V q

B

E

B

E

E

Bk

V V q

B

E

B

E

E

B

B

E

B

E

iE

iB

E

B

F

g gB gE

W

L

N

N

D

D

W

L

N

N

D

D

W

L

N

N

n

n

D

D B

∆−

⋅⋅⋅=⋅⋅⋅=⋅⋅⋅= expexp)(

2

2

(3.17)

where V gE = bandgap voltage of the emitter,

V gB = bandgap voltage of the base.

The bandgap narrowing of the emitter due to the heavy doping concentration has been derived

from the measured temperature dependence of the forward common-emitter current gain,

while the temperature dependencies of the diffusion coefficients were neglected. It was found

that ∆V g ≅ -55 mV for 0.7-µm CMOS and ∆V g ≅ -45 mV for 0.5-µm CMOS.

3.3.6 Base Resistances R B

The series base resistances and the emitter resistances also contribute to the base-emitter

voltage, as seen in Figure 3. 12. Thus the base-emitter voltage becomes

E E B B

S

C BE R I R I

I

I

q

mk V ++⋅= ln

ϑ , (3.18)

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33

Q

R B

R E V BE

Figure 3. 12 The base and the emitter resistances contribute to the base-emitter voltage V BE .

If the effects caused by the base resistance and the emitter resistance are taken into account,

the voltage ∆V BE becomes:

( )[ ] E F B B BE R B R I r q

mk V 1ln ++∆+⋅=∆

ϑ . (3.19)

Due to the fact that the emitter resistance is much lower than the base resistance, and to the

fact that the common-emitter current gain is also low, the contribution of the emitter

resistance to the voltage ∆V BE can be neglected, thus:

( )

( )r R I

r q

k B

r m

q

k R I r

q

mk V B E

F

B B BE ln

ln1

1ln 1

+

−+⋅=⋅∆+⋅≅∆

ϑ

ϑ ϑ , (3.20)

where m is the effective emission coefficient, r the emitter current ratio I E2/ I E1, B F the forward

current gain and RB the base resistance.

Figure 3.13(a) shows the normalized measured ∆V BE versus I E1. The slope θ of the curves is

( )( )[ ] E F B

F

R B R

r q

k B

r 1

ln1

1++

+

−=

ϑ θ . (3.21)

Neglecting the effect of emitter resistance, equation (3.21) can be rewritten as

( )

)1(

ln1

−

+

=r

r

q

k B

R

F

B

ϑ θ

. (3.22)

From the measurement results of ϑ , BF and r , we can derive the base resistance RB fordifferent temperatures. The results are shown in Figure 3.13(b). At higher temperatures (ϑ >373 K), for 0.7-µm CMOS, the high injection effect already occurs at relatively low currents,so that the correct base resistance cannot be extracted (see Figure 3.13(a1)).

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34

(b1)(a1)

TC=0.0126

Tcq=53E-6

T0=293 K

0

200

400

600

800

1000

1200

-100 -50 0 50 100T-T0 (K)

R B (

)

TC=0.00794

Tcq=33.3E-6

T0=293 K

0

50

100

150

200

250

300

350

-100 -50 0 50 100 150 200

T-T0 (K)

R B (

(a2)

0.995

1

1.005

1.01

1.015

1.02

1.025

1.03

1.035

0 2 4 6 8 10 12Ie1 (ξA)

V P T A T_

m

/ V P T A T_

i

433K

413K

393K

373K 353K

333K

313K

293K

273K

253K

233K

0.995

1

1.005

1.01

1.015

1.02

1.025

1.03

1.035

0 2 4 6 8 10 12

Ie1 (ξA)

V P T A T_

m

/ V P T A T_

i

433K413K

393K

373K

353K

333K

313K

293K

273K

253K

233K

R B [ Ω ]

R B [ Ω ]

0.7-µm CMOS0.7-µm CMOS

0.5-µm CMOS0.5-µm CMOS

al = 0.012

a2 = 53E-6

ϑ 0 = 293 K

al = 0.008

a2 = 33E-6

ϑ 0 = 293 K

ϑ -ϑ 0 [K] (ϑ 0 = 293 K)

V P T A T_ m /

V P T A T_ i

V P T A T_ m /

V P T A T_

i

(b2)

ϑ -ϑ 0 [K]

I e1 [µA]

I e1 [µA]

Figure 3.13 (a) the measured normalized ∆V BE voltage, and (b) the extracted R B versustemperature for devices with an emitter area of 10 µ m× 20 µ m.

Above presented is a new method to measure the base resistance of a bipolar transistor. The

existing methods to measure the base resistance include DC methods and AC methods [3.7].

The DC methods include δ V BE-1 /BF measurement and two-base contact measurement. In theδ V BE-1 /BF method, one measures the voltage deviation δ V BE from the logarithmic position

under constant base current versus different current gains. From the plotted δ V BE versus thereciprocal current gain 1 /BF, the base resistance is derived in the combination with the RE

measurement. This method requires multiple devices in the same lot with different current

gains and assumes that all devices have the same base resistance and emitter resistance. For

this method the saturation current I S and the emitter resistance must also be measured.

Another DC method to measure the base resistance requires a specially designed transistor

with two separate base contacts, B1 and B2. The base current is only allowed to flow through

one of the two contacts, for instance through contact B1, while contact B2 is left open. Both

the voltage V B1E and V B2E are measured. The base resistance is derived from

B

E B E B

B I

V V

R

21 −

= . (3.23)

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35

This method is simple and easy. However, it requires a specially designed layout, which

deviates from the conventional design. Also the Kelvin voltage of V B2E represents only the

potential difference of the emitter in the closest position to the base B2, which is not exactly

the comprehensive base-emitter junction voltage.

The AC methods to measure the base resistance include the input impedance circle method ,

the phase cancellation method and the frequency response method. The input impedance

circle method and the frequency response method require measurements over a wide

frequency range, which are quite time consuming. The phase cancellation method also

requires measurements at a high frequency of a few MHz, and is only suitable for transistors

with β > 10.

Compared to the existing methods to measure the base resistance, the new method presented

in this section is much more suitable for the specific application for temperature sensors and

bandgap references, because the base resistance is derived at the similar working status.

The first-order and second-order temperature coefficients a1 and a2 of the base resistance areshown in Figure 3.13. These are much higher than those of the n-well resistances in 0.7-µm and 0.5-µm CMOS technology (a1 = 0.0049/K for 0.7-µm CMOS and a1 = 0.0043/K for 0.5-

µm CMOS). This can be explained by the fact that the high injection effect already occurs inthis current range. This also explains the fact that the a1 of the base resistance in 0.7-µm

CMOS is higher than that in 0.5-µm CMOS, because the high injection effect in 0.7-µm CMOS occurs earlier than that in 0.5-µm CMOS for transistors with the same emitter areasize (see Table 3.2).

3.4 Effects Affecting the Accuracy of V BE( I C ,ϑ ϑϑ ϑ ) and ∆∆∆∆V BE( I C,ϑ ϑϑ ϑ )3.4.1 The Base Resistances RB

For two reasons, in CMOS technology the contribution of the base resistance to the base-

emitter voltage is larger than that in bipolar technology, due to the larger series base resistance

and the lower forward current gain in CMOS technology. When we take into account the

voltage drop on base resistance, the base-emitter voltage becomes:

1 _ _

++=+=

F

B E j BE B B j BE BE

B

R I V R I V V , (3.24)

where V BE_j is the base-emitter junction voltage, which follows the ideal exponential relation.For instance, when the base current is 1 µA, according the measurement results shown inFigure 3.13(b1), the error due to the base resistance is about 1 mV at 373 K (0.7-µm CMOSdevice). This corresponds to a temperature error of 0.5 K.

The contribution of I B RB to the base-emitter voltage depends on the temperature dependence

of the emitter current. As shown in Figure 3.13(a1), the slope of the curves θ of thenormalized ∆V BE versus current I E1 is almost insensitive to temperature. In another word, θ isalmost constant in our measurement. From equation (3.22) we can conclude that RB/( BF+1)

has a good PTAT behaviour. Consequently, the contribution of the base resistance I B RB to

base-emitter voltage approximately shows the PTAT property for a constant emitter current.

The contribution of base resistance I B RB to voltage ∆V BE has a similar PTAT property. In this

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3. Characterization of the Temperature Behaviou

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